74HC4852; 74HCT4852. Dual 4-channel analog multiplexer/demultiplexer with injection-current effect control

Transcription

1 Dual 4-channel analog multiplexer/demultiplexer with injection- effect control Rev September 2008 Product data sheet. General description 2. Features The are high-speed Si-gate CMOS devices and are specified in compliance with JDC standard no. 7. The are dual 4-channel analog multiplexers/demultiplexers with common select inputs (S0 and S). Both multiplexers have a common active LOW enable input (), four independent inputs/outputs (ny0 to ny3) and two common inputs/outputs (Z, 2Z). The devices feature injection- effect control, which has excellent value in automotive applications where voltages in excess of the supply voltage are common. With LOW, two of the eight switches are selected (low impedance ON-state) by S0 and S. With HIGH, all switches are in the high-impedance OFF-state, independent of S0 and S. The injection- effect control allows signals at disabled analog input channels to exceed the supply voltage without affecting the signal of the enabled analog channel. This eliminates the need for external diode/resistor networks typically used to keep the analog channel signals within the supply-voltage range. Injection- cross coupling < mv/m Wide supply voltage range from 2.0 V to 6.0 V for 74HC4852 SD protection: HBM JSD22-4 exceeds 2000 V CDM JSD22-C0C exceeds 000 V Latch-up performance exceeds 00 m per JSD 78 Class II level Low ON-state resistance: 400 Ω (typical) at = 2.0 V 25 Ω (typical) at = 3.0 V 20 Ω (typical) at = 3.3 V 76 Ω (typical) at = 4.5 V 59 Ω (typical) at = 6.0 V

2 3. pplications nalog multiplexing and demultiplexing Digital multiplexing and demultiplexing Signal gating utomotive application 4. Ordering information Table. Type number Ordering information Package Temperature range Name Description Version 74HC4852D 40 C to +25 C SO6 plastic small outline package; 6 leads; SOT09- body width 3.9 mm 74HC4852PW 40 C to +25 C TSSOP6 plastic thin shrink small outline package; 6 leads; SOT403- body width 4.4 mm 74HC4852BQ 40 C to +25 C DHVQFN6 plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads; 6 terminals; body mm SOT763-74HCT4852D 40 C to +25 C SO6 plastic small outline package; 6 leads; body width 3.9 mm 74HCT4852PW 40 C to +25 C TSSOP6 plastic thin shrink small outline package; 6 leads; body width 4.4 mm 74HCT4852BQ 40 C to +25 C DHVQFN6 plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads; 6 terminals; body mm 5. Functional diagram SOT09- SOT403- SOT G Z Y0 2 0 S0 9 S 6 2Z Y 4 Y2 5 Y3 2Y0 2Y 5 2Y2 2 2Y MUX/DMUX aag093 00aag094 Fig. Logic symbol Fig 2. IC logic symbol Product data sheet Rev September of 20

3 6 INJCTION CURRNT CONTROL 3 Z INJCTION CURRNT CONTROL 2 Y0 INJCTION CURRNT CONTROL 4 Y S0 0 -OF-4 DCODR INJCTION CURRNT CONTROL INJCTION CURRNT CONTROL 5 Y2 Y3 S 9 INJCTION CURRNT CONTROL INJCTION CURRNT CONTROL 5 2Y0 2Y 6 INJCTION CURRNT CONTROL INJCTION CURRNT CONTROL 2 4 2Y2 2Y3 INJCTION CURRNT CONTROL 3 2Z 8 00aag095 Fig 3. Functional diagram Product data sheet Rev September of 20

4 6. Pinning information 6. Pinning 74HC HCT HC HCT4852 2Y0 6 terminal index area 2Y0 VCC 2Y2 2 5 Y2 2Y Y2 2Z 3 4 Y 2Z 3 4 Y 2Y3 4 3 Z 2Y3 4 3 Z 2Y Y0 Y3 2Y n.c () 7 0 Y0 Y3 S0 n.c. 7 0 S S S 00aag097 00aag096 Transparent top view () The die substrate is attached to this pad using conductive die attach material. It can not be used as a supply pin or input. Fig 4. Pin configuration SO6 and TSSOP6 Fig 5. Pin configuration DHVQFN6 6.2 Pin description Table 2. Pin description Symbol Pin Description 2Y0 independent input/output 2Y2 2 independent input/output 2Z 3 common input/output 2Y3 4 independent input/output 2Y 5 independent input/output 6 enable input (active LOW) n.c. 7 not connected 8 ground (0 V) S 9 select input S0 0 select input Y3 independent input/output Y0 2 independent input/output Z 3 common input/output Y 4 independent input/output Y2 5 independent input/output 6 supply voltage Product data sheet Rev September of 20

5 7. Functional description Table 3. Function table [] Input Channel ON S S0 L L L ny0 to nz L L H ny to nz L H L ny2 to nz L H H ny3 to nz H X X - [] H = HIGH voltage level; L = LOW voltage level; X = don t care. 8. Limiting values Table 4. Limiting values In accordance with the bsolute Maximum Rating System (IC 6034). Voltages are referenced to (ground = 0 V). Symbol Parameter Conditions Min Max Unit supply voltage V V I input voltage [] V V SW switch voltage [2] V I IK input clamping V I < 0.5 V or V I > V - ±20 m I SK switch clamping V SW < 0.5 V or V SW > V - ±20 m I SW switch V SW > 0.5 V or V SW < V - ±25 m I CC supply - 50 m I ground 50 - m T stg storage temperature C P tot total power dissipation T amb = 40 C to +25 C [3] mw [] The minimum and maximum input voltage rating may be exceeded if the input clamping rating is observed. [2] The minimum and maximum switch voltage rating may be exceeded if the switch clamping rating is observed. [3] For SO6 package: P tot derates linearly with 8 mw/k above 70 C. For TSSOP6 package: P tot derates linearly with 5.5 mw/k above 60 C. For DHVQFN6 packages: P tot derates linearly with 4.5 mw/k above 60 C. Product data sheet Rev September of 20

6 9. Recommended operating conditions Table 5. Recommended operating conditions Symbol Parameter Conditions 74HC HCT4852 Unit Min Typ Max Min Typ Max supply voltage V V I input voltage V V SW switch voltage V T amb ambient temperature C t/ V input transition rise and = 2.0 V ns/v fall rate = 3.0 V ns/v = 3.3 V ns/v = 4.5 V ns/v = 6.0 V ns/v 0. Static characteristics Table 6. R ON resistance t recommended operating conditions; voltages are referenced to (ground 0 V); For test circuit see Figure 8. Symbol Parameter Conditions 25 C 40 C to +85 C 40 C to +25 C Unit 74HC4852 R ON(peak) ON resistance (peak) R ON ON resistance mismatch between channels 74HCT4852 R ON(peak) ON resistance (peak) R ON ON resistance mismatch between channels V I = to ; = V IL Min Typ Max Min Max Min Max = 2.0 V; I SW = 2 m Ω = 3.0 V; I SW 2 m Ω = 3.3 V; I SW 2 m Ω = 4.5 V; I SW 2 m Ω = 6.0 V; I SW 2 m Ω V I = 0.5 ; = V IL = 2.0 V; I SW =2m Ω = 3.0 V; I SW 2 m Ω = 3.3 V; I SW 2m Ω = 4.5 V; I SW 2m Ω = 6.0 V; I SW 2m Ω V I = to ; = V IL = 4.5 V; I SW 2 m Ω V I = 0.5 ; = V IL = 4.5 V; I SW 2m Ω Product data sheet Rev September of 20

7 Table 7. Injection coupling t recommended operating conditions; voltages are referenced to (ground 0 V); For test circuit see Figure 9. Symbol Parameter Conditions 74HC HCT4852 Unit T amb = 40 C to +25 C V O output voltage variation I SW m; R S 3.9 kω [2][3] Min Typ [] Max Min Typ [] Max = 3.3 V mv = 5.0 V mv I SW 0 m; R S 3.9 kω = 3.3 V mv = 5.0 V mv I SW m; R S 20 kω = 3.3 V mv = 5.0 V mv I SW 0 m; R S 20 kω = 3.3 V mv = 5.0 V mv [] Typical values are measured at T amb =25 C. [2] V O here is the maximum variation of output voltage of an enabled analog channel when is injected into any disabled channel. [3] I SW = total injected into all disabled channels. Table 8. Static characteristics t recommended operating conditions; voltages are referenced to (ground 0 V). 25 C 40 C to +85 C 40 C to +25 C Symbol Parameter Conditions Min Typ Max Min Max Min Max Unit 74HC4852 V IH HIGH-level control inputs input = 2.0 V V voltage = 3.0 V V = 3.3 V V = 4.5 V V = 6.0 V V V IL LOW-level control inputs input = 2.0 V V voltage = 3.0 V V = 3.3 V V = 4.5 V V = 6.0 V V I I input leakage control inputs; V I = or = 6.0 V - - ±0. - ±0. - ±.0 µ Product data sheet Rev September of 20

8 Table 8. Static characteristics continued t recommended operating conditions; voltages are referenced to (ground 0 V). I S(OFF) I S(ON) I CC C I C sw OFF-state leakage ON-state leakage supply input capacitance switch capacitance 74HCT4852 V IH HIGH-level input voltage V IL LOW-level input voltage I I input leakage I S(OFF) I S(ON) I CC I CC C I C sw OFF-state leakage ON-state leakage supply additional supply = V IH ; V I = or ; V O = or ; = 6.0 V; see Figure 6 nyn; per channel - - ±0. - ±0.5 - ±.0 µ nz; all channels - - ±0.2 - ±2.0 - ±4.0 µ = V IL ; V I = or ; - - ±0. - ±0.5 - ±.0 µ V O = or ; = 6.0 V; see Figure 7 V I = or = 6.0 V µ S0, S, S2 and pf nz; OFF-state pf nyn; OFF-state pf control inputs = 4.5 V to 5.5 V V control inputs = 4.5 V to 5.5 V V control inputs; V I = or = 5.5 V - - ±0. - ±0. - ±.0 µ = V IH ; V I = or ; V O = or ; = 5.5 V; see Figure 6 per channel - - ±0. - ±0.5 - ±.0 µ all channels - - ±0.2 - ±2.0 - ±4.0 µ = V IL ; V I = or ; - - ±0. - ±0.5 - ±.0 µ V O = or ; = 5.5 V; see Figure 7 V I = or = 5.5 V µ control inputs; V I = 2. V; other inputs at or ; = 4.5 V to 5.5 V; I O =0 25 C 40 C to +85 C 40 C to +25 C Symbol Parameter Conditions Min Typ Max Min Max Min Max Unit µ input capacitance S0, S, S2 and pf switch nz; OFF-state pf capacitance nyn; OFF-state pf Product data sheet Rev September of 20

9 I S nyn selected channel () VI nz n.c. V IH V IL VI I S nyn nz I S VO VO nyn any disabled channel 00aag098 00aag099 () Channel is selected by S0 and S. Fig 6. Test circuit for measuring OFF-state leakage Fig 7. Test circuit for measuring ON-state leakage V I () nyn any disabled channel ISW VSW nz V V IL V IL nyn nz V I (2) RS nyn selected channel () VI ISW VI V O 00aag00 00aag0 R ON = V SW / I SW. () Channel is selected by S0 and S. V () I < or V () I >. < V (2) I <. Fig 8. Test circuit for measuring ON resistance Fig 9. Test circuit for injection coupling Product data sheet Rev September of 20

10 . Dynamic characteristics Table 9. Dynamic characteristics t recommended operating conditions; voltages are referenced to (ground 0 V); for load circuit see Figure 4. Symbol Parameter Conditions 25 C 40 C to +85 C 40 C to +25 C Unit Min Typ Max Min Max Min Max 74HC4852 t pd propagation delay nz, nyn to nyn, nz; see Figure 0 [] = 2.0 V ns = 3.0 V ns = 3.3 V ns = 4.5 V ns = 6.0 V ns Sn to nz, nyn; [] see Figure = 2.0 V ns = 3.0 V ns = 3.3 V ns = 4.5 V ns = 6.0 V ns t en enable time to nz, nyn; see Figure 2 [2] = 2.0 V ns = 3.0 V ns = 3.3 V ns = 4.5 V ns = 6.0 V ns t dis disable time to nz, nyn; see Figure 2 [3] = 2.0 V ns = 3.0 V ns = 3.3 V ns = 4.5 V ns = 6.0 V ns C PD power dissipation capacitance per channel; [4] see Figure 3 = 3.3 V pf = 5.0 V pf Product data sheet Rev September of 20

11 Table 9. Dynamic characteristics continued t recommended operating conditions; voltages are referenced to (ground 0 V); for load circuit see Figure 4. Symbol Parameter Conditions 25 C 40 C to +85 C 40 C to +25 C Unit Min Typ Max Min Max Min Max 74HCT4852 t pd propagation delay nz, nyn to nyn, nz; see Figure 0 [] = 4.5 V ns Sn to nz, nyn; [] see Figure = 4.5 V ns t en enable time to nz, nyn; see Figure 2 [2] = 4.5 V ns t dis disable time to nz, nyn; see Figure 2 [3] = 4.5 V ns C PD power dissipation capacitance [] t pd is the same as t PLH and t PHL. [2] t en is the same as t PZH and t PZL. [3] t dis is the same as t PLZ and t PHZ. [4] C PD is used to determine the dynamic power dissipation (P D in µw): P D =C PD V 2 CC f i + {(C L +C sw ) V 2 CC f o } where: f i = input frequency in MHz; f o = output frequency in MHz; {(C L +C sw ) V 2 CC f o } = sum of outputs; C L = output load capacitance in pf; C sw = switch capacitance in pf; = supply voltage in V. 2. Waveforms [4] per channel; see Figure 3 = 5.0 V pf nz or nyn input 0.5 t PLH t PHL nyn or nz output aah578 Fig 0. Input (nz, nyn) to output (nyn, nz) propagation delays Product data sheet Rev September 2008 of 20

12 V I Sn input V M nyn or nz output V M t PLH t PHL 00aah579 Measurement points are given in Table 0. Fig. Input (Sn) to output (nyn, nz) propagation delays V I input V M V M 0 V t PLZ t PZL nz or nyn output V M V OL V X t PHZ t PZH nz or nyn output V OH V Y V M switch ON switch OFF switch ON 00aah580 Measurement points are shown in Table 0. Logic levels: V OL and V OH are typical output voltage levels that occur with the output load. Fig 2. nable and disable times Table 0. Measurement points Type Input Output V M V I V M V X V Y 74HC V OL + 0.( V OL ) 0.9V OH 74HCT V 3.0 V 0.5 V OL + 0.( V OL ) 0.9V OH Product data sheet Rev September of 20

13 nyn selected channel G Sn nz n.c. nyn disabled channel 00aah58 Fig 3. Test circuit for measuring power dissipation capacitance Product data sheet Rev September of 20

14 V I negative pulse 0 V V I positive pulse 0 V t W 90 % 90 % V M V M 0 % t f t r t r t f 90 % V M V M 0 % 0 % t W 00aac22 a. Input pulse definition switch open G VI DUT VO RL RT CL 00aaf883 Definitions for test circuit: R L = load resistance. C L = load capacitance including jig and probe capacitance. R T = termination resistance should be equal to the output impedance Z o of the pulse generator. b. Load circuit Test data is given in Table. Fig 4. Input pulse definition and load circuit Table. Test data Test Input Output S position Control, Sn Switch nyn (nz) t r, t f Switch nz (nyn) V [] I V I C L R L t PHL, t PLH 6 ns 50 pf - open t PHZ, t PZH 6 ns 50 pf 0 kω t PLZ, t PZL 6 ns 50 pf 0 kω C PD 6 ns 0 pf - open [] For 74HCT4852: input voltage V I = 3.0 V. Product data sheet Rev September of 20

15 3. Package outline SO6: plastic small outline package; 6 leads; body width 3.9 mm SOT09- D X c y H v M Z 6 9 Q 2 ( ) 3 pin index θ L p 8 L e b p w M detail X mm scale DIMNSIONS (inch dimensions are derived from the original mm dimensions) UNIT mm inches max b p c D () () e H () L L p Q v w y Z Note. Plastic or metal protrusions of 0.5 mm (0.006 inch) maximum per side are not included θ o 8 o OUTLIN VRSION RFRNCS IC JDC JIT UROPN PROJCTION ISSU DT SOT MS Fig 5. Package outline SOT09- (SO6) Product data sheet Rev September of 20

16 TSSOP6: plastic thin shrink small outline package; 6 leads; body width 4.4 mm SOT403- D X c y H v M Z 6 9 pin index 2 Q ( ) 3 θ 8 e b p w M L detail X L p mm scale DIMNSIONS (mm are the original dimensions) UNIT 2 3 b p c D () (2) e H () L L p Q v w y Z max. mm θ o 8 o 0 Notes. Plastic or metal protrusions of 0.5 mm maximum per side are not included. 2. Plastic interlead protrusions of 0.25 mm maximum per side are not included. OUTLIN VRSION RFRNCS IC JDC JIT SOT403- MO-53 UROPN PROJCTION ISSU DT Fig 6. Package outline SOT403- (TSSOP6) Product data sheet Rev September of 20

17 DHVQFN6: plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads; 6 terminals; body 2.5 x 3.5 x 0.85 mm SOT763- D B c terminal index area detail X terminal index area e e b 2 7 v M w M C C B y C C y L 8 h e D h X mm scale DIMNSIONS (mm are the original dimensions) UNIT () max. b c D () D h () h e e L v w y y mm Note. Plastic or metal protrusions of mm maximum per side are not included. OUTLIN VRSION RFRNCS IC JDC JIT SOT MO UROPN PROJCTION ISSU DT Fig 7. Package outline SOT763- (DHVQFN6) Product data sheet Rev September of 20

18 4. bbreviations Table 2. cronym CDM CMOS DUT SD HBM MM bbreviations Description Charged Device Model Complementary Metal Oxide Semiconductor Device Under Test lectrostatic Discharge Human Body Model Machine Model 5. Revision history Table 3. Revision history Document ID Release date Data sheet status Change notice Supersedes Product data sheet - 74HC4852_2 Modifications: 74HCT4852 device added. 74HC4852_ Product data sheet - 74HC4852_ 74HC4852_ Product data sheet - - Product data sheet Rev September of 20

19 6. Legal information 6. Data sheet status Document status [][2] Product status [3] Definition Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. Product [short] data sheet Production This document contains the product specification. [] Please consult the most recently issued document before initiating or completing a design. [2] The term short data sheet is explained in section Definitions. [3] The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL Definitions Draft The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Short data sheet short data sheet is an extract from a full data sheet with the same product type number(s) and title. short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local NXP Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail. 6.3 Disclaimers General Information in this document is believed to be accurate and reliable. However, NXP Semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. Right to make changes NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof. Suitability for use NXP Semiconductors products are not designed, authorized or warranted to be suitable for use in medical, military, aircraft, space or life support equipment, nor in applications where failure or malfunction of an NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. NXP Semiconductors accepts no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer s own risk. pplications pplications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Limiting values Stress above one or more limiting values (as defined in the bsolute Maximum Ratings System of IC 6034) may cause permanent damage to the device. Limiting values are stress ratings only and operation of the device at these or any other conditions above those given in the Characteristics sections of this document is not implied. xposure to limiting values for extended periods may affect device reliability. Terms and conditions of sale NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at including those pertaining to warranty, intellectual property rights infringement and limitation of liability, unless explicitly otherwise agreed to in writing by NXP Semiconductors. In case of any inconsistency or conflict between information in this document and such terms and conditions, the latter will prevail. No offer to sell or license Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. 6.4 Trademarks Notice: ll referenced brands, product names, service names and trademarks are the property of their respective owners. 7. Contact information For more information, please visit: For sales office addresses, please send an to: salesaddresses@nxp.com Product data sheet Rev September of 20

20 8. Contents General description Features pplications Ordering information Functional diagram Pinning information Pinning Pin description Functional description Limiting values Recommended operating conditions Static characteristics Dynamic characteristics Waveforms Package outline bbreviations Revision history Legal information Data sheet status Definitions Disclaimers Trademarks Contact information Contents Please be aware that important notices concerning this document and the product(s) described herein, have been included in section Legal information. For more information, please visit: For sales office addresses, please send an to: salesaddresses@nxp.com Date of release: 2 September 2008 Document identifier: