IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 26, NO. 10, OCTOBER

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1 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 26, NO. 10, OCTOBER A Universal Selective Harmonic Elimination Method for High-Power Inverters Damoun Ahmadi, Student Member, IEEE, KeZou, Student Member, IEEE, Cong Li, Student Member, IEEE, Yi Huang, Member, IEEE, and Jin Wang, Member, IEEE Abstract In medium-/high-power inverters, optimal pulsewidth modulation (OPWM) is often used to reduce the switching frequency and at the same time, realize selective harmonic elimination (SHE). For both two-level and multilevel inverters, most selective harmonic elimination (SHE) studies are based on solving multiple variable high-order nonlinear equations. Furthermore, for multilevel inverters, SHE has been often studied based on the assumption of balanced dc levels and single switching per level. In this paper, the authors further developed harmonics injection and equal area criteria-based four-equation method to realize OPWM for two-level inverters and multilevel inverters with unbalanced dc sources. For the cases, where only small number of voltage levels are available, weight oriented junction point distribution is utilized to enhance the performance of the four-equation method. A case study of multilevel inverter at low-modulation index is used as an example. Compared with existing methods, the proposed method does not involve complex equation groups and is much easier to be utilized in the case of large number of switching angles, or multiple switching angles per voltage level in multilevel inverters. Index Terms Equal area criteria, modulation index, multilevel inverters, optimal pulsewidth modulation, selective harmonics elimination, total harmonic distortion. I. INTRODUCTION THE developments of flexible ac transmission system devices, medium voltage drives, and different types of distributed generations, have provided great opportunities for the implementations of medium- and high-power inverters. In these applications, the frequency of the pulse-width modulation (PWM) is often limited by switching losses and electromagnetic interferences caused by high dv/dt. Thus, to overcome these problems, selective harmonic elimination (SHE)-based optimal pulsewidth modulation (OPWM) are often utilized in both twolevel inverters and multilevel inverters to reduce the switching frequency and the total harmonic distortion [1] [12]. A typical multilevel inverter utilizes voltage levels from multiple dc sources. These dc sources can be interconnected or isolated depending on circuit topologies. Because of the complexity Manuscript received June 16, 2010; revised September 30, 2010 and December 22, 2010; accepted February 1, Date of current version September 21, Recommended for publication by Associate Editor V. G. Agelidis. The authors are with the Department of Electrical and Computer Engineering, Ohio State University, Columbus, OH USA ( ahmadi-khatir.1@ buckey .osu.edu; zou.35@buckey .osu.edu; li.1012@buckey . osu.edu; hyinwh@gmail.com; wang@ece.osu.edu). Color versions of one or more of the figures in this paper are available online at Digital Object Identifier /TPEL of the problem, most studies on SHE methods for multilevel inverters are based on the assumptions that the dc voltage sources are balanced (equal to each other) and there is only one switching angle per voltage level. But in real applications, depending on the nature of the dc sources and operation conditions of the circuits, the dc sources could be unbalanced [13], [14]. Also, at low-modulation index ranges of multilevel inverters [15] [18], where very limited voltage levels, e.g., three or five, are involved, the one switching per level scheme will result in high-harmonics distortion. Thus, in this paper, the author s four-equation-based method [40] [43] is further developed to solve the following three problems: 1) SHE-based optimal switching angle calculations for twolevel inverters; 2) SHE for multilevel inverter with unbalanced dc sources; 3) Multiple switching angles per level in multilevel inverters at low-modulation indices, which is equivalent to highmodulation indices in inverters with low number of voltage levels. Case studies and related experimental results are presented to validate the proposed methods. The paper is organized in the following way. Section II provides a brief review of different OPWM and SHE methods. Section III presents the detailed description of the improved four-equation-based method for 1) OPWM in two-level inverters and 2) weight oriented junction distribution for multilevel inverters with unbalanced dc sources. Case studies of the proposed methods are shown in Section IV, whereas the simulation and experimental verifications are shown in Section V. II. OPWM METHODS FOR SELECTED HARMONICS ELIMINATION PWM method was proposed for inverters in 1960 s and digitalized in 1970 s [19], [20]. Soon after the birth of the basic PWM method, in 1964, Turnbull proposed the SHE idea [21]. In this method, harmonic components are described as functions of the switching angles in trigonometric terms. If N is the total number of switching transitions, as shown in Fig. 1, the Fourier series expansion of the symmetric PWM waveform can be expressed as V (ωt) = m =1,3,5,... 4V dc mπ (cos(mθ 1) cos(mθ 2 )... +cos(mθ N )) sin(mωt) (1) /$ IEEE

2 2744 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 26, NO. 10, OCTOBER 2011 Fig. 1. Multiple switching angles in OPWM. where m is the order of the harmonic, and θ k are the kth switching angle. Based on (1), the following group of polynomial equations can be utilized to calculate the N switching angles and realize the selective harmonic elimination up to mth order. Please note that the value of m could be much higher than Fig. 2. Different approaches for harmonics elimination. N. 4V dc π (cos(θ 1) cos(θ 2 ) +cos(θ N )) = V F cos(5θ 1 ) cos(5θ 2 ) + cos(5θ N )=0 cos(7θ 1 ) cos(7θ 2 ) + cos(7θ N )=0... cos(mθ 1 ) cos(mθ 2 ) +cos(mθ N )=0 In this equation group, the first equation is used to guarantee the amplitude of the fundamental component (V F ) and the other equations are utilized to ensure the elimination of selected harmonics. Thus, by calculating the N switching angles, N-1 number of harmonics can be eliminated [22], [39]. In earlier days, algorithms like quarter symmetric polynomials and Newton-Raphson method with multiple variables or linearization had been utilized to solve this equation group [23], [24]. Recently, various control theory orientated algorithms are utilized to solve this group of equations. For instance, in [25], a clonal selection algorithm is introduced to find optimum solution with a random disturbance selection operation; in [26], sliding mode variable structure control is proposed based on closed loop algorithm for better performance in harmonics elimination; in [27], Homotopic fixed-point approach is utilized to find the initial values of the roots and conduct cubic iterations to refine the roots; and in [28], a feed forward artificial neural network is applied for selected harmonics elimination. In [29], m dimensional space is introduced to eliminate m harmonics. However, this method is practical to eliminate three harmonic components. For multilevel inverters, harmonics elimination follows the similar equation group as (2). Multiple methods, such as fuzzy proportional integral controller [30], resultants theory-based algorithm [31], adaptive control algorithm [32], genetic algorithm [33], [38] etc., have been proposed. Online calculations of the switching angels for both two-level inverters and multilevel inverters have also been reported [34], [35]. However, all the aforementioned methods are eventually based on solving complex groups of equations. Therefore, for higher number of switching transients, it is quite difficult or time consuming to solve these nonlinear equations with current computation methods [36], [37]. Thus, based on harmonics injection and equal area criteria, the authors have recently proposed a simple and fast four-equation method for multilevel inverters. In this method, regardless the number of voltage levels, only (2) Fig. 3. The illustration of equal area criteria. four simple equations are needed for switching angle calculations [40] [43]. For easy referencing, different PWM strategies for high-power two-level inverters and multilevel inverters are categorized in Fig. 2. III. PROPOSED METHODS FOR SELECTED HARMONIC ELIMINATION A. OPWM Method for Two-Level Inverters The basic idea is that, if a sinusoidal reference waveform is utilized to generate a series of switching angles with equal area criteria, the resulting PWM waveform would have both fundamental component and harmonics. Therefore, if selected negative harmonics are injected into the original pure sinusoidal reference waveform, because of the nature of the equal area criteria, the injected harmonics may cancel out the harmonics generated by the original pure sinusoidal reference. The following is the detailed illustration of the proposed method. For the simple case shown in Fig. 3, the harmonics content of the PWM waveform can be described from N 2V dc h m = mπ (cos(mθ k ) cos(mσ k )) (3) k=1,2,..,n where N is the total number of the switching angles and m is the order of the harmonics. Starting from this equation, the four-equation method includes the following basic steps: 1) Use a pure sinusoidal waveform and equal area criteria to decide initial switching angles of θ k with predefined initial values of σ k ; 2) Find the lower harmonics content in the resulting PWM waveform with (3);

3 AHMADI et al.: UNIVERSAL SELECTIVE HARMONIC ELIMINATION METHOD FOR HIGH-POWER INVERTERS 2745 This four-equation procedure is illustrated in Fig. 4. From this basic procedure, it is clear that the proposed method is an iteration-based method. So, there should be some initial starting point for σ k. A simple start point is to evenly distribute initial σ k s in the region of 0 to π/2. Equation (6) also shows that in this method, there is a defined relationship between σ k and θ k. Thus, when compared with methods that are based off solving high-order nonlinear equations, theoretically, the four-equation method will have less freedoms in eliminating the switching angles. But, because of the simplicity of proposed method, when eliminating the same number of harmonics, the four-equation method shall have faster results. To clarify the advantages and simplicity of the proposed method, in Table I, this method is compared with other methods that normally use the polynomial equations. Solving high-order nonlinear equations is no longer needed, thus, advanced algorithms are also no longer required. In the traditional methods, the number of equations grows with the number of switching angles in nonlinear way. Thus, it is very difficult to calculate the switching angles when the total number of the switching angles is high. Conversely, in the four-equation method, the four basic equations are used repeatedly, the total number of equations grows linearly with the number of switching angles. As a result, this method would be more suitable for cases with high numbers of switching angles or complex scenarios such as multiple switching angles per voltage level in multilevel inverters. Fig. 4. The diagram showing four-equation method. 3) Form a new reference waveform which is defined by V ref = V F sin(ωt) h ms sin(mωt) (4) where h ms is the sum of h m h ms = iter i=1,2,... h m (i) (5) 4) Use the new reference waveform and equal area criteria to form a new set of σ k and θ k. 5) Repeat step 1) to 4) until the selected harmonics is eliminated. The general equation to calculate θ k based on equal area criteria is θ k = σ k V F (cos(σ k 1 ) cos(σ k )) V dc h 5s(cos(5σ k 1 ) cos(5σ k )) 5V dc h ms(cos(mσ k 1 ) cos(mσ k )) mv dc (6) B. Compensation of Fundamental Component With the basic procedure described above, it was found that the resulting fundamental component is usually different from the desired fundamental component. This is because of possible over modulation caused by the harmonics injection or overlap of switching angles at high-modulation indices. Thus, fundamental voltage compensation is needed for the proposed method. The basic solution starts with the comparison between the resulting fundamental component and the reference. Then, based on this difference, a Δθ is calculated to modify the last switching angle that is the nearest to π/2. However, this Δθ will result in more harmonics. So, the resulting additional harmonics are calculated and added to the total harmonics injection to improve SHE. This adjustment angle can be calculated by inverse cosine in the following equation ( ) π Δθ = arccos (V F V 1N ) (7) 2V dc where V 1N is the total fundamental voltage generated switching angles from θ 1 to θ N. This adjustment angle is used to modify the last switching angle θ N (modified) = arccos(cos(θ N ) + cos(δθ)). (8) Therefore, based on the switching angle adjustment, the desired voltage magnitude in the fundamental frequency can be achieved. The total process of this modified method is illustrated in Fig. 5. C. OPWM in Multilevel Inverters at Low-Modulation Index With Unbalanced DC Sources For multilevel inverters, the harmonics selected for elimination are limited by the number of available dc levels. To overcome this problem, in each dc level, the number of switching angles can be increased to eliminate more harmonic components, as shown in Fig. 6. This is very helpful, especially for 1) low-modulation indices, where limited dc levels are available in multilevel inverters with high number of total dc voltage levels or 2) high-modulation index in inverters with limited voltage levels. In theory, there is no limitation for the number of switching angles used for each level. But, generally the number of switching angles is limited by the switching losses. In this section, as an example, the four-equation method is adapted to achieve SHE for multilevel inverters at low-modulation index with unbalanced dc sources, as shown in Fig. 6. Based on equal area criteria, the switching angles are determined through the following equation ( k k 1 θ k =1/V dc(k) V dc(i) δ k V dc(i) δ k 1 i=1 i=1 + V F (cos(δ k ) cos(δ k 1 )) h 5 5 (cos(5δ k ) cos(5δ k 1 )) h m m (cos(mδ k ) cos(mδ k 1 )) ) (9)

4 2746 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 26, NO. 10, OCTOBER 2011 TABLE I NUMBER OF FIRST-ORDER EQUATIONS SHOULD BE SOLVED FOR HARMONICS ELIMINATION IN DIFFERENT METHODS Fig. 5. Modified method with adjustment for the switching angle in optimal PWM based on four-equation method. Fig. 6. Optimal PWM with four-equation-based method on multilevel inverters with unbalanced dc sources. where δ k 1 and δ k are the two subjunction points per each subarea as shown in Fig. 7. The effectiveness of OPWM relies heavily on the values of δ k 1 and δ k. D. Weight Orientated Junction Point Distribution To define the values of δ k 1 and δ k, one possible solution is to equally divide the total area based on number of switching angles, as shown in Fig. 7(a). However, this strategy does not work well for low-modulation indices. This is simply because that with less voltage levels, larger area per level is needed in the compensation of harmonics. Thus, the distribution of the area becomes more crucial. However, it is also observed that magnitudes of harmonic contents decrease as the order of the harmonics increases N 4V dc(k) h m = mπ (cos(mθ k ) cos(mδ k ). (10) k=1,2,..,n This means that the corresponded area needed for the compensation of higher order harmonics also decreases. Based on this observation, in the adapted four-equation method, the area division for low-modulation indices can be determined by the Fig. 7. Two methodologies for area division in OPWM and four-equation combined method; (a) Symmetric method in medium and high- modulation index, and (b) Weight oriented method in low-modulation index. weight of the harmonics, which is shown in Fig. 7(b). In this weight orientated solution, larger area is made available for lower order harmonic components. Thus, better accuracy of harmonics elimination can be achieved. The procedure for this method is illustrated in Fig. 8. If λ k is defined by the difference between two subjunction points, δ k 1, and δ k, then based on weight orientated distribution λ k = δ k δ k 1 (11) λ k+1 = k +1 (12) λ k k In this case, for a symmetric waveform, the summation of the subareas shall be π/2 π/2 = m λ k = λ 1 k=1 m k=1 k = λ 1 m(m +1) 2 (13) thus, π λ 1 = m(m +1). (14) With (13) and (14), all the subjunction points δ k can be determined easily.

5 AHMADI et al.: UNIVERSAL SELECTIVE HARMONIC ELIMINATION METHOD FOR HIGH-POWER INVERTERS 2747 Fig. 8. Block diagram for weight oriented solution in low-modulation indices. TABLE II SAMPLE POINTS WITH PROPOSED METHOD IV. CASE STUDIES Two case studies of the proposed SHE are shown in this section: 1) two-level inverter and 2) multilevel inverter at lowmodulation indices. A. Two-Level Inverter In this case study of two-level inverter, ten switching angles are utilized. The modulation index is defined as MI = πv F (15) 4 where V F is the fundamental ac voltage in the output. Table II shows some sample points achieved with this method. In this case, δ k s are simply fixed at points k π/20. Fundamental component compensation shown in Fig. 5 is adapted for these sample points. The switching angles vs. modulation indices are shown in Fig. 9. Harmonics analysis in Table II shows that the selected harmonics are precisely eliminated. B. OPWM in Multilevel Inverters at Low-Modulation Index With Unbalanced DC Sources To verify the effectiveness of the four-equation method in multilevel inverters with unbalanced dc sources, the method Fig. 9. The overall switching angles for different modulation indices. is used to calculate switching angles of 11-level waveforms with five unbalanced dc sources. The modulation indices of the waveform are defined as MI = 4 π V F P V dc(i) i=1 (16)

6 2748 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 26, NO. 10, OCTOBER 2011 TABLE III SAMPLE POINTS BASED ON THE FOUR-EQUATION AND OPWM COMBINED METHOD FOR LOW-MODULATION INDICES Fig. 10. Simulated line-line voltage based on four-equation OPWM at three different modulation indices; (a) MI = , (b)mi = , (c) MI = TABLE IV HARMONIC COMPONENTS FOR THE SIMULATED-MODULATION INDICES Fig. 11. Experimental results for OPWM with ten switching angles for MI = ; (a) No load test voltage with ten switching angles, and (b) Load test voltage and current waveforms for MI = TABLE V HARMONICS CONTENT IN THE EXPERIMENTAL VOLTAGE AND CURRENT FOR MI =

7 AHMADI et al.: UNIVERSAL SELECTIVE HARMONIC ELIMINATION METHOD FOR HIGH-POWER INVERTERS 2749 Fig. 12. Frequency spectrum of experimental results for OPWM with ten switching angles in MI = ; (a) Harmonics analysis for output voltage in load testing, and (b) Harmonics analysis for output current in load testing. TABLE VI SIMULATION RESULTS FOR OUTPUT VOLTAGE AND SELECTED HARMONIC COMPONENTS ON DIFFERENT MODULATION INDICES Fig. 13. OPWM for multilevel inverters with unbalanced dc Voltage and weight orientated junction point distribution; (a) Three-level phase voltage waveform with MI = , and (b) Five-level phase voltage waveform with MI = where P is the number of dc levels and V dc(i) is the dc magnitude for each voltage level in multilevel inverter output waveform. One possible application of this study is cascade multilevel inverters for Photovoltaic (PV). For PV modules with different irradiations or temperatures, the dc voltage magnitudes at maximum power point are close to each other. The typical variation is less than 15%. Therefore, in this case study, the voltage differences between two dc sources are chosen as ± 15%. The switching angles and calculated harmonics content for low-modulation indices are shown in Table III. At these lowmodulation indices, only one or two dc sources are utilized. But for each voltage level, there are multiple switching angles. In the five-level waveform, θ 1 and θ 2 are applied at voltage level one; θ 3, θ 4, and θ 5 are applied at voltage level two. Fig. 14. sources. Experimental setup for multilevel inverter with unbalanced dc V. SIMULATION AND EXPERIMENTAL VERIFICATION To verify the proposed method, simulations and experiments have been carried out for the two case studies aforementioned. For no load conditions, dc voltage is increased up to 200 V. For load test, the dc-link voltage is increased up to 100 V. The load impedance are R = 3.2 ohm and L = 6 mh. A TI TMS320F2812

8 2750 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 26, NO. 10, OCTOBER 2011 Fig. 15. Experimental results for multilevel inverter with unbalanced dc sources at low-modulation indices; (a) Three-level phase voltage waveform with MI = , and (b) Five-level phase voltage waveform with MI = TABLE VII HARMONICS ANALYSIS FOR THE EXPERIMENTAL RESULTS WITH LOW-MODULATION INDICES (FIG. 15) DSP board is used to control the inverters. During the experiments, offline procedure is utilized. The switching angles are precalculated, and then programmed via the TI DSP. Though there are voltage and current sensors integrated in the inverters, they are not utilized in the tests. The voltage and current probes are used to read the numbers. A. OPWM With Ten Switching Angles for Two-Level Inverter To show the performance of the four-equation-based method OPWM for two-level inverter, three different modulation indices, , , and , are simulated and tested. The simulated line-line output voltages are shown in Fig. 10(a) (c). The harmonics analysis of the above waveforms is summarized in Table IV. The results show that the magnitudes of the selected harmonics for each modulation index are minimized successfully. However, in the proposed method, number of iteration for the steps can be increased resulting in complete harmonic elimination. Experiments were carried out for the case that modulation index equals to Fig. 11 shows the waveforms from both no load and inductive load cases. As a comparison to Table IV, the harmonics analysis for the voltage and load current are shown in Table V. The spectrum analysis is shown in Fig. 12. It is noted that there are slight difference between Tables IV and V in terms of voltage harmonics content. The difference is mainly due to the 1.5 us dead time and dc voltage fluctuation caused by the oscillation between the load inductor and the dc-link capacitor. B. Low-Modulation Indices in Multilevel Inverters For weight oriented solution, two cases of low-modulation indices with unbalanced dc levels are simulated. Table VI shows the switching angles and selected harmonic components for these two-modulation indices. Correspondent waveforms are shown in Fig. 13. As described in Section III(c) and III(d), the angles in Table VI are switch turn-on points. The switch turnoff points are the subjunction points that are calculated with the weighted area distributions. It is shown in Table VI that when more voltage levels are involved, because of the complexity of the problem, the performance of the proposed method degraded a little bit, but the concerned harmonics are still minimized effectively. Since low-modulation indices tests only request two dc sources, during the tests, two H-Bridge modules are cascaded to achieve five-level waveforms. The test setup is shown in Fig. 14. The experimental waveforms are shown in Fig. 15. As a comparison to Table VI, the harmonics analysis for the experimental results in two-modulation indices with weight oriented solution are shown in Table VII. From both the simulation and experimental results, it can be seen that the selected harmonics contents are eliminated effectively with the proposed method. VI. CONCLUSIONS In this paper, a modified four-equation method is proposed for selected harmonics elimination for both two-level inverters and multilevel inverters with unbalanced dc sources. For this case with fairly low number of switching angles and unbalanced

9 AHMADI et al.: UNIVERSAL SELECTIVE HARMONIC ELIMINATION METHOD FOR HIGH-POWER INVERTERS 2751 multiple voltage levels, the weight orientated junction point distribution is applied to enhance the performance of the proposed method. Both the simulation and experimental results validate the proposed methods. Compared with existing methods, the four-equation method does not involve high-order polynomial equations, thus is friendlier toward the cases, like large number of switching angles or multiple switching angles per dc source. Earlier papers by the authors have demonstrated the effectiveness of the four-equation method for multilevel inverters with single switch angle per level. In this paper, it is demonstrated that the same method can be adopted for optimal PWM in both two-level inverters and multilevel inverters with unbalanced dc sources at low-modulation indices. Thus, it is fair to claim that the four-equation-based method is a simple and universal SHE method for all types of high-power inverters. REFERENCES [1] J. Rodriguez, J. S. Lai, and F. Z. Peng, Multilevel inverters: A survey of topologies, controls, and applications, IEEE Trans. Ind. Electron., vol. 49, no. 4, pp , Aug [2] L. M. Tolbert, F. Z. Peng, and T. G. Habetler, Multilevel converters for large electric drives, IEEE Trans. Ind. Appl., vol. 35, no. 1, pp , Jan [3] F. Z. Peng, A generalized multilevel inverter topology with self voltage balancing, IEEE Trans. Ind. Appl., vol. 37, no. 2, pp , Apr [4] K. A. Corzine, S. D. Sudhoff, E. A. Lewis, D. H. Schmucker, R. A. Youngs, and H. J. Hegner, Use of multi-level converters in ship propulsion drives, in Proc. All Electric Ship Conf., London, U.K., Sep.1998, Vol. 1, pp [5] J. K. Steinke, Control strategy for a three phase AC traction drive with a 3-Level GTO PWM inverter, in Proc. IEEE Power Electron. Spec. Conf., 1988, vol. 1, pp [6] M. P. Steimer and J. K. Steinke, Five level GTO inverters for large induction motor drives, in Proc. Conf. Rec. IEEE-IAS Annu. Meeting, Oct., 1993, pp [7] G. Beinhold, R. Jakob, and M. Nahrstaedt, A new range of medium voltage multilevel inverter drives with floating capacitor technology, presented at the 9th Eur. Conf. Power Electron (EPE), Graz, Austria, [8] M. Koyama, Y. Shimomura, H. Yamaguchi, M. Mukunoki, H. Okayama, and S. Mizoguchi, Large capacity high efficiency three-level GCT inverter system for steel rolling mill drives, presented at the 9th Eur. Conf. Power Electron. (EPE), Graz, Austria, [9] P. M. Bhagwat and V. R. Stefanovic, Generalized structure of a multilevel PWM inverter, IEEE Trans. Ind. Appl., vol.ia-19,no.6,pp , Nov./Dec [10] F. Z. Peng, A generalized multilevel inverter topology with self voltage balancing, IEEE Trans. Ind. Applicat., vol. 37, no. 2, pp , Apr [11] M. D. Manjrekar, P. K. Steimer, and T. A. Lipo, Hybrid multilevel power conversion system: A competitive solution for high-power applications, IEEE Trans. Ind. Applicat., vol. 36, no. 3, pp , Jun [12] F. Z. Peng and J. S. Lai, A static var generator using a staircase waveform multilevel voltage-source converter, in Proc. 7th Int. Power Quality Conf., Dallas, TX, Sep. 1994, pp [13] L. M. Tolbert, J. N. Chiasson, Z. Du, and K. J. McKenzie, Elimination of harmonics in a multilevel converter with non equal DC sources, IEEE Trans. Ind. Appl., vol. 41, no. 1, pp , Jan./Feb [14] F. J. T. Filho, T. H. A. Mateus, H. Z. Maia, B. Ozpineci, J. O. P. Pinto, and L. M. Tolbert, Real-time selective harmonic minimization in cascaded multilevel inverters with varying DC sources, in Proc. IEEE Power Electron. Spec. Conf., Rhodes, Greece, Jun , 2008, pp [15] J. N. Chiasson, L. M. Tolbert, K. J. McKenzie, and Z. Du, A unified approach to solving the harmonic elimination equations in multilevel converters, IEEE Trans. Power Electron., vol. 19, no. 2, pp , Mar [16] J. Sun, S. Beineke, and H. Grotstollen, Optimal PWM based on realtime solution of harmonics elimination equations, IEEE Trans. Power Electron., vol. 11, no. 4, pp , Jul [17] J. Pontt, J. Rodriguez, and R. Huerta, Mitigation of non-eliminated harmonics of SHEPWM three-level multi-pulse three-phase active front end converters with low switching frequency for meeting standard IEEE , IEEE Trans. Power Electron., vol. 19, no. 6, pp , Nov [18] L. M. Tolbert, F. Z. Peng, and T. G. Habetler, Multilevel PWM Methods at Low Modulation Indices, IEEE Trans. Power Electron., vol.15,no.4, pp , Jul [19] A. Schonung and H. Stemmler, Static frequency changer with subharmonic control in conjunction with reversible variable speed AC drives, Brown Boveri Rev., vol. 51, pp , Aug./Sep [20] S. R. Bowes, New sinusoidal pulsewidth-modulated inverter, IEE Proc., vol. 122, no. 11, pp , [21] F. G. Turnbull, Selected harmonic reduction in static DC-AC inverters, IEEE Trans. Commun. Electron., vol. 83, no. 73, pp , Jul [22] J. Vassallo, J. C. Clare, and P. W. Wheeler, Power-equalized harmonicelimination scheme for utility-connected cascaded H-bridge multilevel converters, in Proc. Ind Electron. Soc., IECON th Annu. Conf. IEEE, Nov., 2003, vol. 2, pp [23] H. S. Pate1 and R. G. Hoft, Generalized technique of harmonics elimination and voltage control in Thyristor inverts: Part I harmonic elimination, IEEE Trans. Ind. Appl., vol. IA-9, no. 3, pp , Jun [24] G. Carrara, S. Gardella, M. Marchesoni, R. Salutari, and G. Sciutto, A new multilevel PWM method: A theoretical analysis, IEEE Trans. Power Electron., vol. 7, no. 4, pp , Jul [25] H. Lou, C. Mao, D. Wang, and J. Lu, PWM optimization for three-level voltage inverter based on clonal selection algorithm, IET Electron. Power Appl., vol. 1, no. 6, pp , Nov [26] H. Qing, G. Qingding, and Y. Ongmei, The sliding mode control of power electronic converters with fuzzy logic, in Proc. 6th Int. Conf. Electr. Mach. Syst. (ICEMS), Nov. 2003, vol. 1, no. 9 11, pp [27] H. Shiyan and D. Czarkowski, A novel simplex homotopic fixed-point algorithm for computation of optimal PWM patterns Han Huang, in Proc. 35th IEEE Power Electron. Spec. Conf. (PESC), Jun. 2004, vol. 2, pp [28] M. Mohaddes, A. Gole, and M. McLaren, Hardware implementation of neural network controlled optimal PWM inverter using TMS320C30 board, in Proc. IEEE Commun., Power Comput. Conf. Proc., May 1997, pp [29] T. Kato, Sequential homotopy-based computation of multiple solutions for selected harmonic elimination in PWM inverters, IEEE Trans. Circuit Syst., vol. 46, no. 5, pp , May [30] N. A. Azli and S. N. Wong, Development of a DSP-based fuzzy PI controller for an online optimal PWM control scheme for a multilevel inverter, in Proc. Int. Conf. Power Electron. Drives Syst. (PEDS), Nov. 2005, vol. 2, pp [31] J. Chiasson, L. Tolbert, K. McKenzie, and Z. Du, Elimination of harmonics in a multilevel converter using the theory of symmetric polynomials and resultants, IEEE Trans. Control Syst. Technol., vol. 13, no. 2, pp , Mar [32] J. Holtz and J. O. Krah, Adaptive optimal pulse-width modulation for the line-side converter of electric locomotives, IEEE Trans. Power Elecron., vol. 7, no. 1, pp , Jan [33] B. Ozpineci, L. M. Tolbert, and J. N. Chiasson, Harmonic optimization of multilevel converters using genetic algorithms, IEEE Power Electron. Lett., vol. 3, no. 3, pp , Sep [34] J. Sun, S. Beineke, and H. Grotstollen, Optimal PWM based on realtime Solution of harmonic elimination equations, IEEE Trans Power Electron., vol. 11, no. 4, pp , Jul [35] Y. Liu, H. Hong, and A. Q. Huang, Real-time calculation of switching angles minimizing THD for multilevel inverters with Step modulation, IEEE Trans. Ind. Electron., vol. 56, no. 2, pp , Feb [36] J. N. Chiasson, L. M. Tolbert, Z. Du, and K. J. McKenzie, The use of power sums to solve the harmonic elimination equations for multilevel converters, Eur. Power Electron. Drives, vol. 15, no. 1, pp , Feb [37] J. Pontt, J. Rodriguez, and R. Huerta, Mitigation of non-eliminated harmonics of SHEPWM three-level multi-pulse three-phase active front end converters with low switching frequency for meeting standard IEEE , IEEE Trans. Power Electron, vol. 19, no. 6, pp , Nov [38] M. S. A. Dahidah and V. G. Agelidis, Selective harmonic elimination PWM control for cascaded multilevel voltage source converters: A generalized formula, IEEE Trans. Power Electron., vol. 23, no. 4, pp , Jul

10 2752 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 26, NO. 10, OCTOBER 2011 [39] V. G. Agelidis, A. I. Balouktsis, and M. S. A. Dahidah, A five-level symmetrically defined selective harmonic elimination PWM strategy: Analysis and experimental validation, IEEE Trans. Power Electron., vol. 23,no.1, pp , Jan [40] J. Wang, Y. Huang, and F. Z. Peng, A practical harmonics elimination method for multilevel inverters, Proc. IEEE Ind. Appl., vol.3, pp , Oct [41] J. Wang and D. Ahmadi, A precise and practical harmonic elimination method for multilevel inverters, IEEE Trans. Ind. Appl., vol. 46, no. 2, pp , Mar [42] D. Ahmadi and J. Wang, Selective harmonic elimination for multilevel inverters with unbalanced DC inputs, in Proc. IEEE Veh. Power Propuls. Conf. (VPPC), Sep. 2009, pp [43] D. Ahmadi and J. Wang, Weight oriented optimal PWM in low modulation indices for multilevel inverters with unbalanced DC sources, in Proc. IEEE Appl. Power Electron. Conf. Expo. (APEC), Feb. 2010, pp Damoun Ahmadi (S 09) was born in Iran in He received the M.S. degree from Sharif University of Technology, Tehran, Iran, in He is currently working toward the Ph.D. degree in Power Electronics at the Ohio State University, Columbus, OH. During that time, he worked on different control strategies for ac motor drives and applying flexible ac transmission system (FACT s) devices for reactive power compensation. His research interests include multilevel inverters, real time simulation of renewable energies for smart grid, intelligent and optimized power tracking for automotive battery charging, power electronic circuits, hardware in the loop, and DSP applications for high power systems and distributed generations. Ke Zou (S 09) received the B.S. and M.S. degrees in electrical engineering from Xi an Jiaotong University, China, in 2005, and 2008, respectively. He is currently working toward the Ph.D. degree in the Ohio State University, Columbus, OH. His current research interests include switched capacitor dc/dc converter and dc/ac multilevel inverter, battery model in high-frequency application, and hardware in the loop (HIL) systems for power electronics and power systems. Cong Li (S 10) received the B.S. and M.S. degrees in electrical engineering from the Wuhan University, Wuhan, China, in 2007, and 2009, respectively. He is currently working toward the Ph.D. degree in electrical engineering at The Ohio State University, Columbus, OH. His research interests include power electronic circuits and applications, and renewable energy, thermoelectric cooling application, low-voltage high- current dc/dc converter design, and circuit analysis of MW PV power plant. Yi Huang (S 05 M 10) received the B.S. and M.S. degrees in electrical engineering from the Wuhan University, China, in 1998, and 2001, respectively. She received the Ph.D. degree in electrical engineering from the Michigan State University, East Lansing, in She is currently a Postdoctoral Researcher at the Ohio State University, Columbus, OH,. Her research interests include dc-ac inverter, dc-dc converter, advanced digital control technique, and Photovoltaic inverter systems. Jin Wang (S 02 M 05) received the B.S. degree from Xi an Jiaotong University, in 1998, M.S. degree from the Wuhan University, in 2001, and the Ph.D. degree from Michigan State University, East Lansing, in 2005, all in electrical engineering. He is currently an Assistant Professor in the energy/power area at The Ohio State University (OSU), Columbus, OH. His Teaching Position is cosponsored by American Electric Power, Duke/Synergy, and FirstEnergy. Before joining OSU, he worked at Ford Motor Company as a Core Power Electronics Engineer for two years. His research interests include high-voltage and highpower converter/inverters, integration of renewable energy sources, and electrification of transportations. Dr. Wang received the National Science Foundation s CAREER Award in He has been an Associate Editor for IEEE Transactions on Industry Application from March 2008.

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