EVALUATION KIT AVAILABLE 1-Cell to 2-Cell, Low-Noise, High-Efficiency, Step-Up DC-DC Converter PFO LOW-BATTERY DETECTOR OUTPUT

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1 ; Rev ; 7/98 EALUATION KIT AAILABLE 1-Cell to 2-Cell, Low-Noise, General Description The is a high-efficiency, low-voltage, synchronous-rectified, step-up DC-DC converter intended for use in devices powered by 1 to 3-cell alkaline, NiMH, or NiCd batteries or a 1-cell lithium battery. It guarantees a.87 start-up voltage and features a low 37 quiescent supply current. The device includes a 1Ω, N-channel MOSFET power switch, a synchronous rectifier that acts as the catch diode, a reference, pulse-frequency-modulation (PFM) control circuitry, and circuitry to reduce inductor ringing all in an ultra-small, 1.1mm-high µmax package. The output voltage is preset to 3.3 or can be adjusted from +2 to +5.5 using only two resistors. Efficiencies up to 9% are achieved for loads up to 5mA. The device also features an independent undervoltage comparator (PFI/PFO) and a logic-controlled 2 shutdown mode. Features.87 Guaranteed Start-Up Up to 9% Efficiency Built-In Synchronous Rectifier (no external diode) Ultra-Small µmax Package, 1.1mm High 37 Quiescent Current (85 from 1.5 battery) 2 Logic-Controlled Shutdown Power-Fail Detector Dual Mode Output: Fixed 3.3 Adjustable 2 to mA Output Current at 3.3 for 1-Cell Input 9mA Output Current at 3.3 for 2-Cell Input Inductor-Damping Switch Suppresses EMI Pagers Remote Controls Pointing Devices Personal Medical Monitors Single-Cell Battery-Powered Devices Applications Ordering Information PART TEMP. RANGE PIN-PACKAGE EUA -4 C to +85 C 8 µmax Note: To order these devices shipped in tape-and-reel, add a -T to the part number. Typical Operating Circuit Pin Configuration INPUT.87 TO PUT 3.3 TOP IEW ON OFF LOW-ERY DETECTOR INPUT SHDN PFI PFO FB LOW-ERY DETECTOR PUT PFI PFO SHDN FB µmax Dual Mode is a trademark of Maxim Integrated Products. Maxim Integrated Products 1 For free samples & the latest literature: or phone For small orders, phone ext

2 ABSOLUTE MAXIMUM RATINGS,,, SHDN to to +6., Current...1A FB, PFI, PFO to to ( +.3) Reverse Battery Current (T A = +25 C) (Note 1)...22mA Continuous Power Dissipation (T A = +7 C) µmax (derate 4.1mW/ C above +7 C)...33mW Operating Temperature Range...-4 C to +85 C Junction Temperature C Storage Temperature Range C to +165 C Lead Temperature (soldering, sec)...+3 C Note 1: The reverse battery current is measured from the Typical Operating Circuit s input terminal to when the battery is connected backward. A reverse current of 22mA will not exceed package dissipation limits but, if left for an extended time (more than minutes), may degrade performance. Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. ELECTRICAL CHARACTERISTICS ( = SHDN = 1.3, I LOAD =, FB =, T A = C to +85 C, unless otherwise noted. Typical values are at T A = +25 C.) PARAMETER Minimum Operating Input oltage Maximum Operating Input oltage Start-Up oltage (Note 2) Start-Up oltage Tempco Output oltage (Fixed Mode) Output oltage Range (Adjustable Mode) FB Set oltage N-Channel On-Resistance P-Channel On-Resistance P-Channel Catch Diode oltage Maximum Peak Current On-Time Constant Quiescent Current into Quiescent Current into Shutdown Current into Shutdown Current into Efficiency FB Input Current PFI Trip oltage PFI Input Current PFO Low Output oltage R L = 3kΩ, T A = +25 C FB <.1 External feedback External feedback = 3.3 = 3.3 I DIODE = ma, P-channel switch off.9 < < 3.3 (t ON = K / ) = 3.5 = 3.5 = 1 I LOAD = 2mA, = 2.5 (Figure 7) FB = 1.3 Falling PFI hysteresis 2% PFI = 65m CONDITIONS PFI =, = 3.3, I SINK = 1mA PFO Leakage Current PFI = 65m, PFO = SHDN Input Low oltage IL.2 x SHDN Input High oltage SHDN Input Current SYMBOL (MIN) (MAX) FB I (MAX) K I Q, I Q, I SHDN, I SHDN, η IL,PFI OL IH SHDN = or MIN TYP MAX x UNITS m/ C Ω Ω ma -µs % na m na na 2

3 ELECTRICAL CHARACTERISTICS ( = SHDN = 1.3, I LOAD =, FB =, T A = -4 C to +85 C, unless otherwise noted.) (Note 3) PFI Trip oltage PARAMETER Maximum Operating Input oltage Output oltage (Fixed Mode) Output oltage Range (Adjustable Mode) FB Set oltage N-Channel On-Resistance P-Channel On-Resistance On-Time Constant Quiescent Current into Quiescent Current into Shutdown Current into Shutdown Current into FB Input Current PFI Input Current PFO Low Output oltage FB <.1 External feedback External feedback = 3.3 = < < 3.3 (t ON = K / ) = 3.5 = 3.5 = 1 FB = 1.3 Falling PFI hysteresis 2% PFI = 65m CONDITIONS PFI =, = 3.3, I SINK = 1mA PFO Leakage Current PFI = 65m, PFO = 6 1 SHDN Input Low oltage IL.2 x SHDN Input High oltage SHDN Input Current SYMBOL (MAX) FB K I Q, I Q, I SHDN, I SHDN, IL,PFI OL IH SHDN = or MIN x MAX UNITS Ω Ω -µs na m na na Note 2: Start-up is guaranteed by correlation to measurements of device parameters (i.e., switch on-resistance, on-time, off-time, and output voltage trip point). Note 3: Specifications to -4 C are guaranteed by design and not production tested. 3

4 Typical Operating Characteristics (Circuit of Figure 7 (Fixed Mode, 3.3) or Figure 8 (Adjustable Mode), T A = +25 C, unless otherwise noted.) ( = 2.4, L1 = 22µH) IN = 1.5 IN =.85 2 L1 = 22µH SUMIDA CD43-22 R1 = 2kΩ, R2 = 2kΩ IN = 2. IN = ( = 2.4, L1 = SUMIDA 47µH) IN = 1.5 IN =.85 2 SUMIDA CD43-47 R1 = 2kΩ, R2 = 2kΩ IN = 2. IN = ( = 2.4, L1 = TDK 47µH) IN = 2. IN = 1.5 IN =.85 TDK NLC453232T-47K R1 = 2kΩ, R2 = 2kΩ IN = ( = 3.3, L1 = 22µH) IN = 2. IN = 2.5 IN = ( = 3.3, L1 = SUMIDA 47µH) IN = 2.5 IN = ( = 3.3, L1 = TDK 47µH) IN = 1.5 IN = 2.5 IN = IN =.85 IN = IN =.85 IN = 1.2 IN = IN =.85 IN = L1 = 22µH SUMIDA CD43-22 FB = SUMIDA CD43-47 FB = 2 TDK NLC453232T-47K FB = ( = 5., L1 = 22µH) IN = 4.5 IN = 3. IN = 1.2 IN =.85 IN = ( = 5., L1 = SUMIDA 47µH) IN = 3. IN = 4.5 IN =.85 IN = 1.2 IN = ( = 5., L1 = TDK 47µH) IN = 4.5 IN = 3. IN =.85 IN = 1.2 IN = L1 = 22µH SUMIDA CD43-22 R1 = 619kΩ, R2 = 2kΩ SUMIDA CD43-47 R1 = 619kΩ, R2 = 2kΩ TDK NLC K R1 = 619kΩ, R2 = 2kΩ

5 Typical Operating Characteristics (continued) (Circuit of Figure 7 (Fixed Mode, 3.3) or Figure 8 (Adjustable Mode), T A = +25 C, unless otherwise noted.) EFFICIENCY WITH DIFFERENT INDUCTORS DS168C µH DT168C µH COILCRAFT CD µH CD µH LQH4N47K 47µH = 1.2 = 3.3 I LOAD = 2mA LQH3C47K 47µH NLC453232T-47K 47µH SUMIDA MURATA TDK NLC453232T-22K 22µH - NO-LOAD ERY CURRENT () NO-LOAD ERY CURRENT vs. INPUT OLTAGE = 5. R1 = 3MΩ, R2 = 1MΩ = 3. FB = = 2.4 R1 = 1MΩ, R2 = 1MΩ SUMIDA CD INPUT OLTAGE () -11 QUIESCENT CURRENT () AND QUIESCENT CURRENT vs. TEMPERATURE = 1.3 = 3.6 FB = I I TEMPERATURE ( C) -12 SHUTDOWN ERY CURRENT () SHUTDOWN ERY CURRENT vs. INPUT OLTAGE 3.3 FIXED MODE SUMIDA CD ON-TIME CONSTANT (-µs) = 1.3 ON-TIME CONSTANT (K) vs. TEMPERATURE -14 START-UP INPUT OLTAGE () MINIMUM START-UP INPUT OLTAGE vs. LOAD CURRENT SUMIDA CD FIXED MODE WITH DIODE WITH EXTERNAL SCHOTTKY DIODE (FIGURE 3) INPUT OLTAGE () TEMPERATURE ( C) MAXIMUM MAXIMUM LOAD CURRENT vs. INPUT OLTAGE (L1 = 22µH) L1 = 22µH SUMIDA CD43-22 = 2.4 = 5. = MAXIMUM MAXIMUM LOAD CURRENT vs. INPUT OLTAGE (L1 = SUMIDA 47µH) SUMIDA CD43-47 = 2.4 = 3.3 = MAXIMUM MAXIMUM LOAD CURRENT vs. INPUT OLTAGE (L1 = TDK 47µH) TDK NLC453232T-47K = 2.4 = 3.3 = INPUT OLTAGE () INPUT OLTAGE () INPUT OLTAGE () 5

6 Typical Operating Characteristics (continued) (Circuit of Figure 7 (Fixed Mode, 3.3) or Figure 8 (Adjustable Mode), T A = +25 C, unless otherwise noted.) A SWITCHING WAEFORM -19 A LOAD-TRANSIENT RESPONSE -2 B B C 5µs/div = 3.3, = 1.2, I LOAD = ma, C = µf, L1 = SUMIDA CD43-47 A:, 2/div B:, 5m/div AC COUPLED C: INDUCTOR CURRENT, ma/div LINE-TRANSIENT RESPONSE C µs/div = 3.3, = 1.2, C = µf, L1 = SUMIDA CD43-47, A:, 5m/div, AC COUPLED B: INDUCTOR CURRENT, C: LOAD, 2mA to 12mA ma/div POWER-UP RESPONSE A A B B C 2µs/div = 3.3, = 1.2, I LOAD = ma, C = µf, L1 = SUMIDA CD43-47 A:, 5m/div, AC COUPLED B: IN, 1/div, 1.2 to 2.2 µs/div = 3.3, = 1.2, I LOAD = ma, C = µf, L1 = SUMIDA CD43-47 A:, 1/div B: INDUCTOR CURRENT, ma/div C: SHDN, 5/div Pin Description PIN NAME PFI PFO SHDN FB Battery-Power Input FUNCTION Power-Fail Input. When the voltage at PFI is below 614m, PFO sinks current. Open-Drain Power-Fail Output. PFO sinks current when PFI is below 614m. Active-Low Shutdown. Connect SHDN to for normal operation. Dual-Mode Feedback Input. Connect FB to for fixed-output operation (3.3). Connect FB to a feedback-resistor network for adjustable output voltage operation (2 to 5.5). FB regulates to Ground N-Channel MOSFET Switch Drain and P-Channel Synchronous-Rectifier Drain Power Output and IC Power Input (bootstrapped). is the feedback input for 3.3 operation. Connect the filter capacitor close to. 6

7 BACKUP t OFF TIMER ZERO-CROSSING DETECTION.5REF DAMPING SWITCH t ON = K/ PFI DAMP TON TOFF PDR EN CONTROL LOGIC NDR P PFO FB REF N RFRDY REF START-UP OSCILLATOR 1.23 REF.5REF SHDN 1.7 START-UP COMPARATOR Figure 1. Functional Diagram Detailed Description The consists of an internal 1Ω, N-channel MOSFET power switch, a built-in synchronous rectifier that acts as the catch diode, a reference, PFM control circuitry, and an inductor damping switch (Figure 1). The device is optimized for applications that are powered by 1 to 3-cell alkaline, NiMH, or NiCd batteries, or a 1-cell lithium battery such as pagers, remote controls, and battery-powered instruments. They are designed to meet the specific demands of the operating states characteristic of such systems: 1) Primary battery is good and load is active: In this state the load draws tens of milliamperes and the typically offers 8% to 9% efficiency. 2) Primary battery is good and load is sleeping: In this state the load draws hundreds of microamperes and the DC-DC converter IC draws very low quiescent current. Many applications maintain the load in this state most of the time. 3) Primary battery is dead and DC-DC converter is shut down: In this state the load is sleeping or supplied by the backup battery, and the draws.1 current from the pin. 4) Primary and backup battery dead: The DC-DC converter can restart from this condition. 7

8 Operating Principle The employs a proprietary constant-peakcurrent control scheme that combines the ultra-low quiescent current of traditional pulse-skipping PFM converters with high-load efficiency. When the error comparator detects that the output voltage is too low, it turns on the internal N-channel MOSFET switch for an internally calculated on-time (Figure 2). During the on-time, current ramps up in the inductor, storing energy in the magnetic field. When the MOSFET turns off during the second half of each cycle, the magnetic field collapses, causing the inductor voltage to force current through the synchronous rectifier, transferring the stored energy to the output filter capacitor and the load. The output filter capacitor stores charge while the current from the inductor is high, then holds up the output voltage until the second half of the next switching cycle, smoothing power flow to the load. The ideal on-time of the N-channel MOSFET changes as a function of input voltage. The on-time is determined as follows: t ON = K where K is typically 8-µs. The peak inductor current (assuming a lossless circuit) can be calculated from the following equation: I = K PEAK L The P-channel MOSFET (synchronous rectifier) turns on when the N-channel MOSFET turns off. The circuit operates at the edge of discontinuous conduction; therefore, the P-channel synchronous rectifier turns off immediately after the inductor current ramps to zero. During the dead time after the P-switch has been turned off, the damping switch connects and. This suppresses EMI noise due to LC ringing of the inductor and parasitic capacitance at the node (see Damping Switch section). The error comparator starts another cycle when falls below the regulation threshold. With this control scheme, the maintains high efficiency over a wide range of loads and input/output voltages while minimizing switching noise. Start-Up Operation The contains a low-voltage start-up oscillator (Figure 1). This oscillator pumps up the output voltage to approximately 1.7, the level at which the main DC- DC converter can operate. The 15kHz fixed-frequency oscillator is powered from the input and drives an NPN switch. During start-up, the P-channel synchronous I L I PEAK K t ON K - I PEAK = K L t OFF Figure 2. Switching Waveforms PDR TIMING CIRCUIT NDR START-UP OSCILLATOR P N (ON TIME) (DEAD TIME) (ON TIME) (DEAD TIME) rectifier remains off and its body diode (or an external diode, if desired) is used as an output rectifier. The minimum start-up voltage is a function of load current (see Typical Operating Characteristics). In normal operation, when the voltage at the pin exceeds 1.7, the DC- DC converter is powered from the pin (bootstrapped) and the main control circuitry is enabled. Once started, the output can maintain the load as the battery voltage decreases below the start-up voltage. To improve start-up capability with heavy loads, add a Schottky diode in parallel with the P-channel synchronous rectifier (from to ) as shown in Figure 3 (see Typical Operating Characteristics). t ON OR DEAD TIME IN t t L1 C Figure 3. External Schottky Diode to Improve Start-Up with Heavy Load 8

9 Shutdown Mode Pulling the SHDN pin low places the in shutdown mode (ISHDN = 2 typical). In shutdown, the internal switching MOSFET turns off, PFO goes high impedance, and the synchronous rectifier turns off to prevent the flow of reverse current from the output back to the input. However, there is still a forward current path through the synchronous-rectifier body diode from the input to the output. Thus, in shutdown, the output remains one diode drop below the battery voltage (). To disable the shutdown feature, connect SHDN (a logic input) to or. Reverse-Battery Protection The can sustain/survive battery reversal up to the package power-dissipation limit. An internal 5Ω resistor in series with a diode limits reverse current to less than 22mA, preventing damage. Prolonged operation above 22mA reverse-battery current can degrade the device s performance. TIMING CIRCUIT PDR DAMP NDR DAMPING SWITCH Figure 4. Simplified Diagram of Damping Switch P N P IN Power-Fail Comparator The has an on-chip comparator for power-fail detection. This comparator can detect a loss of power at the input or output (Figures 7 and 8). If the voltage at the power-fail input (PFI) falls below 614m, the PFO output sinks current to. Hysteresis at PFI is 2%. The power-fail monitor threshold is set by two resistors, R3 and R4, using the following equation: 1/div R3 = R4 x TH PFI where TH is the desired threshold of the power-fail detector, and PFI is the 614m threshold of the powerfail comparator. Since PFI leakage is na max, select feedback resistor R4 in the kω to 1MΩ range. Damping Switch The is designed with an internal damping switch to minimize ringing at the node. The damping switch (Figure 4) connects the node to, effectively depleting the inductor s remaining energy. When the energy in the inductor is insufficient to supply current to the output, the capacitance and inductance at form a resonant circuit that causes ringing. The damping switch supplies a path to quickly dissipate this energy, suppressing the ringing at. This does not reduce the output ripple, but does reduce EMI. Figures 5 and 6 show the node voltage waveform without and with the damping switch. 1 2µs/div = 2.5 = 3.3 Figure 5. Ringing Without Damping Switch (example only) 1/div 2µs/div = 1.8 = 3.3 Figure 6. Ringing With Damping Switch 9

10 Applications Information Output oltage Selection The operates with a fixed 3.3 or adjustable output. To select fixed-voltage operation, connect FB to (Figure 7). For an adjustable output between 2 and 5.5, connect FB to a resistor voltage-divider between and (Figure 8). FB regulates to Since FB leakage is na max, select feedback resistor R2 in the kω to 1MΩ range. R1 is given by: where REF = R1 = R2 x REF Maximum Output Current and Inductor Selection The is designed to work well with a 47µH inductor in most low-power applications. 47µH is a sufficiently low value to allow the use of a small surfacemount coil, but large enough to maintain low ripple. The Typical Operating Characteristics section shows performance curves with several 47µH and 22µH coils. Low inductance values supply higher output current but also increase ripple and reduce efficiency. Note that values below 22µH are not recommended due to switch limitations. Higher inductor values reduce peak inductor current (and consequent ripple and noise) and improve efficiency, but also limit output current. The relationship between current and inductor value is approximately: 1 I M x x K L x ( MAX) = 1 2 where M is an empirical factor that takes into account losses in the internal switches and in the inductor resistance. K is the -µs factor that governs the inductor charge time. Nominally, M =.9 and K = 8-µs. M should be further reduced by.1 for each ohm of inductor resistance. The inductor s saturation-current rating must exceed the worst-case peak current limit set by the s timing algorithm: K IPEAK = MAX L where KMAX = 11.2-µs. It is usually acceptable to exceed most coil saturation-current ratings by 2% with no ill effects; however, the maximum recommended IPEAK for the internal switches is 55mA, so inductor values below 22µH are not recommended. For optimum efficiency, inductor series resistance should be less than 15m/IPEAK. Table 1 lists suggested inductors and suppliers. Table 1. Suggested Inductors and Suppliers Murata TDK PIN Coilcraft Sumida INDUCTOR DS168C-223, DS168C-473 LQH4N47K, LQH3C47K CD43-22, CD43-47 NLC453232T-22K, NLC453232T-47K PHONE (847) (814) (847) (847) INPUT L1.87 TO 47µH, 2mA INPUT.87 TO L1 47µH C1 µf R3 PFI 3.3 C1 µf R3 PFI = 2 TO 5.5 R4 R5 C2 µf R4 R5 R1 C2 PFO PFO FB SHDN FB SHDN R2 Figure Standard Application Circuit Figure 8. Adjustable Output Circuit

11 Capacitor Selection Choose input and output capacitors to service input and output peak currents with acceptable voltage ripple. Capacitor ESR is a major contributor to output ripple (usually more than 6%). A µf, ceramic output filter capacitor typically provides 5m output ripple when stepping up from 1.3 to 3.3 at 2mA. Low input to output voltage differences (i.e., 2 cells to 3.3) require higher capacitor values (µf to 47µF). The input filter capacitor (CIN) also reduces peak currents drawn from the battery and improves efficiency. Low-ESR capacitors are recommended. Ceramic capacitors have the lowest ESR, but low-esr tantalums represent a good balance between cost and performance. Low-ESR aluminum electrolytic capacitors are tolerable, and standard aluminum electrolytic capacitors should be avoided. Capacitance and ESR variation over temperature need to be taken into consideration for best performance in applications with wide operating temperature ranges. Table 2 lists suggested capacitors and suppliers. Minimizing Noise and oltage Ripple EMI and output voltage ripple can be minimized by following these simple design rules: 1) Place the DC-DC converter and digital circuitry on the opposite corner of the PC board from sensitive RF and analog input stages. 2) Use a closed-core inductor, such as toroid or shielded bobbin, to minimize fringe magnetic fields. 3) Choose the largest inductor value that satisfies the load requirement, to minimize peak switching current and the resulting ripple and noise. 4) Use low-esr input and output filter capacitors. 5) Follow sound circuit-board layout and grounding rules (see the PC Board Layout and Grounding section). PC Board Layout and Grounding High switching frequencies and large peak currents make PC board layout an important part of design. Poor design can result in excessive EMI on the feedback paths and voltage gradients in the ground plane. Both of these factors can result in instability or regulation errors. The pin must be bypassed directly to, as close to the IC as possible (within.2 inches or 5mm). Place power components such as the, inductor, input filter capacitor, and output filter capacitor as close together as possible. Keep their traces short, direct, and wide ( 5 mil or 1.25mm), and place their ground pins close together in a star-ground configuration. Keep the extra copper on the board and integrate it into ground as a pseudo-ground plane. On multilayer boards, route the star ground using component-side copper fill, then connect it to the internal ground plane using vias. Place the external voltage-feedback network very close to the FB pin (within.2 inches or 5mm). Noisy traces, such as from the pin, should be kept away from the voltage-feedback network and separated from it using grounded copper. The evaluation kit manual shows an example PC board layout, which includes a pseudo-ground plane. Table 2. Recommended Surface-Mount Capacitor Manufacturers ALUE (µf) DESCRIPTION MANUFACTURER PHONE 4.7 to D-series tantalum TAJ, TPS-series tantalum Sprague AX to X7R ceramic TDK AX to 22 X7R ceramic Taiyo Yuden

12 Chip Information TRANSISTOR COUNT: 84 Package Information 8LUMAXD.EPS 12