Emerging VCSEL Technologies at Finisar

Transcription

1 Emerging VCSEL Technologies at Finisar D. Gazula, J. K. Guenter, R. H. Johnson, G. D. Landry, A. N. MacInnes, G. Park, J. K. Wade, J. R. Biard, and J. A. Tatum Finisar, Millennium Drive, Allen, TX ABSTRACT In this paper we will discuss recent results on high speed VCSELs targeted for the emerging GFC (Fibre Channel) standard as well as the now forming Gbps PCI express standard. Significant challenges in designing for reliability and speed have been overcome to demonstrate VCSELs with bandwidth in excess of Gbps. Keywords: VCSEL, vertical cavity laser, reliability, high speed modulation. INTRODUCTION In, the market for Fibre Channel (ANSI X.T) optical transceivers finally moved to Gbps (gigabits per second) transceivers as the default speed. The driving force behind the transition from Gbps to Gbps transceivers was the reduction in market price discrepancy between the two speeds, settling on a small premium for the higher speed device. This lesson was previously learned in the transition from Gbps to Gbps. The expansion of the Fibre Channel market to Gbps will also be driven when there is both sufficient need for higher bandwidth, and a relatively modest premium on the transceiver. The market evolution of the various speeds is shown in Figure. The Fibre Channel community has moved to make the transition to the higher speed as cost effective as possible. This was an improvement from the development of the Gbps Ethernet standard, where a bottoms up component view was not as effectively used, and has Market Share % % % % % % & Gbps Gbps Gbps Gbps Calendar Year Figure Speed evolution and forecast of the Fibre Channel Market in percentage of ports shipped. p led to more strict manufacturing windows and ultimately higher transceiver prices in comparison to Gbps. Specifically, the Fibre Channel standards body has agreed to reduce the required link lengths to m on OM (MHz*km bandwidth) fiber, which has allowed relaxation of several laser parameters, including rise/fall times (t r /t f ), Root Mean Square Spectral Bandwidth (RMSBW), Relative Intensity Noise (RIN) and launched optical power while maintaining reasonable requirements on the optical receivers. Additionally, the data encoding scheme has moved from the traditional B/B which would have required a line rate of approximately Gbps to the B/B methodology which reduces the data transmission line rate to approximately Gbps. This has added burden to the other layers in the communications link to handle both types of encoding, but has the synergistic effect of building off technology that has been developed to operate fiber channel protocols across Ethernet backbones. The links operating at Gbps are now found to be generally limited by the jitter tolerance of the host, and as such the standard now also includes the use of Clock and Data Recovery (CDR) circuits in the transceivers. For nm links, CDRs are required in both sides, while nm links, due to lower fiber dispersion, require a single CDR in the receiver. To illustrate the operating space further, Figure is a plot of the trade offs between RIN, RMSBW, and t r / t f calculated using the ubiquitous spreadsheet model. Table is a summary of the current relevant Fibre Channel author to whom correspondence should be addressed

2 specifications in FC-PI- as of December. Please note that these specifications are not finalized, and are subject to change. The FC-PI- document is expected to be completed in June. - Parameter Units Min Max Link Length m Link budget db. Wavelength nm RMS Spectral Width nm. Average Launch Power db -. Optical Modulation amplitude db -. Rise / Fall time ps TWDPo db. RINOMA db/hz - Unstressed Sensitivity db -. Stressed Reciveiver Sensitivity db -. Receiver Vertical Eye Closure db. Table Relevant Transmitter and Receiver specifications for fiber channel Gbps links RMS Spectral Width (nm) Fibre Channel Specification Figure Tradeoff between RIN (db/hz), RMSBW (nm) and t r /t f (ps) for m Gbps links The next increment in Fibre Chanel speed is GFC, and assuming B/B data encoding, this will have a line rate of Gbps. This is an interesting speed because of the convergence of data rates of Fibre Channel, Infiniband, Ethernet, OIF, and SONET in this general range of speeds. Finisar has previously demonstrated VCSELs with modulation bandwidths in excess of Gbps, and it is widely anticipated that VCSELs will be able to achieve commercial viability at more than Gbps, with reasonable link operating distance (more than meters) to cover the data center market. At this speed point, the use of Active Optical Cables (AOCs) may well prove to be a necessity to achieve low cost manufacturing.. VCSEL DESIGN AND MEASUREMENTS. Design Considerations The VCSELs described in this paper are grown by Metal Organic Chemical Vapor Deposition (MOCVD) and are of similar design to those reported previously grown by Molecular Beam Epitaxy (MBE). The active region contains three Gallium Arsenide quantum wells; current and optical confinement are accomplished with an oxidation layer in close proximity to the active area. The optical cavity, mirrors, and oxidation layer placement and shape were balanced amongst the competing concerns of manufacturability, high speed operation and reliability. A unique feature of the VCSEL described in this publication is the incorporation of an on chip resistive heater. The resistive heater is used to maintain the VCSEL die operational temperature above C, making the design of the VCSEL for high speed operation simpler. The heater also simplifies the requirements of the external control circuits to adjust the modulation and bias currents over wide temperature operating regimes. The principle challenges to incorporating the resistive heater element are to minimize any parasitic electrical effects (typically a capacitive coupling to the heater), designing a resistor process compatible with VCSEL manufacturing, and maximizing the temperature increase for a given electrical power input. Previous approaches to incorporating resistive heating elements focused on wavelength tunability, and therefore suffered from non optimal design for high speed or process optimization. The resistor heating element is formed in the p- mirror of the VCSEL structure, and is isolated form the PN junction by complete oxidation of the same layer used to form the current and optical aperture. Lateral confinement of the resistor is accomplished using proton implantation. The resistance is controlled by the width of the implant region, and for uniform heating, is formed as a circular arch around the active area. The thermal efficiency of the heater to the VCSEL is obtained by measuring the center wavelength change of the VCSEL as a function of ambient temperature (Δλ/ΔT) and of heater power dissipation (Δλ/ΔP R ) of the resistor and dividing to obtain the change in VCSEL temperature with resistor power dissipation (ΔΤ/ΔP R ). For this

3 design, we find ΔΤ/ΔP R = C/W. The heating efficiency is a critical parameter in VCSEL design because of the limitation on the total power dissipation in Small Form Factor Pluggable (SFP) transceiver to be under Watt total. Figure shows the potential benefit of the heater, which is an optical eye diagram at -C without (A) and with (B) an external (TO can level) heater element operating. A B Figure Optical eye diagram without the heater (A) and with the heater (B).. Equivalent Circuit Modeling To model the electrical and optical characteristics of the VCSELs, we have used a bulk electrical circuit model to fit the S reflectance curve, with a deviation to the often cited equivalent circuit. The S characteristic is generally described using the circuit shown in Figure A. However, this model is more physically suited to an edge emitting laser, and we find it more physically intuitive to utilize the model shown in Figure B, which includes the effects of the lateral carrier resistance but is a simplified model from the one we previously described. C PAD R S C J A R J C PAD R P C JOX R P Figure Equivalent circuit model used to fit the complex electrical reflectance measurements R L B The model described in Figure B has the following components: the VCSEL bond pad capacitance, C PAD, the p- mirror distributed resistance components R P, R P and R L, the combined junction (outside the lasing radius) and oxide capacitance C JOX and the n-mirror resistance R N. The principal differences in the models described in figures A and B are the inclusion of the distributed ladder network to describe the p-mirror and the removal of the junction resistance, which is essentially an artificial construct used to create a single pole network in the more simplified model of figure A. Also shown in figure is an arrow representing the current element used to model the optical output. Figure is a typical plot of the measured and fit S and S parameters at room temperature and ma bias current. The extracted circuit values are R P = Ω, R P = Ω, R L = Ω, C PAD =.pf, and C JOX = pf.. VCSEL RELIABILITY CONSIDERATIONS Reliability is not a single thing. Despite the ubiquity of simple reliability acceleration models, actual VCSEL degradation can proceed along different paths, depending on fabrication, operating setpoint, and ambient conditions. This is true even after random or maverick failures are eliminated. Furthermore, since higher speed operation almost invariably means higher current density and higher average temperature, the details of what is usually called

4 Normalized S (db) Measured S Parametric Fit S-A Parametric Fit S-B Normlized S (db) Measured Dembedded-A Deembedded-B Figure Normalized S and S of a typical Gbps VCSEL wearout reliability are increasingly important in high-speed designs, as is a clear understanding of how those details affect the modulation performance. Degradation as measured in dc reliability tests at high temperatures and currents is the only realistic way to generate meaningful wearout reliability statistics and to compare groups, but it is not necessarily the same as what will be observed in actual applications. For comparison purposes, reliability is often computed by the time to reach some fraction of initial power as measured at a single defined test current and temperature, regardless of the current and temperature employed for the accelerated aging. This provides a measure of fundamental VCSEL degradation, independent of application; we will call this measure nominal degradation below. A VCSEL with a nominal degradation of db (a common definition of end of life in reliability tests) has % reduced power at the test current, but will have greater or lesser power change at other measurement conditions. Nominal power degradation can be due to slope efficiency changes, threshold current changes, or more commonly a combination of both. While the fraction of any power change that is due to one cause or the other will vary Signal modulated from P to P (mw) over time and with operating conditions, for simplicity in the examples below we assume constant fractions. The physics that govern wearout degradation and its various contributions will not be discussed below, only their consequences in modulation - performance and lifetime. Depending on how the VCSEL is operated, modulation performance may degrade very differently. All of the considerations for power - degradation still apply, but in addition one must be concerned with effects on modulation amplitude, proximity of the low level of the modulation to threshold, the effect increasing threshold has on - overshoot, and other characteristics. ER = log(p /P ) -. Frequency (GHz) OMA = log(p -P ) AOP = log[(p +P )/] Figure Modulation space for a device driven between two optical power levels, P and P. Contours of constant optical modulation amplitude plotted in average optical powerextinction ratio space. - Frequency (GHz) One way useful way to visualize the modulation space is the plot of figure. In the plot, P and P are the optical powers at the minimum and maximum of the electrical modulation, the x-axis is average optical power in dbm (AOP), the y-axis is extinction ratio in db (ER), and contours of constant optical modulation amplitude in dbm (OMA) extend from upper left to lower right. (Obviously, only two of the three characteristics need be specified to uniquely identify the third. In most modern standards, OMA and AOP are specified, but sometimes ER limits are also applied, further limiting the allowed operating space.) If the ideal combination of OMA and AOP meant setting the bias and modulation currents to place a

5 device in the middle of the modulation space plot, subsequent degradation would generally alter at least one of the three plot parameters. If maximum modulated power were the only consideration, one would design for the upper right diagonal, but in reality there are limitations in all directions imposed either by specifications, by physics, or by both. Motion in any direction will either directly result in a specification violation for one of the three parameters or degrade performance and indirectly result in a violation of another specification. If a VCSEL is set up to have a given AOP and ER near the center of this space, how will it move as it degrades? The answer depends on the VCSEL starting characteristics, on how much of the degradation is due to slope efficiency (the remainder due to threshold current change), and to how if at all the VCSEL driver compensates for changes in VCSEL performance as it degrades. There are basically three types of drivers: constant current (CC), automated power control (APC), where the bias current is changed in response to detected average optical power from the VCSEL, and APC with current clamp (APCC), where some maximum current is never exceeded regardless of VCSEL power. (We ignore temperature coefficients that real drive currents often incorporate even in CC drive circuits, so each plot in this section applies to a single ambient temperature.) These different approaches can lead to significant differences in the degradation trajectory in modulation space, leading to different kinds of module performance degradation for the same amount of fundamental VCSEL degradation. The matrix of plots in Figure shows just how different these performance changes can be. (Refer to Figure for interpretation of axes and contours.) In each plot the starting point is at - dbm AOP and a little less than db ER. The VCSEL begins life with -ma threshold current and. W/A (coupled) slope efficiency. The current clamp is set at ma. The typical mix at nominal degradation is assumed to be % due to slope efficiency. The dark blue line traces the VCSEL through modulation space up until the time the nominal degradation is db, at which point the line changes to a lighter blue, continuing to db, an extremely degraded condition. This example is artificial, not exactly matching any actual Finisar device, but it shows the nature of degradation trajectories and how they vary. The plots assume that modulation speed is in the gigahertz range, very much faster than the thermal time constant. CC APC APC with current clamp Degradation all due to threshold Degradation all due to slope efficiency Degradation due to typical mix Figure Degradation in modulation space for three different modes of operation, and where VCSEL power degradation is due to changes in threshold current, slope efficiency or a : combination of the two. In each plot, dark blue shows from to db of VCSEL degradation, light blue from to db.

6 Several distinctions are immediately obvious. If the VCSEL degrades only due to threshold changes, ER remains constant or increases, regardless of driver type. If the VCSEL degrades only due to slope changes, ER remains constant or decreases, regardless of driver type. If both changes contribute to degradation, behavior is intermediate: ER can increase or decrease, or both, depending on driver type. Threshold-only degradation always maintains a constant OMA, while slope-only degradation always decreases OMA. When both contribute to degradation OMA decreases, but by a lesser amount. Once the clamp current is reached in APCC, subsequent degradation follows the curve it would for CC operation at the clamp current. Assuming that other considerations do not preclude it, pure APC operation keeps the VCSEL nearest its modulationspace starting point, regardless of the type of degradation. In addition, when slope degradation moves the VCSEL in APC, its effect is to slowly decrease ER, generally the change least likely to break a data link. While specifications may be violated by motion in any direction, increasing extinction ratio is the most likely to degrade the eye due to its effect on overshoot and on data dependent jitter. If degradation is due to threshold increase, both AOP and ER remain constant, but the number of threshold multiples decreases, increasing the overshoot and reducing the speed. This notably deleterious effect cannot be shown as a trajectory on the modulation space plot. Over the time up to the nominal degradation limit, APC leads to the best retention of modulation performance. It compensates for some of the deleterious effects of aging, and so it is often assumed that it results in longer module life. While this is true in a general sense, the actual lifespan extension, if any, depends on the nature of the wearout degradation: the difference between degradation due to threshold increase and that due to slope efficiency decline is significant. The earlier figures showed trajectories through modulation space, up to specified nominal degradation, but they said nothing about how long that degradation took. Figure shows the degradation trajectories of various characteristics through time. Each curve in Figure C corresponds to a different fraction of nominal degradation due to slope efficiency, with the dashed curve in each case representing % and subsequent curves decreasing that fraction in % steps until the last curve, which represents nominal degradation entirely due to threshold current change. The vertical gray line in each plot is the time to db of nominal degradation. Because different operating conditions so dramatically affect the rate of degradation the curves should be interpreted as normalized to the db nominal degradation time; thus interpreted, these plots encompass the entire span of possible operating conditions. CC APC Emitted power Threshold Slope Bias ER OMA Time>> Figure Trajectory of VCSEL degradation in CC and APC with different fractions of degradation due to SE or threshold current. Dashed curve is always % degradation due to SE. Other curves,,, and % due to SE, remainder due to threshold. Vertical gray line is time to db power degradation at fixed nominal operating current. ER and OMA axes linear in these plots. The APC advantage in retaining modulation performance comes at a price. The fundamental VCSEL degradation rate increases rapidly as the APC loop increases current to compensate for past degradation, so nominal end of life from the VCSEL chip perspective is always reached earlier in APC operation. Whether module lifespan is increased or decreased depends on the sensitivity to the characteristic that is changing and the relative fractions of the VCSEL degradation due to slope efficiency and to threshold current changes. For example, if the relevant modulation characteristic is most sensitive to threshold increase relaxation oscillation frequency and damping, say then if VCSEL degradation is due entirely to slope efficiency change there is no modulation degradation even when nominal VCSEL degradation is at the defined end of life condition, but if VCSEL degradation is due to threshold change the module lifetime is a small fraction of the nominal VCSEL lifetime. If, however, the relevant modulation characteristic is most sensitive to slope efficiency decrease OMA, for example then exactly the opposite is true: VCSEL degradation due to slope efficiency

7 change makes the module lifetime a small fraction of the nominal VCSEL lifetime. Real cases always fall between these extremes, requiring a careful balance between VCSEL degradation sources at different conditions and the effects of the differences on multiple modulation characteristics. Reliability is definitely not a single thing.. PHOTODIODE DESIGN AND MEASUREMENTS. Design Considerations for High Speed Operation Often overlooked as the easier of the two opto-electronic components in an optical link, the photodiode design limitations begin to become a practical limitation as the speed increases. The tradeoffs come primarily in maintaining high optical bandwidth, high responsivity, low electrical parasitics, large active area, and operation at ever increasing temperatures. To maintain a high optical bandwidth requires a reduction in the intrinsic absorbing region thickness, which reduces responsivity and increases the capacitance. Similarly, the desire for a large active area to allow for more tolerant optical alignment increases the junction capacitance. Figure shows the trade offs that must be made in designing a detector for high speed operation. The optical bandwidth as a function of the ambient temperature and undoped absorbing region thickness is plotted in Figure (A). In order to achieve sufficient optical bandwidth (typically > GHz for a Gbps system) the design is pushed to a lower active area thickness. However, there is a practical limit as shown in Figure (B) where the optical bandwidth is shown as a function of the detector responsivity and the detector capacitance. The move to thinner absorbing region increases the junction capacitance (reducing the net bandwidth somewhat) and reduces the responsivity, which has a direct effect on the overall receiver sensitivity and the allowable optical link budget. Careful matching of these trade offs to the transimpedance amplifier design is critical to manufacture a robust optical receiver. Active Area thickness (um) >GHz <GHz <.GHz <GHz <.GHz <GHz. - Temperature (C) Responsivity (A/W)... <.GHz <.GHz <.GHz <.GHz <.GHz >.GHz. Capacitacnce (ff) Figure Contour plots of (A) optical bandwidth as a function of temperature and thickness, and (B) optical bandwidth as a function of capacitance and responsivity

8 . Photodiode Measurements and Modeling S (db) Corrected Optical - Bandwidth - - Diameter μm - μm - μm μm - μm - Uncorrected Frequency (GHz) Figure As measured optical bandwidth and the corrected optical bandwidth of several diameter PIN detectors The Photodiodes were fabricated as common P-I-N devices with an intrinsic region thickness of approximately μm and incorporating multiple active region diameters in processing. The photodiode electrical parasitics were minimized by using a contact K-A-K configuration, which also maximizes the immunity to electrical noise. The frequency response (S parameters) of the various diameter devices were tested on wafer at multiple bias voltages and temperatures using a calibrated optical lightwave component measurement system. The measured S was used to correct the measured S to obtain the optical bandwidth of the PIN structure. The result is shown in figure. An optimal receiver design point is when the total bandwidth is shared evenly between the photodiode and the TIA. For a Gbps data system, the minimal desired optical bandwidth is then.ghz. Here we show an optical db bandwidth of GHz. The electrical parasitic effects of the bond pad and wire bond can be matched to the TIA for optimal signal transfer.. CONCLUSION In this paper, we have described some of the practical considerations for achieving high speed VCSELs and photodiodes with a focus on the emerging Gbps Fiber Channel specification. The VCSELs described here and previously are more than capable of meeting the performance requirements set forth by the standard, and offer excellent prospective to meet the forthcoming convergence of several communications standards at Gbps.. ACKNOWLEDGEMENTS The authors would like to thank David Granville and Johnny Kennedy for careful measurements of VCSELs and Detectors. REFERENCES [] [] [] [] [] [] [] [] Light Counting market forecast The spreadsheet and documentation can be found at Specifications can be found at R. Johnson, D. Kuchta, Gb/s Directly Modulated nm Datacom VCSELs, Proceedings of CLEO/QELS, paper CPDB, Optical Society of America, J. Guenter, B. Hawkins, R. Hawthorne, R. Johnson, G. Landry and K. Wade, More VCSELs at Finisar, Proc. SPIE vol., Ed. by K. D. Choquette and C. Lei,. S. Yang, J. Son, Y. Hong, Y. Song, H. Jang, S. Bae, Y. Lee, G. Yang, H. Ko, and G. Sung, Wavelength Tuning of Vertical Cavity Surface Emitting Lasers by Internal Device Heater, IEEE Phot. Tech. Lett., vol., pp.-,. C. J. O Brien, M. L. Majewski, A. D. Rakic, A Critical Critical Comparison of High-Speed VCSEL Characterization Techniques, IEEE Journ. Light. Tech., vol., pp.-,. J. K. Guenter, J. A. Tatum, A. Clark, R. S. Penner, R. H. Johnson, R. A. Hawthorne, J. R. Baird, and Y. Liu, Commercialization of Honeywell s VCSEL Technology: Further Developments, SPIE Proc., Ed. by K. D. Choquette and C. Lei,.