Disclosure to Promote the Right To Information

Transcription

1 इ टरन ट म नक Disclosure to Promote the Right To nformation Whereas the Parliament of ndia has set out to provide a practical regime of right to information for citizens to secure access to information under the control of public authorities, in order to promote transparency and accountability in the working of every public authority, and whereas the attached publication of the Bureau of ndian Standards is of particular interest to the public, particularly disadvantaged communities and those engaged in the pursuit of education and knowledge, the attached public safety standard is made available to promote the timely dissemination of this information in an accurate manner to the public. ज न1 क अ+धक र, ज 1 क अ+धक र Mazdoor Kisan Shakti Sangathan The Right to nformation, The Right to Live प0र 1 क छ ड न' 5 तरफ Jawaharlal Nehru Step Out From the Old to the New S (1979): Detail specification for digital integrated circuits, Part 1: Nand gate, TTL, Section 3: Triple 3 input, positive [LTD 5: Semiconductor and Other Electronic Components and Devices]! न $ एक न' भ रत क +नम-ण Satyanarayan Gangaram Pitroda nvent a New ndia Using Knowledge! न एक ऐस खज न > ज कभ च0र य नहB ज सकत ह ह Bhartṛhari Nītiśatakam Knowledge is such a treasure which cannot be stolen

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4 UDC : S : 9414 ( Part /Set 3 ) ndian Standard m 1 DETAL SPECFCATON FOR DGTAL NTEGRATED PART NAND GATE, TTL Section 3 Triple, 3 nput, Positive CRCUTS 1. Scope -Covers two types of NAND gates based on their operating temperature range and other electrical characteristics ( Type l* and Type 2T ) are covered by this standard. 1.1 Refer to S: 7441 ( Part )-1974 Essential ratings and characteristics of digital integrated circuits: Part General format. 1.2 The assigned type number shall be prominently displayed on the device. 2. Description Category of device Digital combinatorial Configuration Transistor-transistor-logic ( TTL ) Function Positive NAND gate Gates per package Three nputs per gate 3 nputs Outputs per gate 1 output Technology used Bipolar Constructional detail Monolithic Material Silicon 3. Outlines and Connections 3.1 Outlines and Encapsulation Type of Device Outline Encapsulation Type 1 Under consideration Ceramic Type 2 S:5000(DD15)-1973* Ceramic or plastic *Dimensions of semiconductor devices and integrated circuits: Device outline OD logic Diagram and Connections -The logic diagram and the connections shall be as given in?g , FG. 1 PN CONNECTONS 1. Functional Specification 1.1 Block Diagram -The block diagram is shown in Fig. 2. *Type 1 corresponds to commercial type5410. ttype 2 corresponds to commercial type 7410.,...,w Adopted 13 August July 1980, S NDAN STANDARDS NSTTUTON MANAK BHAVAN, 9 BAHADUR SHAH ZAFAR MARG NEW DELH 1100G2

5 S : 9414 ( Part /&c 3) FG. 2 BLOCK DAGRAM 4.2 Schematic Diagram ( Each Gate ) -The typical schematic diagram of a typical gate is shown in Fig. 3. * OUTPUT FG. 3 SCHEMATC DAGRAM Note -The components and values are given only as an example The details of schematic diagram should always be specified or indicated by the manufacturer. 4.3 Function -See Table 1. TABLE 1 FUNCTONS nput 1 nput 2 input 3 (1) (2) (3) H H H output (4) L Note - All other combinations of H and L at the input given H output. H = High state, most positive ( least negative ). L = LOW state, least positive ( most negative ). 5. Rating (Absolute Maximum ) 5.1 Electrical Ratings Rating Value r h ) Max Min Remarhs Su;$y voltage nput voltage VN +7.0 v v v v ( At high level input current 11~ of 12 ma Max ) 1 1 These voltages are with respect to ground terminal 2

6 S : 9414 ( Part /Set 3 ) Conditions for recommended operation (a) Supply voltage Type of Device Supply Vcltage Vcc r h _-~ Min Nom Max Type o 5.5 Type (b) Output loading capability ( fan out ), N = 10 Max DC noise margins M, = VHA - VOHA = Not applicable M2 = L/OHEi - VlH3-400 mv M3 = VlLF3 - VOLA = 400 mv M4 = VOLE - V LB El Not applicable Note - For explanation of the symbols given above, refer to 10.1 of S : 7441 ( Part ) Temperature Ratings a) Operating temperature Type 1-55 C to +125 C Type 2 0 C to +70 c b) Storage temperature Type 1 and Type 2-65 C to +15O C c) Junction temperature Type 1 Type C d) Thermal resistance ( juncfion to case ) Type %/m W Type C/m W 5.3 Power Dissipation ( Typical) Type 1 40 mw/gate at 50 percent duty cycle Type 2 10 mw/gate at 50 percent duty cycle 5.4 Marking - Refer 6 of ndian Standard general requirements and classification of tests for micro circuits ( under preparation Electrical Characteristics - Refer S : (?414 ( Part l/set 1 )-979 Detail specification for digital ntegrated circuits: Part Nand gate, TTL, Set 1 Single, 8 input, positive, 7. Environmental Data - Refer S : 9414 ( Part /Set 1 ) Tests--Refer S : 9414 ( Part /Set 1 ) Printed at New ndia Prlntlng Press, Khurja. ndia