Multi-level Arc Fault Circuit Interrupter with Collaborative Communications for Smart Grid

Transcription

1 Multi-level Arc Fault Circuit Interrupter with Collaborative Communications for Smart Grid HyungSeok Kim, SeongWoo Kim, GiPoong Gwon, DongRyul Lee, and SeungWoo Seo Department of Electrical Engineering and Computer Sciences Seoul National University Sanion Co., Ltd., Seoul, South Korea {swkim, Abstract An arc fault circuit interrupter (AFCI) is a device that provides protection from the effects of arc faults by deenergizing a circuit within a specified time after an arc fault is detected. In the United States, AFCI installation in bedroom receptacle outlets has been mandated since As AFCIs have been widely adapted to real situations, several kinds of AFCIs have been developed including branch/feeder, cord, outlet box, and portable designs. Using various types of AFCIs creates a hierarchy consisting of multi-level AFCIs such as a portable AFCI serially connected to an outlet box AFCI. This multilevel AFCI structure causes a serious problem by enabling an upper level AFCI to detect an arc fault occurring in the surveillance area of lower level AFCIs. This problem results in de-energizing the whole area covered by the upper level AFCI. In this paper, we propose a solution to the multi-level AFCI problem that occurs when several types of AFCIs are used in the same hierarchy. To provide a practical solution, we first present the theoretical background of a multi-level AFCI and suggest a solution that integrates collaborative communication and computing power into a conventional AFCI device. Finally, we introduce a prototype implementation of our approach. Our proposed approach can protect people and facilities against electrical fire hazards, which is one of major challenges that the smart grid aims to overcome using information technology. I. INTRODUCTION The Smart Grid is a technology intended to enhance the stability and security of power systems by providing optimal electric power to the right place at the right time, thereby protecting people and property from fire hazard caused by electrical faults, and increasing the dependability and quality of electricity. The smart grid works by integrating information technology including computer, communication, and network technologies into conventional electrical power systems. Numerous Smart Grid studies have been conducted by industry and academia recently. In this paper, we attempt to enhance fire safety, specifically with respect to electrical fires caused by arc faults [2], by integrating computer and communication technologies into conventional electrical safety devices. According to survey data from a major insurance company, up to 40,000 home fires can be associated with arcing and sparking. More than 350 people die and over 1,400 are injured each year in these fires. Property losses are well over 500 million dollars per year [1]. rmal circuit breakers open only in the presence of a short, and may not trip before a fire has begun due to arcing. Gregory et al. [3], [4] introduced an arc fault circuit interrupter (AFCI) intended to mitigate the effects of arcing by de-energizing the circuit when an arc fault is detected. Since then, the AFCI has been standardized [6] and commercially developed. Consequently, in the United States, AFCI installation in bedroom receptacle outlets has been mandated since Jan. 1, Several kinds of AFCIs have been developed and extensively adapted in practical applications [5]. For example, a branch/feeder AFCI is a device intended for installation in a cabinet panel to protect distribution circuits and power lines. A cord AFCI is a plug-in device intended for an outlet connection, and an outlet box AFCI is installed as an outlet box. Residential houses and other facilities can also have more than one outlet containing an AFCI. Thus, as various AFCIs are used in various ways, a hierarchy between AFCIs can be established. For example, consider a portable AFCI connected to an outlet as a plug-in. In this case, the AFCI hierarchy consists of two AFCIs. In contrast to an unintentional hierarchy, an intentional AFCI hierarchy can provide intelligent protection for spacious facilities. The AFCI hierarchy causes a significant problem by enabling more than one AFCI to detect an arc fault, which typically causes unwanted areas to be de-energized. Hence, we aim to minimize de-energized areas by integrating communication and computing power into a conventional AFCI system, specifically by employing collaborative communication between AFCI devices. Our contributions from this study are summarized as follows: 1) The multi-level AFCI problem was analyzed in detail. 2) We proposed a solution to resolve the arc fault multidetection problem of multi-level AFCIs using collaborative communication between conventional AFCI systems. 3) We successfully implemented a multi-level AFCI prototype based on our approach, and introduced its specifications and protocols in detail. Our proposed approach can protect people and facilities against electrical fire hazards, which is one of major challenges that the smart grid aims to overcome using information technology. The remainder of this paper is organized as follows. Section II describes the arc fault analytically with single level AFCI

2 Current (Amp) i 0 ' i K 0 arc i0 Ideal current Arc current Time (a) Fig. 1. (b) Single level AFCI. Fig. 2. Shoulder effect caused by arc faults. The AFCI can detect arc faults by measuring current drop of as much as K arci 0. examples. Section III deals with the problem of multi-level AFCI adoption and provides theoretical solutions. Section IV provides detailed information for practical implementation. Section V presents our conclusions. II. SINGLE-LEVEL AFCI In this section, we present a theoretical background that describes how a conventional single level AFCI detects an arc fault and opens the circuit. A. rmal operation in single level AFCI circuit Figure 1(a) shows normal circuit operation connected with V AC220V without arc faults. The relationship between current, voltage, and impedance is represented by V 0 = i 0 (1) where i 0 and V 0 are the current and voltage of AFCI 0, respectively. Impedance is a time-varying function according to the characteristics of load or user manipulation; however, we assume that is time-invariant for simplicity. B. Arc fault in single level AFCI circuit Figure 1(b) shows a circuit in which an arc fault occurs. With respect to voltage, the following equality is established: V AC220V = V 0 = 0. (2) From the viewpoint of AFCI 0 in Fig. 1(b), the relationship between 0, i 0,, and arc impedance is as follows: 0 = i 0( + ). Although is also a time-varying function, we used instead of (t) for simplicity. From Eqs. (1) and (2), V 0 = V 0 = i 0. Therefore, we can derive Then, i 0 is given by i 0 = By substituting follows: i 0 = i 0( + ). i 0 = (1 )i into K arc, we can derive i 0 as i 0 = (1 K arc )i 0. (3) Consequently, when an arc fault occurs, the current difference due to the arc fault is K arc i 0 at the AFCI 0. This appears as a shoulder effect with high frequency noise, as shown in Fig. 2. The AFCI can detect arc faults by measuring the current difference K arc i 0 as shown in Fig. 2. III. MULTI-LEVEL AFCI In this section, we introduce a multi-level AFCI circuit, and describe why it is not straightforward to make the multi-level AFCI to work well, by using a circuit example consisting of one upper level AFCI and four lower level AFCIs. A. rmal operation in multi-level AFCI circuit Figure 3 shows a multi-level AFCI circuit connected to 220 V alternating current (ac) without arc faults. We derive the relationship between components as follows: V 0 = V 1 = V 2 = V 3 = V 4 = V AC220V (4) i 0 = i 1 + i 2 + i 3 + i 4 (5) 1 = Z Z Z 4. (6) In Eq. (6), is a compound resistance. From the viewpoint of AFCI 1 4, the relationship between voltage, current, and impedance is satisfied by V 1 = i 1,, V 4 = i 4 Z 4. (7) Accordingly, by Eqs. (1), (4), and (7), the following equality is established: i 0 = i 1 = i 2 Z 2 = i 3 Z 3 = i 4 Z 4. (8) B. Upper level arc fault in multi-level AFCI circuit Figure 4 shows a situation in which an arc fault occurred at the upper level in a hierarchical circuit. The relationship between components in AFCI 0 is the same as that described by Eqs. (4) to (6). From the point of view of AFCI 1 4, the following equality is satisfied: 1 = i 1,, 4 = i 4Z 4. (9) Since the structures of AFCI 1 4 are the same, we can analyze AFCI 1. Because the impedance of a serial arc fault occurred between the upper level and lower level (viz., in Fig. 4),

3 Fig. 3. rmal circuit operation of a multi-level AFCI circuit consisting of one upper level AFCI and four lower level AFCIs. Fig. 4. Arc fault occurred between AFCI 0 and AFCI 1 4 ; i.e., at, in the multi-level AFCI circuit. a voltage drop occurred. This phenomenon can be formulated as follows: 1 = 2 = 3 = 4 = 0 i 0. Using Eqs. (2) and (4), 0 = V 0 = V 1, therefore 1 = 0 i 0 = V 1 i 0. We can say V 1 = i 1 and 1 = i 1 by Eqs. (7) and (9), so i 1 = i 1 i 0. By Eq. (3), i 0 = (1 K arc )i 0, and we can derive i 1 = i 1 (1 K arc ) i 0. If we organize above Eq. with respect to i 1, then i 1 = i 1 (1 K arc) i 0 = i 1 (1 K arc) i 1 = (1 (1 K arc) + )i 1 = (1 )i 1 + = i 1 = (1 K arc )i 1. (10) + Equation (10) shows that the lower level arc fault detector can detect an arc fault occurring in the upper level. Table I shows the arc fault detection possibility and AFCI list which must be opened when an arc fault occurs in the area of the upper level of a multi-level AFCI circuit. C. Lower arc fault in multi-level AFCI circuit Figure 5 shows a situation in which an arc fault occurs at a lower level in the hierarchical circuit. We can first derive the relationship between components as follows: 0 = 1 = 2 = 3 = 4 = V AC220V (11) 0 = (12) 1 1 = Z 2 Z 3 Z 4 As we considered in Section II-B, from the viewpoint of AFCI 1, V 1 = 1( + ) 1 = (1 K arc)i 1. (13) In this context, K arc is defined as follows: K arc = + From the viewpoint of AFCI 2 4, the relationship between and V 2 4, 2 4 and Z 2 4 is described as follows: 2 = 2Z 2, 3 = 3Z 3, 4 = 4Z 4. Moreover, by Eqs. (4) and (11), the relationship between 2 4 and 2 4 is 2 = V 2, 3 = V 3, 4 = V 4 2 = i 2, 3 = i 3, 4 = i 4 (14) This means that the arc fault that occurred in the area covered by AFCI 1 does not affect AFCI 2 4 which is based on the assumption that their power supplies are infinite. TABLE I DE-ENERGIZING LIST AND DETECTION PROBABILITY voltage current detection should be possibility opened AFCI 0 V 0 (1 K arc )i 0 Y Y AFCI 1 V 1 (1 K arc )i 1 Y N AFCI 2 V 2 (1 K arc )i 2 Y N AFCI 3 V 3 (1 K arc )i 3 Y N AFCI 4 V 4 (1 K arc)i 4 Y N

4 Fig. 6. Single level AFCI embedding micro-controller and communication functionality. Start Fig. 5. Arc-fault occurred at between AFCI 0 and AFCI 1 in the multi-level AFCI circuit. Initialization w, we derive the current of AFCI 0, 0. If we subtract Eq. (12) with Eq. (5), i 2 4 and 2 4 are removed from Eq. (14). Consequently, 0 i 0 = 1 i 1. If we organize the preceding expression with respect to 0, then 0 = i 0 + (1 K arc)i 1 i 1 = i 0 K arci 1 = (1 K arc)i 0. (15) Equation (15) means that AFCI 0 can detect an arc fault occurring between AFCI 1 and. However, if AFCI 0 opens its circuit, the whole area covered by AFCI 0 is de-energized including AFCI 2, AFCI 3 and AFCI 4. In this case, it is good enough to open the circuit of AFCI 1 for minimizing deenergized areas. Thus, an arc fault should be dealt with the least level AFCI among AFCI detecting the arc fault. Table II shows the arc fault detection possibilities and the AFCI list which has to be de-energized when the arc fault occurs in the lower level area of a multi-level AFCI circuit. From the viewpoint of implementation, a higher AFCI which detects an arc fault can decide whether to open its circuit, after receiving signals from its lower level AFCIs. Hence, communication functionality and processing power are necessary to deliver such signals. TABLE II DE-ENERGIZING LIST AND DETECTION PROBABILITY voltage current detection should be possibility opened AFCI 0 V 0 (1 K Z 1 arc)i 0 Y N AFCI 1 V 1 (1 K arc 1 Y Y AFCI 2 V 2 i 2 N N AFCI 3 V 3 i 3 N N AFCI 4 V 4 i 4 N N Fig. 7. Arc-fault detection? Arc-fault type Waiting time calculation & detection report Control msg received? Waiting time expired? Serial Arc-Fault Parallel Arc-Fault Break the circuit Control msg Message type Waiting msg Sequence diagram for implementing the multi-level AFCI. IV. IMPLEMENTATION OF MULTI-LEVEL AFCI In this section, we present a multi-level AFCI implementation of our approach with detailed specifications and an embedded protocol. To implement a multi-level AFCI, we built a single level AFCI embedding micro-controller and communication functionality. We used a Texas Instruments 16 MHz MSP bit MCU (Microcontroller Unit) equipped with 116 Kbyte flash memories and 8 Kbyte random access memory (RAM). Communication was conducted through a RS-232C at 8400 bps. Our implementation of the single level AFCI is shown in Fig. 6. Figure 7 shows a sequence diagram for implementing the multi-level AFCI using this single level AFCI. The details of the difference between serial arc and parallel arc shown in Fig. 7 are explained in [4]. Figure 8 shows an experiment with the multi-level AFCIs. The assumptions and time parameters in our design are defined as follows: 1) An arc fault is caused from load current. Therefore, if

5 Fig. 8. Real-experiment with the multi-level AFCIs. between arc detection and the time when its current is actually de-energized. 3) Signal Waiting Time: This means the remaining time after the AFCI detects an arc fault, which can be calculated from subtracting the de-energizing delay time from the de-energizing time. Based on the received messages from other AFCIs through collaborative communications, the AFCI can decide whether open the circuit or not during this signal waiting time. Additionally, from the analysis results described in Sections III-B and C, we can create an activity table; i.e., describe how the AFCI must be operated based on its measurement data or received data from other AFCIs. Table III is an example in which an arc fault occurred in the surveillance area of AFCI 1. In this case, AFCI 0 and AFCI 1 detected the arc fault at the same time, but only AFCI 1 was required to open the circuit. (More tables can be constituted, but we omit these due to space limitations.) V. CONCLUSION In this study, we analytically and experimentally investigated multi-level AFCI problems. We propose a solution to resolve the arc fault multi-detection problem of multi-level AFCIs using collaborative communication in conventional AFCI systems. We successfully implemented a multi-level AFCI prototype, and we provided specifications and embedded protocols. Our proposed approach can protect people and facilities against electrical fire hazards, which is one of major challenges that the smart grid aims to overcome by using information technology. Fig. 9. Arc test clearing times. Solid line and dotted line represent TC (Time-Current) curves with respect to 20 A and 15 A, respectively. load current does not exist, the AFCI does not detect an arc fault. 2) The probability that an arc fault occurs in several lines at the same time is quite low. 3) When an arc fault occurs in the load of an AFCI, the AFCI detects it 100% percent. 4) There is no cross talk between AFCIs when an arc fault occurs. Based on the preceding assumptions, we define the following time parameters: 1) De-energizing Time: Using the table from UL (Underwriters Laboratory) 1699 [7], the AFCI must open the circuit within a specified time after the arc fault is detected. The time is the arc test clearing time shown in Fig. 9. 2) De-energizing Delay Time: This means the time taken REFERENCES [1] Arc fault circuit interrupters (AFCI) reduce fire hazards. [Online]. Available: [2] T. Gammon and J. Matthews, Instantaneous arcing-fault models developed for building system analysis, IEEE/ACM Transactions in Industry Applications, vol. 37, no. 1, pp , Jan/Feb [3] G. D. Gregory and G. W. Scott, The arc-fault circuit interrupter: an emerging product, IEEE/ACM Transactions in Industry Applications, vol. 17, no. 5, pp , Sep/Oct [4] G. D. Gregory, K. Wong, and R. F. Dvorak, More about arc-fault circuit interrupters, IEEE/ACM Transactions in Industry Applications, vol. 40, no. 4, pp , Jul/Aug [5] G. Parise, L. Martirano, and R. G., Arc-fault protection of branch circuits, cords and connected equipment, in IEEE Technical Conference Industrial and Commercial Power Systems, May 2003, pp [6] Underwriters Laboratories Inc., Arc-fault circuit-interrupters, UL 1699, Tech. Rep., Jan TABLE III AN ACTIVITY TABLE EXAMPLE current arc-fault AFCI fault flows to load detected opens circuit area AFCI 0 Y Y N N AFCI 1 Y Y Y Y AFCI 2 Y N N N AFCI 3 Y N N N AFCI 4 Y N N N