Negative Output Voltage

Transcription

1 1. Introduction Negative Output Voltage Most applications for point-of-load modules (POL) require a positive output voltage and all the Sumida power module documentation is written on this assumption. However, there are some cases where a negative voltage is required and standard Sumida POL modules can be configured in this way. This application note provides details. 2. Concept It is possible to configure a Sumida buck regulator module to generate a negative output voltage. This is done by grounding the pin and using the module ground as the negative output. The power input is connected between the VIN and pins. The basic circuit is shown in Figure 1. By doing this, all the signal pins of the module are referenced to the negative output rather than to ground. Pins such as VADJ can be used as normal, by connecting the voltage set resistor from VADJ to AGND as usual. Similarly, any soft start capacitor would connect between SS and AGND as usual. If it is desired to use pins such as EN or PG and interface them to external logic signals, a level shifting circuit can be added to translate the logic signal to reference the negative output. This is discussed in section 0 below. 3. Circuit connections Figure 1 shows the basic connections using the SPM1006 as an example, with output voltage set to -5V. CIN VAUX PWRGD SS SENSE PVIN SPM1006 EN VADJ COUT AGND PGND PHASE RSET 1.5kΩ -5V Figure 1 Basic schematic Version 1.2 April 11, 2017 Page 1 of 7

2 4. Limitations 4.1. Input voltage The module sees an effective input voltage equal to VIN plus the negative output. If VIN =12V nominal (10 to 14V) and = 6V, the module voltage is 18V nominal, 20V maximum. This is well within the SPM1006 maximum input voltage (28V) Start-up voltage When input power is first applied, the module is not operating and its output voltage is zero. The minimum input voltage (PVIN PGND in Figure 1) must be higher than the start-up voltage of the module, without considering the negative output voltage. Once the module is operating, the voltage between PVIN and PGND increases and is equal to VIN plus as mentioned above. (See also section 6.5 below.) 4.3. Maximum current The switching current is equal to the sum of the input and output currents, because both flow through the FETs and the inductor. The maximum output current of the module is reduced because of the added stress on the MOSFETs as well as the added loss in the inductor. As an example, if the input voltage is 12V and the output is 6V, the total input voltage at the module is 12+6=18V. For a load of 3A, the input current would be 1A (assuming 100% efficiency). Since losses are proportional to the square of the current, the resistive loss in negative output increases by 4 2 / 3 2 or by 16/9. For the losses to be equal, output current would need to reduce to 2.25A (25% reduction) for the negative output. In practice, the efficiency is of course always less than 100% so the effect is larger. As a rule of thumb, the reduction is approximately equal to the maximum duty-cycle, /( VIN (min) + ). For the example with minimum VIN of 12V and of 6V, maximum duty-cycle is 6/12+6, or 33%. Maximum output current for the SPM1006 operating at 12V in and -6V out would therefore be reduced from 8A to 5.33A at room temperature. There will be additional thermal derating at high ambient. Since the SPM1006 with normal positive output is derated to about 4.5A at 85 C (datasheet Figure 30), with negative output it will be derated by an additional 33% to about 3A Efficiency Because of the higher internal currents, the efficiency of the module is lower when operating in negative output mode. 5. Measured Results The SPM1006 was tested when operating with 2.5V output and with 6V output, with input voltage of 12V, 10V and/or 5V as appropriate. Efficiency and voltage regulation were measured over a range of operating currents to confirm that the module operates properly. Apart from input and output, all the connections to the module remain the same and the PCB layout is unchanged. The tests in this section were carried out using the standard Evaluation Board for the module with no changes apart from the external wiring. Results are shown in the following figures below: Version 1.2 April 11, 2017 Page 2 of 7

3 5.1. Output voltage -2.5V As expected, efficiency at -2.5V output is somewhat lower than the positive output (about 3% lower at 3A load), and voltage regulation is very good. Figure 2 Efficiency at -2.5V output 5.2. Output voltage -6V Figure 3 Voltage regulation (%) at -2.5V output At -6V output the efficiency is about 89% at 3A load (about 5% lower than for positive output), but again the voltage regulation remains very good. Version 1.2 April 11, 2017 Page 3 of 7

4 Figure 4 Efficiency at -6V output Figure 5 Voltage regulation (%) at -6V output Version 1.2 April 11, 2017 Page 4 of 7

5 6. Other considerations The SPM1006 has Enable and Power Good pins to allow external control and monitoring of the module status. These functions may not be needed for the negative output module(s) but if they are needed, some adjustments to the logic levels may be required as described below. [Note these have not all been tested and some experimentation may be required to suit the details of a specific application.] 6.1. Enable input As mentioned above, the Enable input is referenced to the negative output and a level shifting circuit is necessary to interface with a standard logic input. This can be done using two transistors, as shown in Figure 6. In this configuration, a HIGH logic input turns on the PNP transistor and therefore turns on the FET via R2 to disable the module. A LOW logic input turns off the PNP transistor and the FET is turned off via R3, enabling the module Power Good output The PG signal for the SPM1006 is referenced to the AGND pin, which is now the negative output pin. PG is normally LOW if the output voltage is too low or too high, and goes open when the output voltage is within spec limits. In a normal configuration with positive output, PG is either pulled up to a high logic level (any voltage up to VIN) or is very close to ground, and is compatible with external logic circuits. In a configuration with negative output, PG is either pulled up to a high logic level or is close to the negative output voltage. Negative output can be anything between 0V if the module is disabled or has failed, up to - in normal operation or higher than - under a fault condition. In order to make it compatible with external logic circuits a transistor level shift circuit can be used, but a simple circuit with just a resistor divider and a clamp diode (Schottky diode) may be sufficient, as shown in Figure 2. In this example the PG is pulled up to VIN, but any lower logic voltage can be used if required. VIN R4 CIN R5 D1 POWER GOOD Signal VAUX PWRGD SS SENSE PVIN ON/OFF Signal R1 20kΩ R2 20kΩ R3 20kΩ SPM1006 EN VADJ AGND PGND PHASE COUT RSET 1.5kΩ -5V Figure 6 Logic level shifting for EN and PG Version 1.2 April 11, 2017 Page 5 of 7

6 6.3. Sequencing In a normal positive output configuration, the PG output from one SPM1006 can directly connect to the Enable input of another SPM1006 to provide a sequenced start-up. With the negative output configuration, even if two separate modules are both providing negative outputs the negative voltage for each will be different so the signals cannot connect directly together. A level shifting circuit similar to the one shown in Figure 2 must still be used, although it may be possible to simplify it somewhat Auxiliary In a normal configuration, the auxiliary output VAUX is available for use as a logic voltage for pull-ups and similar low-current applications. In a negative output configuration VAUX is referenced to the negative output voltage, and therefore cannot be used to provide a positive source Startup and Low Input Shutdown In normal positive configuration, the startup voltage can be adjusted by adding a resistor divider from the input VIN to the EN pin. The internal resistor from VIN is 100K, startup voltage on the EN pin is 0.8V, and the external resistor REN is given by: REN = 400/(5VSTART 4) For a startup voltage of 9V, the value of REN is 9.76kΩ. With a negative output the module ground is initially at 0V and the startup voltage is given by the same equation. However, once the module starts the module ground is now the output and the effective input voltage seen at the module becomes VIN+. The hysteresis for the shutdown voltage is therefore increased by the output voltage, and in most cases this means there is effectively no LISD function. For example, with 12V input and -5V output and the startup voltage set to 9V the shutdown voltage is 4.5V. Since this is referenced to -5V it is below ground and has no meaning. If a LISD function is needed, a transistor can be used to add a bypass resistor across REN once the module starts, shown as REN2 in Figure 7 below. With these values for REN and REN2 the startup is set to 9V input and the shutdown is set to 4.5V input (9.5V referenced to ). A time delay may be needed to avoid a race condition. Version 1.2 April 11, 2017 Page 6 of 7

7 VIN CIN R1 10kΩ VAUX PVIN PWRGD SS SENSE SPM1006 EN VADJ COUT REN2 7.87kΩ REN 9.76kΩ AGND PGND PHASE RSET 1.5kΩ -5V Figure 7 Startup and LISD setting 7. Conclusion Sumida POL modules can be used to provide a negative output provided the limitations of input voltage and maximum current are acceptable. They provide excellent regulation with only a slight drop in efficiency. If access to the Enable and Power Good signals is needed, some external level shift circuitry may be required as discussed in section 6. Version 1.2 April 11, 2017 Page 7 of 7