Resonance Analysis Focusing on Stray Inductance and Capacitance of Laminated Bus Bars

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1 IEEJ Journal of Industry Applications Vol.5 No.6 pp DOI: 0.54/ieejjia Paper Resonance Analysis Focusing on Stray Inductance and Capacitance of Laminated Bus Bars Akihiro Hino Member, Keiji Wada Member (Manuscript received May 7, 205, revised May 5, 206) Extensive research has been undertaken in recent years for the development of the next generation of power devices, such as silicon carbide (SiC) and gallium nitride (GaN) devices, and high-speed switching circuits have been implemented. In such cases, high-speed switching operations may generate electromagnetic noise and a surge voltage in the power electronics circuits. Stray inductance and capacitance in the circuits are critical parameters of the noise and surge voltage. Therefore, it is important to design and analyze the stray inductance and capacitance of the direct current (DC)-side circuit of an inverter. This paper proposes a laminated bus bar design procedure in consideration of both the inductance and the capacitance of the bus bar. The effectiveness of the design procedure was tested using a buck converter circuit rated at 400 V and 70 A with an SiC MOSFET and SiC diode. Keywords: high-speed switching operation, laminated bus bar, SiC MOSFET, stray capacitance, stray inductance. Introduction A considerable amount of research has been carried out in recent years for the development of next-generation power devices, such as SiC and GaN device, and high-speed switching circuits have been implemented. In practice, full SiC- MOSFET modules have been on the market (), and GaN power devices have also been doing research and development (2). In general, high-speed switching operations, such as highdi/dt and -dv/dt, may cause electromagnetic noise and a surge voltage in the circuits. Moreover, the stray inductance between a DC-capacitor and power devices is among the most important causes of surge voltage. Therefore, it is important to design the stray inductance of the DC-side bus bar of a power electronics circuit. A number of researchers have reported procedures to reduce stray inductance in the circuit. A laminated bus bar that can be set to very low stray inductance is widely used. The laminated structure is placed close to the positive and negative electrodes using thin insulation materials. Therefore, the mutual inductance of both electrodes is quite high, and the total inductance of the laminated bus bar is lower than that of a conventional bus bar using parallel lines (3) (7). Many papers have discussed the relationship between the bus bar inductance and switching operations (8) (2). On the contrary, the stray capacitance of the laminated bus bar between the electrodes is higher than that of the conventional bus bar, and depends on the structure as well as the permittivity of the insulation material. In order to analyze the noise and the surge voltage due to electromagnetic interference (EMI), parasitic parameters in the circuits, such as inductance and capacitance need to be carefully handled. Tokyo Metropolitan University -, Minami-Osawa, Hachioji, Tokyo , Japan Some papers have discussed the resonance phenomenon due to stray capacitance in heat sinks, background patterns, and snubber capacitors (3) (4). Therefore, it is well known that the stray capacitance can affect switching waveforms. However, the influence of stray capacitance in laminated bus bars with high-speed switching operations has never been analyzed in detail. The authors have in the past concerned the structure of the laminated bus bar in designing its inductance based on an inductance map () (5) (6). This paper proposes a design procedure for a laminated bus bar by considering the influence of stray inductance and capacitance on it. In case of replacing the insulator between two electrodes, the surge voltage and the noise due to EMI can be restrained. It is clear that there is a relationship between the structure of the laminated bus bar and the resonance frequency of the equivalent circuit including the equivalent series inductance (ESL) of the DC-capacitor and the parasitic capacitance of the power devices. Furthermore, there is a design procedure for laminated bus bar structures of stray capacitance that prevents the resonance phenomenon considered the stray elements of the bus bars influence on. A buck converter circuit rated at 400 V and 70 A was used to experiment the effectiveness of the design procedure. In addition, three-types of the bus bars are designed, and the surge voltages and the resonance frequencies of switching waveform are also discussed by the experimental results. 2. Laminated Bus Bar Figure shows a simplified model of a laminated bus bar structure. The laminated bus bar consists of two copper plates (A and B) and an insulation material that is green in color. The copper plates are the positive and negative electrodes on either side of the input on the DC side of the converter circuit. The stray inductance depends on the structure of the copper electrode, whereas the stray capacitance is determined c 206 The Institute of Electrical Engineers of Japan. 407

Fig.. Laminated bus bar model Fig. 3. Total capacitance map of the laminated bus bar (ε r = 4.4) Fig. 2.

Generally, the insulation material needs to be installed to isolate the positive and negative electrodes.

40,000 analytical models. 2. Inductance Map (3) (5) This section presents an analysis method of deriving the total inductance of the laminated bus bar.

2 Fig.. Laminated bus bar model Fig. 3. Total capacitance map of the laminated bus bar (ε r = 4.4) Fig. 2. Total inductance map of the laminated bus bar by this in conjunction with the structure and permittivity of the insulator. Generally, the insulation material needs to be installed to isolate the positive and negative electrodes. In order to clarify the relationship between the structure and the stray elements of the laminated bus bar, this paper proposes inductance- and capacitance-maps of laminated bus bars summarizing 40,000 analytical models. 2. Inductance Map (3) (5) This section presents an analysis method of deriving the total inductance of the laminated bus bar. The total inductance L BUS denotes the stray inductance of two bus bars while considering L A,andL B (the self-inductance of each bus bar) and M A,B (the mutual inductance between bus bars A and B). Because two streams of current flow through the bus bars in opposing directions, the total inductance of the two bus bars can be calculated as follows: L BUS = L A + L B 2M A,B () The total inductance of the laminated bus bar depends on both the length l and the distance d. Figure 2 shows the total inductance map of the laminated bus bar with t and w set to 70 μm and 50 mm, respectively. The relationship between the wiring structure and stray inductance of the bus bar is clarified based on this map. Therefore, it is important to analyze the surge voltage of the switching waveform. Generally, the surge voltage v surge of the power device is directly proportional to the total stray inductance L total which is the sum of stray inductance of wire, capacitor and power modules inside the circuit. v surge is then given by (2): v surge = L total di D = v MAX E d (2) dt When a MOSFET is turned off, di D /dt takes a negative value. Therefore, the surge voltage v surge is beyond the DC voltage E d.in(2),di D /dt depends on device characteristics and the gate drive circuit. Therefore, the total stray inductance L total has to be designed considering the device characteristics. 2.2 Capacitance Map The capacitance C BUS of the laminated bus bar depends on among the length l, the distance d and the permittivity of the insulation materials is calculated as follows. wl C BUS = ε r ε 0 d (3) In this equation, ε r denotes the relative permittivity of the insulation material between electrodes, and ε 0 is the permittivity in a vacuum. Figure 3 shows a capacitance map of the laminated bus bar with t and w set to 70 μm and 50 mm, respectively. The horizontal axis represents the length of the bus bar l and the vertical axis represents the bus bar distance d. Hence, these parameters are the same as in the inductance map. In this case, grass epoxy was used as insulation material, and thus the relative permittivity was set to 4.4. The following equation is a variation of (3) in order to clearly the relationship between the structure of the laminated bus bar and stray capacitance. Solving for d, the distance of the laminated bus bar is found as d = ε rε 0 w l (4) C BUS As shown in (4), the distance d between both electrodes of the laminated bus bar is proportional to the length l,ifε r and C BUS are constant value. The relationship between the wiring structure and the stray capacitance of the laminated bus bar is also clarified by the total stray capacitance map. 3. Resonance Analysis 3. Equivalent Circuit for Analyzing a Voltage Oscillation Figure 4 shows the buck converter circuit consisting of the DC-capacitor, power devices and the bus bar wiring. It is clear that the parasitic parameter of the laminated bus bar affects the electronic circuit according to the resonance frequency of the equivalent circuit. The equivalent circuit was derived for the current path, as shown in Fig. 4, when the MOSFET was turned off. Figure 5 shows the equivalent circuit where each electrical component is as follows: 408 IEEJ Journal IA, Vol.5, No.6, 206

laminated bus bar L l : wiring inductance inside the MOSFET module C BUS : capacitance of the laminated bus bar C m : output capacitance of C OSS in MOSFET In order to simplify the resonance

3 Fig. 4. Analysis of the circuit containing the bus bar structure Fig. 6. Results of resonance analysis (ε r = 4.4) Fig. 5. Equivalent impedance model L DC : equivalent series inductance of the DC-side capacitor L t : stray inductance of the terminals connected to the DC-side capacitor L BUS : stray inductance of the laminated bus bar L l : wiring inductance inside the MOSFET module C BUS : capacitance of the laminated bus bar C m : output capacitance of C OSS in MOSFET In order to simplify the resonance analysis, the resistance components were excluded from consideration. Eq. (5) shows impedance from the DC power supply E d in Fig. 5, where ω is the angular frequency of the circuit. ( ) jωl + Z = jωl C + jωc BUS jωc BUS + jωl + jωc m (5) jωc m ω 2 0 = (2π f 0) 2 = C BUSL C + C m L C + C m L 2C BUS C m L C L (CBUS L C + C m L C + C m L) 2 4C BUS C m L C L ± 2C BUS C m L C L (6) L C = L DC + L t (7) L = L BUS + L l (8) When the imaginary part of (5) is set to zero, the impedance of the circuit can be minimized. The resonance frequency depends on the stray capacitance and the inductance of the bus bar, i.e., the structure of the laminated bus bar determines the resonance frequency of the circuit that satisfies (6), (7) and (8). Therefore, the design of the bus bar needs to include the parasitic parameters of both the DC-capacitor Fig. 7. Results of resonance analysis (ε r = 80) and the power devices. Figures 6 and 7 show the relationship between the wiring structure of the laminated bus bar and the resonance frequency using the parameters shown in Table 2. In this case, L BUS was derived from Fig. 2, and C BUS was derived from Eq. (3). The horizontal axis represents the length of the bus bar l, and the vertical axis represents the bus bar distance d. When d is greater than 2 mm in Fig. 6, the resonance frequency f 0 is influenced by the stray inductance in the circuit. Then, the resonance frequency f 0 is described as f 0L : f 0L = 2π (9) (L DC + L t + L BUS + L l )C m Conversely, the resonance frequency f 0 is affected by the stray capacitance of the laminated bus bar when d is less than 2 mm in Fig. 6. Hence, the resonance frequency f 0 moves from f 0L to f 0C : f 0C = 2π. (0) (L DC + L t )C BUS Figure 7 is drawn when the related permittivity ε r is set to 80. In Fig. 7, the resonance frequency f 0 is affected by the capacitance of the laminated bus bars because ε r in Fig. 7 is 8 times as large as that in Fig Equivalent Frequency of the Rising Waveform When the MOSFET is turned OFF, it is assumed that the voltage waveform v DS changes from 0 to v MAX with a damping oscillation waveform, as shown by the solid line in Fig. 8. Then, the dashed line in Fig. 8 indicates the fundamental waveform of the rising waveform. Generally, an ideal step-response waveform has multiple frequency components. 409 IEEJ Journal IA, Vol.5, No.6, 206

Table. Parameters of the laminated bus bar t [μm] w [mm] l [mm] d [mm] ε r L BUS [nh] C BUS [pf] f 0 [MHz] Bus bar I 70 50 00 5.2 0.7 8.5 5 Bus bar II 70 50 00 5.2 80 0.7 68 27 Bus bar III 70 50 38.

4 Table. Parameters of the laminated bus bar t [μm] w [mm] l [mm] d [mm] ε r L BUS [nh] C BUS [pf] f 0 [MHz] Bus bar I Bus bar II Bus bar III Fig. 8. Equivalent frequency of the rising slope However, it is assumed that the turn-off waveform can be replaced by a unique sinusoidal waveform (7). Therefore, the dominant frequency component f cal of the rising waveform in v DS is given as follows: f cal = ω cal 2π =. () πt r t r in the above represents the rising waveform. If the resonance frequency f 0 is close to the equivalent frequency f cal in (), the voltage oscillation waveforms may appear the drainsource voltage of the MOSFET under turn-off operations. In other words, it is expected that the bus bar that prevents the above resonance phenomenon can be designed in consideration of the equivalent circuit analysis and the equivalent frequency of (). 4. Design Procedure of the Laminated Bus Bars for Experiments In order to confirm the effectiveness of the resonance analysis, three types of the bus bars (Bus bar I, II, and III) were designed according to this analysis. In this experiment, the stray inductances of three types were designed the same values. Bus bars I and II were designed in order to investigate the influence of C BUS on the switching waveform. Here, the bus bars I and II had identical structure. Therefore C BUS changed only through the relative permittivity of the insulating material. Figure 9 shows the relationship between the relative permittivity of the insulating material and the resonance frequency using the parameters of Tables and 2. Here, the values of ε r for the bus bars I and II were set to.0 and 80, respectively. Thus, the value of C BUS for bus bar II was 80 times that of bus bar I. Then, the bus bar I was expected to prevent the resonance phenomenon, because the resonance frequency f 0 of the bus bar I was far removed from f cal. Bus bars II and III were designated to confirm the relationship between the resonance frequency and the amplitude of the oscillation waveform. The wiring structure and the insulating material of these bus bars II and III were different. Fig. 9. The relationship between relative permittivity ε r resonance frequency f 0 Table 2. Model parameters for Fig. 5 L C [nh] L l [nh] C m [pf] Fig. 0. Equivalent inductance line at nh and equivalent capacitance lines at 680 pf Fig.. PCB layout of the bus bar Figure 0 shows the bus bar inductance line at nh, and the bus bar capacitance lines at 680 pf when ε r was taken as 4.4 and 80, respectively. Thus, line length l and distance d were set to different values. However, their frequencies were set to 28 MHz by (6), so that L BUS and C BUS were almost identical. Figure shows the layout of the designed bus bars. The power supply side was on the left-hand side, and the terminal connected to the DC-capacitor. In addition, the module side was on the right-hand side and was connected to the module terminal. The air core inductor was connected to the terminal 40 IEEJ Journal IA, Vol.5, No.6, 206

5 Fig. 2. Pictures of the designed bus bars Table 3. Experimental conditions Part information Part number Value Package SiC-MOSFET CMF2020D (Cree) 200 V, 33 A TO-247 SiC-SBD C2D020 (Cree) 200 V, 5 A TO-220 DC-capacitor PEH200YX4470MU μf, 450 V Gate resistor 0 Ω DC voltage E d 400 V Turn-off current I D 70 A Air core inductor L air 2.0 mh Table 4. Experimental results of Fig. 3 v MAX [V] f e [MHz] Bus bar I Bus bar II Bus bar III of SiC-SBD in parallel as the load. Figure 2 shows pictures of bus bars I, II and III. Table shows the details of the parameters of the bus bar, and Table 2 shows those of Fig. 5. Here, the stray inductance L DC of the DC capacitor refers to the data sheet value (8),and the L l represents the wiring inductance inside the MOSFET module. The f 0 is the resonance frequency of the equivalent circuit. 4. Experimental Results The DC-supply voltage E d was set to 400 V as an experimental parameter, and the turn-off current I D was set to 70 A. The detailed experimental conditions are shown in Table 3. Figure 3 shows the experimental waveforms of v DS using bus bars I, II and III. The surge voltage v MAX and the resonance frequency f e of the experimental results are shown in Table 4. The resonance frequencies f 0 and f e were identical; that is, the effectiveness of the resonance analysis using the equivalent circuit is clear from Tables and 4. Furthermore, the voltage waveform v DS using bus bar II appears as an oscillation waveform as shown in Fig. 3. On the contrary, the use of bus bar I can prevent oscillation waveforms because f 0 of bus bar I was farther from f cal than that of bus bar II. In the case bus bars II and III were used, the configuration of the waveform was almost the same even though both the wiring structure and the insulating material were different. Moreover, the surge voltages of v DS were also nearly the same because the stray inductances of the circuit were constant in the three-types of bus bars used. 5. Discussion of Design Procedure In order to suppress the surge voltage during the turn-off operation, the stray inductance of the laminated bus bars should be set to low value. On the contrary, the resonant frequency of an equivalent circuit can be set to a lower value, because the stray capacitance of the bus bar increases. The structure of the laminated bus bars that prevented from generating oscillation waveform is decided by Figs. 6 and 7. As a result, it is necessary to design the bus bar while considering both bus bar inductance and capacitance. 6. Conclusion This paper proposed a design procedure of laminated bus bars to prevent resonance in the vicinity of power devices. The relationship between the structure for the bus bar and resonance frequency was clarified based on the analysis, and an equivalent frequency component containing the switching waveforms was discussed. It was found that the resonance frequency of a circuit containing parasitic parameters has to be designed to be higher than the equivalent frequency of the switching waveform. If the bus bar is appropriately designed, voltage oscillations under turn-off operations can be suppressed. Moreover, the effectiveness of the design procedure was confirmed by using a buck converter circuit at 400 V and 70 A using SiC power devices. References ( ) A. Kadavelugu, K. Mainali, D. Patel, S. Madhusoodhanan, A. Tripathi, K. Hatua, S. Bhattacharya, S.-H. Ryu, D. Grider, and S. Leslie: Medium voltage power converter design and demonstration using 5 kv SiC N-IGBTs, IEEE APEC, pp (205) ( 2 ) S. Kaneko, et al.: Current-collapse-free Operations up to 850 V by GaN- GIT utilizing Hole Injection from Drain, International Symposium on Power Semiconductor Devices & IC s, pp.4 44 (205) ( 3 ) M. Ando and K. Wada: Design of Wiring Structure by Considering Bus Bar Inductance,IEEJ Transactions on Industry Applications, Vol.32, No.4, pp (202) (in Japanese) ( 4 ) M.C. Caponet, F. Profumo, R.W.De Doncker, and A. Tenconi: Low Stray Inductance Bus Bar Design and Construction for Good EMC Performance in Power Electronic Circuit, IEEE Transactions on Power Electronics, Vol.7, No.2, pp (2002) ( 5 ) K. Wada, A. Hino, and M. Ando: High-Speed Analysis of Bus Bar Inductance for a Laminated Structure, IEEJ Journal on Industry Applications, Vol.33, Vol.2, No.4 (203) ( 6 ) M. Buschendorf, M. Kobe, R. Alvarez, and S. Bernet: Comprehensive Design of DC Busbars for Medium Voltage Applications, IEEE Energy Conversion Congress and Exposition (ECCE), pp (203) ( 7 ) C. Chen, X. Pei, Y. Chen, and Y. Kang: Investigation, Evaluation and Optimization of Stray Inductance in Laminated Busbar, IEEE Transactions on Power Electronics, pp (203) ( 8 ) F. Zare and G.F. Ledwich: Reduced Layer Planar Busbar for Voltage Source Inverters, IEEE Transactions on Power Electronics, Vol.7, No.4, pp (2002) ( 9 ) J.M. Allocco: Laminated Bus Bar for Power System Interconnects, IEEE Applied Power Electronics Conference and Exposition (APEC), Vol.7, No.2, pp (997) (0) J. Wang, B. Yang, J. Zhao, Y. Deng, W. Zhixin, and X. He: Development of a Compact 750 kva Three -phase NPC Three-level Universal Inverter Module with Specifically Designed Busbar, IEEE Applied Power Electronics Conference and Exposition (APEC), pp (200) ( ) L. Popova, R. Juntunen, T. Musikka, M. Lohtander, P. Silventoinen, O. Pyrhonen, and J. Pyrhonen: Stray inductance estimation with detailed model of the IGBT module, European Conference on Power Electronics, (EPE) (203) (2) L. Yuan, Z. Zhao, M. Eltawil, R. Yi, and H. Bai: Performance Evaluation of Switch Devices Equipped in High-Power Three Level Inverters, IEEE Transactions on Industrial Electronics, Vol.54, No.6 (2007) ( 3) Z. Ariga and K. Wada: Analysis of Electromagnetic Induced Noise with Laminated Bus Bar, IEEJ Transactions on Industry Applications, Vol.32, No.2, pp (202) (in Japanese) (4) G. Zou, Z. Zhao, and L. Yuan: Study on DC Busbar Structure Considering Stray Inductance for the Back-to-Back IGBT-Based Converter, IEEE Applied Power Electronics Conference and Exposition (APEC), pp (203) 4 IEEJ Journal IA, Vol.5, No.6, 206

Wada and M. Ando: Limitation of DC-side Stray Inductance by Considering Over voltage and Short-circuit Current, European Conference on Power Electronics (EPE) (203) (7) J. Meng, W. Ma, Q. Pan, L.

6 (a) Bus bar I (b) Bus bar II (c) Bus bar III Fig. 3. Experimental results for drain-source voltage and drain current (5) K. Wada, M. Ando, and A. Hino: Design of DC-side Wiring Structure for High-Speed Switching Operation using SiC Power Devices, IEEE Applied Power Electronics Conference and Exposition (APEC), pp (203) ( 6) K. Wada and M. Ando: Limitation of DC-side Stray Inductance by Considering Over voltage and Short-circuit Current, European Conference on Power Electronics (EPE) (203) (7) J. Meng, W. Ma, Q. Pan, L. Zhang, and Z. Zhao: Multiple Slope Switching Waveform Approximation to Improve Conducted EMI Spectral Analysis of Power Converters, IEEE Transactions on Electromagnetic Compatibility, Vol.48, No.4 (2006) ( 8) Elcodis HP: datasheet Keiji Wada (Member) received the Ph.D. in electrical engineering, from Okayama University, Okayama, Japan, in From 2000 to 2006, he was a Research Associate with Tokyo Metropolitan University, Tokyo, Japan, and the Tokyo Institute of Technology. Since 2006, he has been an Associate Professor with Tokyo Metropolitan University. His research interests include mediumvoltage inverter, electromagnetic interference filters, and active power filters. Akihiro Hino (Member) received the M.S. in electrical engineering, from Tokyo Metropolitan University, Tokyo, Japan, in 204. Since then, he has been a researcher with Fuji Electric. His research interests include power electronics. 42 IEEJ Journal IA, Vol.5, No.6, 206

Design of EMI Filters for DC-DC converter

Design of EMI Filters for DC-DC converter J. L. Kotny*, T. Duquesne**, N. Idir** Univ. Lille Nord de France, F-59000 Lille, France * USTL, F-59650 Villeneuve d Ascq, France ** USTL, L2EP, F-59650 Villeneuve