1082 IEEE TRANSACTIONS ON INDUSTRY APPLICATIONS, VOL. 50, NO. 2, MARCH/APRIL 2014

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1 1082 IEEE TRANSACTIONS ON INDUSTRY APPLICATIONS, VOL. 50, NO. 2, MARCH/APRIL 2014 Boost-Derived Hybrid Converter With Simultaneous DC and AC Outputs Olive Ray, Student Member, IEEE, and Santanu Mishra, Senior Member, IEEE Abstract This paper proposes a family of hybrid converter topologies which can supply simultaneous dc and ac loads from a single dc input. These topologies are realized by replacing the controlled switch of single-switch boost converters with a voltage-source-inverter bridge network. The resulting hybrid converters require lesser number of switches to provide dc and ac outputs with an increased reliability, resulting from its inherent shoot-through protection in the inverter stage. Such multioutput converters with better power processing density and reliability can be well suited for systems with simultaneous dc and ac loads, e.g., nanogrids in residential applications. The proposed converter, studied in this paper, is called boost-derived hybrid converter (BDHC) as it is obtained from the conventional boost topology. The steady-state behavior of the BDHC has been studied in this paper, and it is compared with conventional designs. A suitable pulse width modulation (PWM) control strategy, based upon unipolar sine-pwm, is described. A DSP-based feedback controller is designed to regulate the dc as well as ac outputs. A 600-W laboratory prototype is used to validate the operation of the converter. The proposed converter is able to supply dc and ac loads at 100 V and 110 V (rms), respectively, from a 48-V dc input. The performance of the converter is demonstrated with inductive and nonlinear loads. The converter exhibits superior cross-regulation properties to dynamic load-change events. The proposed concept has been extended to quadratic boost converters to achieve higher gains. Index Terms Boost-derived hybrid converter (BDHC), dc nanogrid, pulsewidth-modulated inverters. I. INTRODUCTION NANOGRID architectures are being increasingly incorporated in modern smart residential electrical power systems [1]. These systems involve different load types dc as well as ac efficiently interfaced with different kinds of energy sources (conventional or nonconventional) using power electronic converters [2]. Fig. 1 shows the schematic of a system, where a single dc source (v dcin ) (e.g., solar panel, battery, fuel cell, etc.) supplies both dc (v dcout ) and ac (v acout ) loads. The architecture of Fig. 1(a) uses separate power converters for each conversion type (dc dc and dc ac) while Fig. 1(b) utilizes a single power Manuscript received December 11, 2012; revised April 13, 2013; accepted May 8, Date of publication July 3, 2013; date of current version March 17, Paper 2012-IPCC-719.R1, presented at the 2012 IEEE Energy Conversion Congress and Exposition, Raleigh, NC, USA, September 15 20, and approved for publication in the IEEE TRANSACTIONS ON INDUSTRY AP- PLICATIONS by the Industrial Power Converter Committee of the IEEE Industry Applications Society. This work was supported by the Department of Science and Technology, Government of India, under Grant SR/S3/EECE/0187/2012. The authors are with the Department of Electrical Engineering, Indian Institute of Technology Kanpur, Kanpur , India ( olive@iitk.ac.in; santanum@iitk.ac.in). Color versions of one or more of the figures in this paper are available online at Digital Object Identifier /TIA Fig. 1. Representative schematic of a nanogrid architecture with a single dc input and simultaneous dc and ac outputs. (a) Dedicated power converter-based architecture. (b) Hybrid converter-based architecture. converter stage to perform both the conversions. The latter converter, referred to as a hybrid converter in this paper, has higher power processing density and improved reliability (resulting from the inherent shoot-through protection capability). These qualities make them suitable for use in compact systems with both dc and ac loads. For example, an application of a hybrid converter can be to power an ac fan and a LED lamp both at the same time from a solitary dc input in a single stage. Smart residential systems are often connected to nonconventional energy sources to provide cleaner energy. Due to space constraints, these dedicated energy sources are highly localized and have low terminal voltage and power ratings (typically, on the order of a hundred watts). Conventional designs involve two separate converters, a dc dc converter (e.g., boost) and a voltage source inverter (VSI), connected either in parallel [as shown in Fig. 2(a)] or in cascade [Fig. 2(b)], supplying dc and ac outputs at v dcout and v acout, respectively. Depending upon the requirements, topologies providing higher gains may be required to achieve step-up operation [3]. This paper investigates the use of single boost-stage architecture to supply hybrid loads. The operation of conventional VSIs in hybrid converters would involve the use of deadtime circuitry to prevent shootthrough. In addition, due to electromagnetic interference (EMI) or other spurious noise, misgating turn-on of the inverter leg switches may take place, resulting in damage to the switches. In residential applications, due to the compactness of the overall conversion system, the generation of spurious noise may be commonplace. Thus, the VSIs in such applications need to be highly reliable with appropriate measures against EMI-induced misgating. The Z-source inverter (ZSI), proposed in [4], can mitigate the problem of shoot-through due to the EMI in a VSI. The use of a unique impedance network at the input of the ZSI allows a IEEE. Personal use is permitted, but republication/redistribution requires IEEE permission. See for more information.

2 RAY AND MISHRA: BOOST-DERIVED HYBRID CONVERTER WITH SIMULTANEOUS DC AND AC OUTPUTS 1083 Fig. 2. Schematic of power converter topologies with simultaneous dc and ac loads. A conventional boost converter and a VSI have been used to implement the system. System (a) when both are connected in parallel and (b) when connected in cascade. shoot-through state in which both the switches of an inverter leg can be turned on simultaneously. Extended boost ZSI has been proposed where a higher gain is achieved utilizing this Z-source topology [5]. However, ZSI cannot supply both dc and ac loads simultaneously. This is due to the fact that it has two capacitors which have to be matched with equal loads across them. Unmatched loads on the capacitors might lead to dynamic instability [6]. The switched boost inverter (SBI), proposed in [7], is a hybrid converter topology, which can achieve similar advantages as a ZSI with lesser number of passive components and supply simultaneous dc and ac loads. This inverse Watkins Johnson (IWJ) converter-derived topology [8] is a converter based upon the first-order four-switch converter cell [9]. The proposed hybrid converter is derived from a two-switch converter cellbased step-up converter, such as the boost converter. Therefore, it involves lesser component count compared to the IWJ converter. The proposed converter is denoted as boost-derived hybrid converter (BDHC). The objectives of this paper are the following: 1) to introduce a family of hybrid converter topologies capable of simultaneously supplying ac and dc loads; 2) to characterize the steadystate behavior of the BDHC topology; 3) to develop a PWM control scheme for the BDHC; 4) to compare the performance of the BDHC with conventional designs; 5) to validate the static and dynamic performance of the BDHC using an experimental prototype; and 6) to extend the proposed philosophy to higher order boost converters in order to achieve a higher conversion ratio. This paper is organized as follows. The proposed circuit modification principle is described next in Section II, and its application to a boost converter is shown. The steady-state characterization of the converter is given in Section III. The PWM control strategy and the closed-loop implementation to regulate both ac and dc outputs are described in Section IV, followed Fig. 3. (a) Conventional boost converter. (b) Proposed BDHC obtained by replacing S a with a single-phase bridge network. The switch realization for the bridge can be done using bidirectional switches either IGBTs with antiparallel diodes or MOSFETs. by a comparative study of the BDHC in Section V. Section VI extends the circuit modification principle to higher order boost converters. The converter and its control strategy have been validated using an experimental prototype in Section VII. II. BDHC A. Proposed Circuit Modification Boost converters comprise complementary switch pairs, one of which is the control switch (controls the duty cycle) and the other capable of being implemented using a diode. Hybrid converter topologies can be synthesized by replacing the controlled switch with an inverter bridge network, either a single-phase or three-phase one. The proposed circuit modification principle, applied to a boost converter, is illustrated in the next section. The resulting converter, called BDHC, is the prime focus area of this paper. Section VI extends this principle to higher order converters. B. Derivation of BDHC Topology The control switch S a of a conventional boost converter [shown in Fig. 3(a)] has been replaced by the bidirectional single-phase bridge network switches (Q 1 Q 4 ) to obtain the BDHC topology [shown in Fig. 3(b)]. This proposed converter provides simultaneous ac output (v acout ) in addition to the dc output (v dcout ) provided by the boost converter. For the BDHC, the hybrid (dc as well as ac) outputs have to be controlled using the same set of four controlled switches Q 1 Q 4. Thus, the challenges involved in the operation of BDHC are the following: 1) defining the duty cycle (D st ) for boost operation and the modulation index (M a ) for inverter operation; 2) determination of voltage stresses and currents through different circuit components and their design; and 3) control and channelization of total input power to both ac and dc loads. In the subsequent sections, all the aforementioned challenges will be discussed.

3 1084 IEEE TRANSACTIONS ON INDUSTRY APPLICATIONS, VOL. 50, NO. 2, MARCH/APRIL 2014 III. OPERATION OF BDHC The schematic of the BDHC with the reference current directions has been shown in Fig. 3(b). In this paper, the continuous conduction mode of operation has been assumed (the boost inductor current (i L ) never goes to zero). In this paper, lower case letters represent instantaneous values, upper case letters represent dc or rms values, lower case letters with tilde ( ) represent the ac component, and lower case letters with ( ) represent the peak value of the variable. A. Operating Principle Each of the four bidirectional switches (Q 1 Q 4 ) of BDHC comprises the combination of a switch S i and an antiparallel diode D i (i=1 to 4). The boost operation of the proposed converter can be realized by turning on both switches of any particular leg (either S 1 S 4 or S 3 S 2 ) simultaneously. This is equivalent to shoot-through switching condition as far as VSI operation is concerned, and it is strictly forbidden in the case of a conventional VSI. However, for the proposed modification, this operation is equivalent to the switching on of the switch S a of the conventional boost converter [see Fig. 3(a)]. The ac output of the BDHC is controlled using a modified version of unipolar sine-pwm switching scheme, described in Section IV. The BDHC, during inverter operation, has the same circuit states as a conventional VSI. The reason for this is as follows: For conventional VSIs (shown in Fig. 2), although the input to the bridge is a voltage stiff dc bus, the input dc voltage is required only during the power intervals, i.e., when there is a power transfer with the source. In the other intervals, the current freewheels among the inverter switches and these states do not require the input to be at a fixed dc value and hence can be zero. In the BDHC, the switch node voltage (v sn ) acts as the input to the inverter; it switches between the voltage levels v dcout and zero. The switching scheme should ensure that the interval for power transfer with the source occurs only when v sn is positive, i.e., when v sn is clamped to the dc output voltage v dcout.fig.4 illustrates this concept. The BDHC has three distinct switching intervals as described in the following. 1) Interval I Shoot-through interval: The equivalent circuit schematic of the BDHC during the shoot-through interval is shown in Fig. 5(a). The shoot-through interval occurs when both the switches (either Q 1 Q 4 or Q 3 Q 2 )ofany particular leg are turned on at the same time. The duration of the shoot-through interval decides the boost converter duty cycle (D st ). The diode D is reverse biased during this period. The inverter output current circulates within the bridge network switches. Thus, BDHC allows additional switching states which are strictly forbidden in avsi. 2) Interval II Power interval: The power interval, shown in Fig. 5(b), occurs when the inverter current enters or leaves the bridge network at the switch node s. The diode D conducts during this period, and the voltage at the switch node (v sn ) is equal to the v dcout (neglecting the diode Fig. 4. Switch node voltage (v sn), inductor current (i L ), inverter output voltage (v ab ), diode current (i D ), and inverter input current (i sn) for a positive inverter output current. The reference directions for the voltages and currents have been shown in Fig. 3(b). The figure shows that the inductor current has a low-frequency component (at twice the power frequency) as described in Section III. voltage drop). In this interval, either Q 1 Q 2 or Q 3 Q 4 is turned on. 3) Interval III Zero interval: The zero interval occurs when the inverter current circulates among the bridge network switches and is not sourced or sunk. The diode D conducts during this interval. Fig. 5(c) shows the equivalent circuit for this interval. Table I shows the expressions for diode current (i D ), capacitor current (i C ), inverter output voltage (v ab ), and boost switch node voltage (v sn ) for different operating modes. All these expressions have been defined in Fig. 3(b). B. Steady-State Analysis 1) Gain Expression for DC and AC Outputs: Similar to conventional boost converters, the dc output of the BDHC can be regulated using the duty cycle, denoted by D st, and is defined as the shoot-through time interval in a switching cycle, as shown in Fig. 4. For the purpose of analysis, we assume that the output dc capacitor voltage and the input inductor current have small ripple compared to their dc values. Hence, the expression for the voltage gain of the dc output is similar to that of a boost converter and can be derived as V dcout 1 =. (1) V dcin 1 D st The modulation index, denoted by M a (0 M a 1), regulates the ac output voltage of the BDHC, and its definition is similar

4 RAY AND MISHRA: BOOST-DERIVED HYBRID CONVERTER WITH SIMULTANEOUS DC AND AC OUTPUTS 1085 The ac gain increases with the increase of modulation index (M a ) for any fixed value of duty cycle D st. As the same set of switches controls both the dc and ac outputs, there is limitation to the maximum duty cycle or modulation index that can be achieved for this topology. The switching strategy must satisfy the following constraint: M a +D st 1. (3) Hence, the maximum value of ac gain is achieved at the equality condition of relation (3). At this condition, the peak value of the ac voltage is equal to the input voltage, and this is independent of the values of the duty cycle and modulation index. This can be obtained using (2) and (3). In order to achieve an ac voltage with voltage levels higher than the input voltage, either a stepup transformer needs to be interfaced to the BDHC or a higher order boost converter needs to be used, as will be explained in Section VI. 2) DC and AC Output Power Expressions: From (1) and (2), the expressions for output dc (P dc ) as well as ac power (P ac ) can be derived as follows: P dc = V 2 dcin R dc (1 D st ) 2 (4) P ac = 0.5 V 2 dcin M 2 a R ac (1 D st ) 2. (5) Fig. 5. Equivalent circuits and current directions of the BDHC during (a) shoot-through interval, (b) power interval, and (c) zero intervals. TABLE I STEADY-STATE EXPRESSIONS OF BDHC IN DIFFERENT MODES OF OPERATION [REFERENCE DIRECTIONS SHOWN IN FIG. 3(b)] to that associated with conventional VSIs. The peak output ac voltage is related to the input as ˆv acout = M a. (2) V dcin 1 D st The maximum dc output gain achieved using the BDHC is similar to that of boost converters and is around four to five [15]. R dc and R ac are the dc and ac output resistances, respectively. Expressions (4) and (5) show that dc output power depends only on duty cycle (D st ), while ac output power depends upon both D st and M a. 3) Design of Passive Components: The ac output waveforms of the BDHC are similar to those of a conventional VSI. Therefore, the filter design principles associated with the design of conventional VSIs can be used for L ac (= L ac1 + L ac2 ) and C ac [see Fig. 3(b)]. As far as the dc dc converter filters are concerned, the selection of inductor (L) and capacitor (C) values depends mainly on the amount of allowable ripple in the inductor current and capacitor voltage. One of the major differences between the BDHC and a conventional boost converter is that, in case of BDHC, since both dc and ac outputs are achieved, the inductor current (i L ) and the capacitor voltage (v dcout ) have both a high- and a low-frequency component (at twice the output ac power frequency), in addition to their dc values. The ripple content due to the low-frequency component can be evaluated as follows. The instantaneous power input into the bridge network consists of a dc value (equal to P ac ) and sinusoidal component varying at twice the power frequency. In conventional VSIs, a dc-link capacitor is often used at the input, and this maintains the instantaneous power balance. This results in ripple content at the dc-link voltage at twice the power frequency. For the proposed converter, this instantaneous power balance is maintained by both the reactive elements (capacitor C and inductor L). Neglecting switching frequency components, the equations related to the instantaneous power balance can be written as follows.

5 1086 IEEE TRANSACTIONS ON INDUSTRY APPLICATIONS, VOL. 50, NO. 2, MARCH/APRIL 2014 Let v ab = v an v bn =ˆv ab sin(ωt), i ab = î ab sin(ωt ϕ) where ϕ is the phase difference between the fundamental components of inverter output voltage (v ab ) and current (i ab ). Therefore, the instantaneous inverter input power p ab = v ab i ab =0.5ˆv ab î ab cos ϕ 0.5ˆv ab î ab cos(2ωt ϕ). (6) The above expression has a dc as well as a sinusoidal component. The dc component is equal to the real power demanded by the ac output (P ac ). Thus, the average input current of the inductor (L) can be calculated as shown in I L = P dc + P ac V dcin = V dcouti dcout +0.5ˆv ab î ab cos ϕ V dcin. (7) The sinusoidal component of instantaneous power p ab is balanced by the variation of the inductor current and the capacitor voltage. This results in a low-frequency ripple (at twice the power frequency) in the inductor current as well as the capacitor voltage. This power balance equation is shown in p ab = d ( 1 2 Li2 L (t)+ 1 2 Cv2 dcout (t)) =0.5ˆv ab î ab cos(2ωt ϕ) dt (8) where p ab is the double frequency power component of input power to the inverter bridge. The solution of (8) relates the maximum (i L,max,v dcout,max ) and minimum (i L,min,v dcout,min ) values of i L (t) and v dcout (t), asshownin 1 2 L ( i 2 L,max i 2 ) 1 L,min + 2 C ( vdcout,max 2 vdcout,min 2 ) p ab = ω. (9) Equation (9) can be simplified to obtain the following design criterion: L.I L.Δi L,pk pk + C.V dcout.δv dcout,pk pk = P ab (10) ω where Δi L,pk pk and Δv dcout,pk pk represent the peak-topeak ripple contents in i L (t) and v dcout (t), respectively. Thus, from (10), it can be concluded that, with the increase in ac output power, the ripple content (at twice the fundamental frequency) in both the inductor current i L and dc output capacitor voltage v dcout changes. Depending upon the active power level, the magnitude of this power frequency component can be greater than the ripple due to high frequency. The high-frequency ripple content has been illustrated in Fig. 4, where the inductor current does not reach its initial value after each switching interval due to the presence of the sinusoidal component in capacitor voltage. This, in turn, results in a sinusoidal ripple in the inductor current at twice the fundamental frequency. This low-frequency ripple content should hence be considered during the component design. For the BDHC, the inductor current is drawn from a dc source, and hence, the ripple content in the input current should be as low as possible. If the ripple in inductor current is fixed, the ripple in dc output can be calculated from (10). 4) Switch Stress and Current Expressions: The switches Q 1 Q 4 and Q 3 Q 2 are complementary in operation except during the shoot-through interval. The input to the inverter bridge equals to v dcout (shown in Fig. 4) during both power and zero intervals. Thus, the maximum stress on each switch is equal to v dcout, the dc output voltage, neglecting the voltage drop across the conducting diode D. The stress across the diode D is equal to v dcout during the shoot-through interval. Thus, the selection of switch ratings is dependent upon the dc output voltage rather than the input voltage, contrary to the case for a conventional VSI. As opposed to a conventional boost converter, the diode current (i D ) of BDHC is dependent upon the boost inductor current as well as the current drawn by the VSI bridge legs. This is due to the fact that, apart from the shoot-through interval, which is similar to the boost interval of a boost converter, there is an additional power interval. The current i sn [shown in Fig. 3(b)] is equal to i L during the shoot-through interval. During the power interval, i sn equals the inverter output current i ab. Since i ab is time varying, the value of i sn and, hence, diode current i D vary with time. This is shown in Fig. 4. The expressions for the currents in different intervals are shown in Table I and in the Appendix (see Tables VI VIII). The maximum current through the switches î sw can be expressed as follows: î sw(i) = i L,max + î ab, (i = 1 to 4). (11) î ab represents the maximum value of the inverter output current i ab (t). Fig. 4 shows the nature of the switch node voltage (v sn ), inductor current (i L ), diode current (i D ), and inverter bridge input current (i sn ) for a positive value of ac output current (i ab ). IV. CONTROL STRATEGY A. Modified Unipolar PWM Strategy for BDHC The fundamental principle behind the operation of BDHC is based upon the fact that the inverter bridge input must be connected to a positive voltage during the power interval only. This means that the inverter output has to be modulated when v sn 0and boost operation occurs when v ab =0. The inverter output voltage assumes three different values, and hence, the PWM modulation strategy used is based upon unipolar sine- PWM scheme, which provides three voltage levels for output. The PWM control scheme for the BDHC is based upon the switching scheme proposed in [10]. In this scheme, shown in Fig. 6(a), the shoot-through is realized by gating-on both the switches of a single leg at the same time. The switching strategy involves turning on only one leg at a time in order to achieve shoot-through. Another alternative is to turn on all the switches during shoot-through. This scheme has been proposed in [11] and [12], and the concept is illustrated using Fig. 6(b). As shown in the figure, turning on all the switches for shoot-through involves more switching during each switching period with their associated losses. The reliability of the circuit also reduces since the time between two successive switching [switches S 1 and S 2 in Fig. 6(b)] is dependent on t z, which

6 RAY AND MISHRA: BOOST-DERIVED HYBRID CONVERTER WITH SIMULTANEOUS DC AND AC OUTPUTS 1087 Fig. 7. Implementation of the PWM scheme shown in Fig. 6(a). Fig. 6. Generation of gate signals for a positive value of reference signal (v m(t)). (a) Proposed PWM scheme used and (b) its variant where all switches are turned on during shoot-through. Here, ST is the shoot-through interval, and Z is the zero interval. can be close to zero. This may be impractical considering minimum switching times for the devices used. Thus, compared to Fig. 6(b), additional switching at S 1 and S 2 is absent in the proposed scheme of Fig. 6(a), and this scheme has been used for the control of the BDHC. B. Implementation and Control of BDHC The PWM control scheme of Fig. 6(a) is realized using the schematic shown in Fig. 7. The reference signals to the PWM generation circuit are v m (t) and v ST (t). The signals S1 S4 are provided to the gates of the controlled switches. v ST (t), adc signal, controls the shoot-through period, and hence, the duty ratio (D st ) for the dc output of the boost converter and v m (t) controls the modulation index (M a ) for the inverter. The nature of the gate signals for a positive value of reference signal v m (t) has been shown in Fig. 6(a). The control parameters v m (t) and v ST (t) are generated by the control system and must satisfy relation (3). This switching strategy constraint is taken care of by the controller by satisfying the constraint given by the relation (12), with respect to Fig. 7 v ST v m. (12) Fig. 8. Closed-loop control architecture for the BDHC. C. Closed-Loop Control of BDHC Fig. 8 shows the closed-loop control architecture of the BDHC. The control scheme for the ac output uses DQ-reference frame control [3], [13]. The control design for dc and ac outputs of conventional converters can be extended to the BDHC control. The controller generates control signals (S1 S4), which form the actual gate signals (GS 1 GS 4 ) of the BDHC switches. The dc (v dcout ) and the ac voltages (v acout ) are regulated by the controller to their references vdcout and (vd,v q), respectively. The controller has been implemented using TMS320F28335 DSP. The built-in 12-b analog-to-digital converter has been used for the purpose of digitization of feedback variables. There are two separate control loops for dc as well as ac voltages. When the dynamics of the dc output control is faster than that of the ac controller, both the dc and ac

7 1088 IEEE TRANSACTIONS ON INDUSTRY APPLICATIONS, VOL. 50, NO. 2, MARCH/APRIL 2014 TABLE II COMPARISON BETWEEN BDHC AND CONVENTIONAL ARCHITECTURES Fig. 9. Higher gain can be achieved by using QBDHC. outputs can be regulated separately using the control variables D st and M a, respectively. The ac voltage control uses a cascade control system with an inner current loop and an outer voltage loop. The superior cross-regulation behavior of the converter has been demonstrated in the experimental section. V. C OMPARATIVE ANALYSIS OF BDHC WITH CONVENTIONAL DESIGNS The BDHC can generate simultaneous dc and ac outputs from a single dc input. Conventional solutions used to realize dc as well as ac outputs involve separate boost converter as well as VSI [see Fig. 2(a)] or a boost cascaded VSI [see Fig. 2(b)]. Table II shows a comparison between the three solutions. The proposed BDHC has the following advantages. 1) Inherent shoot-through protection. The problems associated with the misgating-on of the two complementary switches of each inverter leg due to EMI or other spurious noise have been eliminated by the proposed topology. The shoot-through condition does not cause problems in the operation of the circuit and hence improves the reliability of the system. On the contrary, having a shoot-through is necessary for boost converter cascaded VSI operation. 2) The implementation of deadtime is not essential for this topology. This improves the nature of the inverter output with respect to its harmonic content [14]. In traditional PWM inverters, deadtime compensation circuitry may be needed to compensate the distortion in output voltage due to deadtime circuit. 3) The number of controllable switches is reduced when compared to a boost cascaded inverter topology [see Fig. 2(b)]; both the VSI and boost converter are controlled using the same bridge configuration, thus reducing control circuit. 4) In this topology, the duty ratio and modulation index of the dc and ac structure can be independently controlled. In contrast to a ZSI or SBI [6], the maximum duty cycle for dc dc conversion is not limited to 0.5. Thus, when the BDHC is not used for dc ac operation, the converter can be solely used for boost operation. 5) The current during the boost interval of the boost converter alternates between the two legs of the inverter. This enables the use of higher switching frequency for the boost converter, thus reducing the magnetic size and improving the dynamics of the system. 6) The converter can supply both ac and dc loads from a single dc input supply. The converter can also be adapted to generate ac outputs at frequencies other than line frequencies by a suitable choice of the reference carrier waveform. The major limitation for the BDHC is that the degree of freedom is reduced when the relation (3) reaches equality condition. Another limitation for the converter is that, compared to the circuit of Fig. 2(b), the peak value of the ac output is less than the input voltage. However, for the ac output voltage realized using the configuration shown in Fig. 2(a), in practical situations, the maximum modulation index is around 0.85, which makes the maximum peak ac voltage to be 0.85 times the input. A similar peak ac voltage can be achieved by the BDHC using a lower modulation index by having a suitable value of the duty ratio. VI. HIGHER ORDER BOOST-BASED HYBRID TOPOLOGIES The maximum output-to-input gain achieved by the boost converter is limited to approximately four due to resistive losses [15]. Higher order boost converters with a single controllable switch have been described in [16] [18], which achieve higher gains compared to a boost converter. Fig. 9 shows the schematic of the quadratic BDHC (QBDHC), which has been derived from the single-switch controlled quadratic boost converter. Thus, in general, the family of nth-order boost converters with single switch can be modified to form the corresponding family of hybrid boost converters. VII. EXPERIMENTAL VERIFICATION The behavior of hybrid converters, described in this paper, has been validated using a laboratory prototype. A 600-W IGBT-based laboratory prototype has been used to demonstrate the characteristics of the BDHC. For the purpose of designing the passive components, the ripple contents (both high- and low-frequency components) in the inductor current and the capacitor voltage have been taken to be 25% and 3%, respectively, at the rated power. Based on the equations described in Section III, the components for the BDHC have been designed. The controller of the prototype is implemented using the TMS320F28335 DSP kit. The SKYPER 32 Pro floating gate

8 RAY AND MISHRA: BOOST-DERIVED HYBRID CONVERTER WITH SIMULTANEOUS DC AND AC OUTPUTS 1089 TABLE III DESIGN EXAMPLE SPECIFICATIONS OF THE BDHC (OPEN-LOOP OPERATION) TABLE IV PARAMETERS OF THE BDHC PROTOTYPE Fig. 11. Experimental validation of the proposed PWM control. Fig. 10. Photograph of the IGBT-based laboratory prototype of the BDHC. TABLE V COMPONENT LIST drivers drive the IGBTs. A complete list of parameters and component values for the prototype is given in Tables III and IV. Fig. 10 shows the photograph of the experimental setup. Table V lists the components used for building the BDHC prototype. A. Steady-State Behavior of BDHC Fig. 11 shows the gate control signals for the BDHC switches and the resulting switch node voltage (v sn ) (referring to Figs. 3(b) and 8). The control schematic described in Section IV has been used for the generation of the gate signals. The waveforms validate that, whenever the switches S 1 and S 4 or S 2 and S 3 are on at the same time, v sn =0. This interval refers to shoot-through, and it controls the dc output. The ac output is modulated using the reference signal v m (t). Fig. 12. Steady-state behavior of the BDHC in open loop. The converter produces a dc output (v dcout ) as well as an ac output (v acout) from an input voltage (v dcin ) of 48 V dc (Ch. 1). (a) DC output of 75.4 V (Ch. 4) and ac output of 30 V (rms) (Ch. 2) for D st =0.4and M a =0.6. (b) DC output of 108 V dc (Ch. 4) and ac output of 30 V (rms) (Ch. 2) for D st =0.6 and M a =0.4. Fig. 12(a) and (b) shows the steady-state open-loop behavior of the BDHC. For an input voltage of 48 V dc, the output dc voltages achieved are 75.4 V and 108 V dc for duty cycles of 0.4 and 0.6, respectively. The ac output is 30 V (rms) for modulation indices of 0.6 and 0.4, respectively. From these results, it is validated that, when the equality condition of relation (3) is maintained, for any value of duty (D st ), the magnitude of the ac output voltage is always times the input voltage. Here, the dc and ac loads are 30 and 9 Ω, respectively. Hence, the prototype serves 390-W dc and 110-W ac loads approximately. From (4) and (5), the ratio of dc power to ac power is equal to 2R ac /M 2 a.r dc, i.e., 3.75 (for D st =0.6 and M a =0.4). Thus, the theoretically calculated power relationship closely matches the experimentally observed values.

9 1090 IEEE TRANSACTIONS ON INDUSTRY APPLICATIONS, VOL. 50, NO. 2, MARCH/APRIL 2014 Fig. 13. Steady-state input current and ripple variation of the BDHC state variables. The converter produces a dc output (v dcout ) of 105 V (Ch. 2) as well as an ac output (v acout) of 27 V (rms) (Ch. 4) for an input voltage (v dcin ) of 48 V dc (Ch. 1). The variation of input inductor current is shown for D st =0.6 and M a =0.4. (a)c=1mf, i L (Ch. 3) having average of 12 A. (b) C= 3 mf, i L (Ch. 3) having average of 12 A is compared with the input current obtained in Fig. 13(a) (Ch. A). Fig. 15. Comparison of (a) dc gains as well as (b) ac gains achieved using (i) separate boost converter and a VSI, (ii) boost cascaded VSI, (iii) BDHC, (iv) QBDHC, and (v) experimental prototype. The modulation index for cases (i) and (ii) has been taken as 0.8. For the remaining cases, M a =1 D st. Fig. 14. Switching waveforms of BDHC. The figure shows the input voltage (v dcin ), switch node voltage (v sn), diode current (i D ), and inverter output (v ab ) voltages. (a) v ab > 0.(b)v ab < 0. Here, D st =0.55,andM a =0.35. The input voltage is 48 V. The steady-state waveform of the input inductor current [i L in Fig 13(a)] for an input voltage of 48 V dc with D st =0.6 and M a =0.4 is shown in Fig. 13(a). Fig. 13(b) shows the comparison of the current waveforms when the output capacitance is changed from 1 mf [Ch. A of Fig. 13(b)] to 3 mf [Ch. 3 of Fig. 13(b)]. It can be seen that the increase in capacitance has an effect on the ripple content of both the output voltage and the input inductor current, as described in relation (10). Fig. 14 shows the switching waveforms of the BDHC. This figure validates that the power interval occurs only when the switch node (v sn ) is positive. The diode current is dependent upon the input inductor current as well as the current into the inverter bridge legs, as described in Table I. These results are the same as the waveforms shown in Fig. 4.

10 RAY AND MISHRA: BOOST-DERIVED HYBRID CONVERTER WITH SIMULTANEOUS DC AND AC OUTPUTS 1091 Fig. 16. Cross-regulation behavior of the BDHC when subjected to step change in loads (dc as well as ac). (a) 50% step-downinacload.(b)50% step-upinac load. (c) 50% step-up in dc load. (d) 50% step-down in dc load. The load values are (a and b) R dc =32.8 Ωwith R ac changing between 8.3 and 20.8 Ω and (c and d) R ac =8.5 Ωwith R dc changing between 75 and 31.8 Ω. B. Variation of Gain With Duty Cycle The dc as well as ac voltage gains of the experimental prototype have been plotted against the duty cycle (D st ) and shown in Fig. 15(a) and (b). A 48-V dc input is used to obtain the experimental data points. In order to achieve the highest ac gain, the modulation index satisfies the equality condition of relation (3). The results have been compared with theoretical gains of conventional architectures such as separate boost converter and VSI, boost cascaded VSI, BDHC, and QBDHC. For the purpose of analysis, it has been assumed that the modulation index for traditional VSI is 0.8, in order to achieve a practical value of high ac output. Clearly, a boost cascaded VSI achieves a higher ac conversion ratio compared to the proposed converter at the cost of reduced EMI immunity. However, for a higher ac or dc conversion ratio, a QBDHC can be used. C. Cross-Regulation of BDHC The closed-loop schematic, described in Section IV, has been used to regulate both dc and ac outputs. The dc as well as the ac outputs can be controlled independently using the two control parameters D st and M a, respectively, so long as relation (3) is satisfied. The cross-regulation behavior of the converter has been shown in Fig. 16. These results show that both the dc and ac outputs are well regulated, even during a step change in loads in either outputs. The converter efficiency has been measured to be 86.12% for a total output of 370 W (dc power of 334 W and ac power of 36 W) and 88.1% at the total output power of 564 W (dc power of 492 W and ac power of 72 W). D. Operation With Step-Up Transformer When the BDHC is operated from a 48-V input voltage, the ac output voltage needs to be stepped up by using a transformer to achieve practical voltage levels. Experimental results have been shown when a 1:5 step-up transformer is connected to the ac output of the BDHC. The transformer output is shown as Nv acout in Fig. 17. The figure shows results when connected to different ac loads at 110 V ac (rms) and 100 V dc.

11 1092 IEEE TRANSACTIONS ON INDUSTRY APPLICATIONS, VOL. 50, NO. 2, MARCH/APRIL 2014 Fig. 17. Transformer (1 : 5) coupled BDHC with 110-V ac loads. Response of the prototype to (a) resistive ac load of 110 Ω, (b) inductive load of 0.75 (lag) power factor load, and (c) nonlinear load. APPENDIX The expressions for the switch currents of BDHC in different intervals are shown in Tables VI VIII. TABLE VI SWITCH CURRENTS OF BDHC FOR THE SHOOT-THROUGH INTERVAL Fig. 18. QBDHC behavior for an input voltage of 48 V dc with D=0.4and M a =0.5. TABLE VII SWITCH CURRENTS OF BDHC FOR THE POWER INTERVAL E. Verification of High-Gain Boost Extensions Hybrid converters with higher gains can be achieved when the proposed circuit modification principle is extended to higher order converters. Fig. 18 shows that, when a QBDHC is used instead of the BDHC, for an input voltage of 48 V dc, output voltages of 94 V dc as well as 34 V ac (rms) have been obtained for a duty cycle of 0.4 and a modulation index of 0.5. TABLE VIII SWITCH CURRENT OF BDHC FOR THE ZERO INTERVAL VIII. CONCLUSION This paper has proposed hybrid power converter topologies which can supply simultaneous dc and ac loads from a single dc input. The various advantages of using this single converter stage like shoot-through protection have been described and compared to traditional VSIs. It has been shown that a class of converters can be achieved by describing the BDHC and QBDHC. Experimental results verify the operation of the BDHC in an open loop. The cross-regulation behavior of the converter has been studied along with its behavior to different load types. ACKNOWLEDGMENT The authors would like to thank R. Adda and K. Jha, Research Scholars in the Power Management Laboratory, Indian Institute of Technology Kanpur, for assisting in the development of the prototype and for providing useful suggestions for the improvement of the manuscript. O. Ray would like to thank the Department of Science and Technology, Government of India, for providing travel support for presenting a part of this work at the 2012 Energy Conversion Congress and Exposition through its International Travel Support Scheme.

12 RAY AND MISHRA: BOOST-DERIVED HYBRID CONVERTER WITH SIMULTANEOUS DC AND AC OUTPUTS 1093 REFERENCES [1] D. Boroyevich, I. Cvetkovic, D. Dong, R. Burgos, F. Wang, and F. Lee, Future electronic power distribution systems A contemplative view, in Proc. 12th Int. Conf. OPTIM Elect. Electron. Equip., Brasov, Romania, May 20 22, 2010, pp [2] F. Blaabjerg, Z. Chen, and S. B. Kjaer, Power electronics as efficient interface in dispersed power generation systems, IEEE Trans. Power Electron., vol. 19, no. 5, pp , Sep [3] O. Ray, S. Mishra, A. Joshi, V. Pradeep, and A. Tiwari, Implementation and control of a bidirectional high-gain transformer-less standalone inverter, in Proc. IEEE Energy Convers. Congr. Expo., Raleigh, NC, USA, Sep. 2012, pp [4] F. Z. Peng, Z-source inverter, IEEE Trans. Ind. Appl., vol. 39, no. 2, pp , Mar./Apr [5] C. J. Gajanayake, F. L. Luo, H. B. Gooi, P. L. So, and L. K. Siow, Extended-boost Z-source inverters, IEEE Trans. Power Electron., vol. 25, no. 10, pp , Oct [6] S. Upadhyay, R. Adda, S. Mishra, and A. Joshi, Derivation and characterization of switched-boost inverter, in Proc. 14th Eur. Conf. Power Electron. Appl. EPE, Birmingham, U.K., Aug. 2011, pp [7] S. Mishra, R. Adda, and A. Joshi, Inverse Watkins-Johnson topology based inverter, IEEE Trans. Power Electron., vol. 27, no. 3, pp , Mar [8] S. Mishra, R. Adda, and A. Joshi, Switched-boost inverter based on inverse Watkins-Johnson topology, in Proc. IEEE ECCE, Phoenix, AZ, USA, Sep. 2011, pp [9] R. Tymerski and V. Vorperian, Generation, classification and analysis of switched-mode dc-to-dc converters by the use of switched-inductor-cells, in Proc. Int. Telecommun. Energy Conf., Oct. 1986, pp [10] R. Adda, S. Mishra, and A. Joshi, A PWM control strategy for switchedboost inverter, in Proc. IEEE ECCE, Phoenix, AZ, USA, Sep. 2011, pp [11] F. Z. Peng, M. Shen, and Z. Qian, Maximum boost control of the Z-source inverter, IEEE Trans. Power Electron., vol. 20, no. 4, pp , Jul [12] M. Shen, J. Wang, A. Joseph, F. Z. Peng, L. M. Tolbert, and D. J. Adams, Constant boost control of the Z-source inverter to minimize current ripple and voltage stress, IEEE Trans. Ind. Appl., vol. 42, no. 3, pp , May/Jun [13] R. Adda, O. Ray, S. Mishra, and A. Joshi, Synchronous-reference-framebased control of switched boost inverter for standalone dc nanogrid applications, IEEE Trans. Power Electron., vol. 28, no. 3, pp , Mar [14] S. H. Hwang and J. M. Kim, Dead time compensation method for voltage-fed PWM inverter, IEEE Trans. Energy Convers., vol. 25, no. 1, pp. 1 10, Mar [15] R. W. Erickson and D. Maksimovic, Fundamentals of Power Electronics, 2nd ed. New York, NY, USA: Springer-Verlag, [16] J. A. Morales-Saldaña, R. Galarza-Quirino, J. Leyva-Ramos, E. E. Carbajal-Gutierrez, and M. G. Ortiz-Lopez, Modeling and control of a cascade boost converter with a single switch, in Proc. IEEE IECON, Paris, France, Nov. 7 10, 2006, pp [17] B.-R. Lin, J.-J. Chen, and F.-Y. Hsieh, Analysis and implementation of a bidirectional converter with high conversion ratio, in Proc. IEEE ICIT, 2008, pp [18] D. Maksimovic and S. Cuk, Switching converters with wide dc conversion range, IEEE Trans. Power Electron., vol. 6, no. 1, pp , Jan Olive Ray (S 12) received the B.E.E. degree in electrical engineering from Jadavpur University, Kolkata, India, in 2009 and the M.Tech. degree in electrical engineering from the Indian Institute of Technology Kanpur, Kanpur, India, in 2011, where he is currently working toward the Ph.D. degree in the Department of Electrical Engineering. His research interests include power converter modeling and control, dc distribution systems, and digital control in power electronics. Santanu Mishra (S 00 M 04 SM 12) received the B.Tech. degree in electrical engineering from the College of Engineering and Technology, Bhubaneswar, Odisha, India, in 1998, the M.Tech. degree in energy systems engineering from the Indian Institute of Technology Madras, Chennai, India, in 2000, and the Ph.D. degree from the Department of Electrical and Computer Engineering, University of Florida, Gainesville, FL, USA, in He was a Senior and Staff Application Engineer with the International Rectifier Corporation from 2004 to He is currently an Associate Professor with the Indian Institute of Technology Kanpur, Kanpur, India. His research interests include renewable power conversion, high-frequency power converters, and converter modeling and control.