MP A, 15V, 800KHz Synchronous Buck Converter

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The Future of Analog IC Technology TM TM MP0.5A, 5, 00KHz Synchronous Buck Converter DESCRIPTION The MP0 is a.5a, 00KHz synchronous buck converter designed for low voltage applications requiring high efficiency. It is capable of providing output voltages as low as 0.9, and integrates top and bottom switches to minimize power loss and component count. The 00KHz switching frequency reduces the size of filtering components, further reducing the solution size. The MP0 includes cycle-by-cycle current limiting and under voltage lockout. The internal power switches, combined with the tiny 0-pin MSOP and QFN packages, provide a solution requiring a minimum of surface area. EALUATION BOARD REFERENCE Board Number Dimensions E0DQ/DK-00A.5 X x.0 Y x 0.5 Z FEATURES.5A Output Current Synchronous Rectification Internal 0mΩ and 55mΩ Power Switches Input Range of. to 5 >90% Efficiency Zero Current Shutdown Mode Under oltage Lockout Protection Soft-Start Operation Thermal Shutdown Internal Current Limit (Source & Sink) Tiny 0-Pin MSOP or QFN Package APPLICATIONS DC/DC Regulation from Wall Adapters Portable Entertainment Systems Set Top Boxes Digital ideo Cameras, DECT Networking Equipment Wireless Modems MPS and The Future of Analog IC Technology are Trademarks of Monolithic Power Systems, Inc. TYPICAL APPLICATION INPUT. to 5 OFF ON R4 C5 0nF C C3 3.3nF R3 5 3 RUN SS 7 IN COMP MP0 REF SGND 4 C 0 0nF 9 PGND C7 0nF R L R PUT. /.5A C MP0_TAC_S0 EFFICIENCY (%) Efficiency vs. Load Current 00 90 IN =3.3 0 70 0 IN =5 50 40 30 0 0 0 0.0 0. 0 LOAD CURRENT (A) MP0_TAC_EC0 MP0 Rev.. www.monolithicpower.com

PACKAGE REFERENCE TOP IEW TOP IEW SS COMP REF RUN 3 4 5 0 9 7 SGND PGND IN SS COMP REF RUN 3 4 5 0 9 7 SGND PGND IN MP0_PD0-MSOP0 EXPOSED PAD ON BACKSIDE MP0_PD0-QFN0 Part Number* Package Temperature MP0DK MSOP0 40 C to +5 C * For Tape & Reel, add suffix Z (eg. MP0DK Z) For Lead Free, add suffix LF (eg. MP0DK LF Z) ABSOLUTE MAXIMUM RATINGS () Input Supply oltage IN... oltage... 0.3 to IN + 0.3 to oltage... 0.3 to + oltage on All Other Pins... 0.3 to + Storage Temperature... 55 C to +50 C Recommended Operating Conditions () Input Supply oltage IN... to 5 Output oltage...0.9 to 5.5 Operating Temperature... 40 C to +5 C Part Number** Package Temperature MP0DQ QFN0 (3mm x 3mm) 40 C to +5 C ** For Tape & Reel, add suffix Z (eg. MP0DQ Z) For Lead Free, add suffix LF (eg. MP0DQ LF Z) Thermal Resistance (3) θ JA θ JC MSOP0... 50... 5... C/W QFN0... 50...... C/W Notes: ) Exceeding these ratings may damage the device. ) The device is not guaranteed to function outside of its operating conditions. 3) Measured on approximately square of oz copper. ELECTRICAL CHARACTERISTICS IN = 5.0, T A = +5 C, unless otherwise noted. Parameter Symbol Condition Min Typ Max Units Input oltage Range IN. 5 Input Under oltage Lockout. Input Under oltage Lockout Hysteresis 00 m Shutdown Supply Current RUN 0.3 0.5.0 µa Operating Supply Current RUN >, =... ma REF oltage REF IN =. to 5.4 RUN Input Low oltage IL 0.4 RUN Input High oltage HL.5 RUN Hysteresis 00 m RUN Input Bias Current µa Oscillator Switching Frequency f SW 700 00 900 KHz Maximum Duty Cycle D MAX = 0.7 5 % Minimum On Time t ON 00 ns MP0 Rev.. www.monolithicpower.com

ELECTRICAL CHARACTERISTICS (continued) IN = 5.0, T A = +5 C, unless otherwise noted. Parameter Symbol Condition Min Typ Max Units Error Amplifier oltage Gain A EA 400 / Transconductance G EA 300 µa/ COMP Maximum Output Current ±30 µa Regulation oltage 75 95 95 m Input Bias Current I = 0.95 00 na Soft-Start Soft-Start Current I SS µa Output Switch On-Resistance Switch On Resistance IN = 5 55 mω IN = 3 35 mω Synchronous Rectifier On Resistance IN = 5 0 mω IN = 3 55 mω Switch Current Limit (Source).5 A Synchronous Rectifier Current Limit (Sink) 350 ma Thermal Shutdown 0 C PIN FUNCTIONS Pin # SS Name Description 3 COMP 4 REF 5 RUN 7 IN Soft-Start Input. Place a capacitor from SS to SGND to set the soft-start period. The MP0 sources µa from SS to the soft-start capacitor at startup. As the SS voltage rises, the feedback threshold voltage increases to limit inrush current during startup. Feedback Input. is the inverting input of the internal error amplifier. Connect a resistive voltage divider from the output voltage to to set the output voltage value. Compensation Node. COMP is the output of the error amplifier. Connect a series RC network to compensate the regulation control loop. Internal.4 Regulator Bypass. Connect a 0nF capacitor between REF and SGND to bypass the internal regulator. Do not apply any load to REF. On/Off Control Input. Drive RUN high to turn on the MP0; low to turn it off. For automatic startup, connect RUN to IN via a pullup resistor. Power Switch Boost. powers the gate of the high-side N-Channel power MOSFET switch. Connect a 0nF or greater capacitor between and. Internal Power Input. IN supplies the power to the MP0 through the internal LDO regulator. Bypass IN to PGND with a 0µF or greater capacitor. Connect IN to the input source voltage. Output Switching Node. is the source of the high-side N-Channel switch and the drain of the low-side N-Channel switch. Connect the output LC filter between and the output. Power Ground. PGND is the source of the N-Channel MOSFET synchronous rectifier. Connect 9 PGND PGND to SGND as close to the MP0 as possible. 0 SGND Signal Ground. MP0 Rev.. www.monolithicpower.com 3

TYPICAL PERFORMANCE CHARACTERISTICS Circuit of Figure, IN = 5, =., L = 5µH, C = 0µF, C = µf, T A = +5 C, unless otherwise noted. Steady State Operation.5A Load Steady State Operation No Load Load Transient SW 5/div. O AC Coupled 0m/div. IN AC Coupled 00m/div. A/div. SW 5/div. O AC Coupled 0m/div. IN AC Coupled 0m/div. A/div. AC Coupled 00m/div. A/div. OAD A/div. MP0-TPC0 MP0-TPC0 MP0-TPC03 Startup from Shutdown.5A Resistive Load Startup from Shutdown No Load EN /div. EN /div. /div. /div. A/div. A/div. SW 5/div. SW 5/div. ms/div. MP0-TPC04 ms/div. MP0-TPC05 Short Circuit Protection Short Circuit Recovery /div. /div. A/div. A/div. MP0-TPC0 MP0-TPC07 MP0 Rev.. www.monolithicpower.com 4

OPERATION IN 7 C IN. to 5 OFF ON RUN 5 ENABLE CKT & LDO REGULATOR GATE DRIE REGULATOR dr CURRENT SENSE AMPLIFIER + -- C REF 4 BP.4 00KHz OSCILLATOR PWM COMPARATOR + -- CONTROL LOGIC dr dr C7 L C C5 SS BP RAMP CURRENT LIMIT COMPARATOR ULO & THERMAL SHUTDOWN + -- + -- -- GM -- ERROR + AMPLIFIER PGND 9 R CURRENT LIMIT THRESHOLD 0.95 R 0 SGND 3 COMP C4 R3 C3 MP0_BD0 Figure Functional Block Diagram MP0 Rev.. www.monolithicpower.com 5

The MP0 measures the output voltage through an external resistive voltage divider and compares that voltage to the internal 0.9 reference in order to generate the error voltage at COMP. The current-mode regulator uses the voltage at COMP and compares it to the inductor current to regulate the output voltage. The use of current-mode regulation improves transient response and improves control loop stability. At the beginning of each cycle, the high-side N-Channel MOSFET is turned on, forcing the inductor current to rise. The current at the drain of the high-side MOSFET is internally measured and converted to a voltage by the current sense amplifier. That voltage is compared to the error voltage at COMP. When the inductor current rises sufficiently, the PWM comparator turns off the high-side switch and turns on the low-side switch, forcing the inductor current to decrease. The average inductor current is controlled by the voltage at COMP, which in turn is controlled by the output voltage. Thus the output voltage controls the inductor current to satisfy the load. Since the high-side N-Channel MOSFET requires voltages above IN to drive its gate, a bootstrap capacitor from to is required to drive the high-side MOSFET gate. When is driven low (through the low-side MOSFET), the capacitor is internally charged. The voltage at is applied to the high-side MOSFET gate to turn it on, and maintains that voltage until the high-side MOSFET is turned off and the low-side MOSFET is turned on, and the cycle repeats. Connect a 0nF or greater capacitor from to SW to drive the high-side MOSFET gate. APPLICATION INFORMATION INPUT. to 5 C5 0nF C4 OPEN C3 3.3nF 5 3 RUN SS C 0nF IN COMP REF 4 7 MP0 SGND 0 PGND C7 0nF 9 PUT. /.5A MP0_TAC_F0 Figure Typical Application Circuit Internal Low-Dropout Regulator The internal power to the MP0 is supplied from the input voltage (IN) through an internal.4 low-dropout linear regulator, whose output is REF. Bypass REF to SGND with a 0nF or greater capacitor for proper operation. The internal regulator can not supply more current than is required to operate the MP0. Therefore, do not apply any external load to REF. Soft-Start The MP0 includes a soft-start timer that slowly ramps the output voltage at startup to prevent excessive current at the input. When power is applied to the MP0, and RUN is asserted, a µa internal current source charges the external capacitor at SS. As the capacitor charges, the voltage at SS rises. The MP0 internally limits the feedback threshold voltage at to that of the voltage at SS. This forces the output voltage to rise at the same rate as the voltage at SS, forcing the output MP0 Rev.. www.monolithicpower.com

voltage to ramp linearly from 0 to the desired regulation voltage during soft-start. The soft-start period is determined by the equation: t SS = 0.45 C5 Where C5 (in nf) is the soft-start capacitor from SS to GND, and t SS (in ms) is the soft-start period. Determine the capacitor required for a given soft-start period by the equation: C 5 =. t SS Use values between 0nF and nf for C5 to set the soft-start period (between 4ms and 0ms). Setting the Output oltage (see Figure ) Set the output voltage by selecting the resistive voltage divider ratio. The voltage divider drops the output voltage to the 0.95 feedback voltage. Use 0kΩ for the low-side resistor of the voltage divider. Determine the high-side resistor by the equation: R = R 0.95 Where R is the high-side resistor, is the output voltage and R is the low-side resistor. Selecting the Input Capacitor The input current to the step-down converter is discontinuous, and so a capacitor is required to supply the AC current to the step-down converter while maintaining the DC input voltage. A low ESR capacitor is required to keep the noise at the IC to a minimum. Ceramic capacitors are preferred, but tantalum or low ESR electrolytic capacitors may also suffice. The capacitor can be electrolytic, tantalum or ceramic. Because it absorbs the input switching current it must have an adequate ripple current rating. Use a capacitor with RMS current rating greater than / of the DC load current. For stable operation, place the input capacitor as close to the IC as possible. A smaller high quality 0.µF ceramic capacitor may be placed closer to the IC with the larger capacitor placed further away. If using this technique, it is recommended that the larger capacitor be a tantalum or electrolytic type. All ceramic capacitors should be placed close to the MP0. For most applications, a 0µF ceramic capacitor will work. Selecting the Output Capacitor The output capacitor (C) is required to maintain the DC output voltage. Low ESR capacitors are preferred to keep the output voltage ripple to a minimum. The characteristics of the output capacitor also affect the stability of the regulation control system. Ceramic, tantalum, or low ESR electrolytic capacitors are recommended. The output voltage ripple is: f RIPPLE SW = L IN R ESR + f C Where RIPPLE is the output voltage ripple, f SW is the switching frequency, IN is the input voltage, R ESR is the equivalent series resistance of the output capacitors and f SW is the switching frequency. Choose an output capacitor to satisfy the output ripple requirements of the design. A µf ceramic capacitor is suitable for most applications. Selecting the Inductor The inductor is required to supply constant current to the output load while being driven by the switched input voltage. A larger value inductor results in less ripple current that will result in lower output ripple voltage. However, the larger value inductor is likely to have a larger physical size and higher series resistance. Choose an inductor that does not saturate under the worst-case load conditions. A good rule for determining the inductance is to allow the peak-to-peak ripple current to be approximately 30% to 40% of the maximum load current. Make sure that the peak inductor current (the load current plus half the peak-topeak inductor ripple current) is below.5a to prevent loss of regulation due to the current limit. SW MP0 Rev.. www.monolithicpower.com 7

Calculate the required inductance value by the equation: L = IN ( ) f IN SW I Where I is the peak-to-peak inductor ripple current. It is recommended to choose I to be 30%~40% of the maximum load current. Compensation The system stability is controlled through the COMP pin. COMP is the output of the internal transconductance error amplifier. A series capacitor-resistor combination sets a pole-zero combination to control the characteristics of the control system. The DC loop gain is: A DC = A EA GCS RLOAD Where is the feedback voltage, A EA is the transconductance error amplifier voltage gain, G CS is the current sense transconductance (roughly the output current divided by the voltage at COMP) and R LOAD is the load resistance: R LOAD = I Where I is the output load current. The system has poles of importance, one is due to the compensation capacitor (C3), and the other is due to the load resistance and the output capacitor (C), where: f P G = π A EA EA C3 P is the first pole, and G EA is the error amplifier transconductance (300µA/) and f P = π R LOAD C The system has one zero of importance, due to the compensation capacitor (C3) and the compensation resistor (R3). The zero is: f Z = π R3 C3 If large value capacitors with relatively high equivalent-series-resistance (ESR) are used, the zero due to the capacitance and ESR of the output capacitor can be compensated by a third pole set by R3 and C4. The pole is: f P 3 = π R3 C4 The system crossover frequency (the frequency where the loop gain drops to, or 0dB, is important. Set the crossover frequency to below one tenth of the switching frequency to insure stable operation. Lower crossover frequencies result in slower response and worse transient load recovery. Higher crossover frequencies degrade the phase and/or gain margins and can result in instability. Table Compensation alues for Typical Output oltage/capacitor Combinations C R3 C3 C4. µf Ceramic.kΩ 3.3nF None.5 µf Ceramic 9.kΩ.nF None 3.3 µf Ceramic kω.nf None..5 3.3 47µF Tantalum (300mΩ) 47µF Tantalum (300mΩ) 47µF Tantalum (300mΩ) 3kΩ nf nf kω.nf 750pF 4kΩ nf 50pF Choosing the Compensation Components The values of the compensation components given in Table yield a stable control loop for the given output voltage and capacitor. To optimize the compensation components for conditions not listed in Table, use the following procedure. MP0 Rev.. www.monolithicpower.com

Choose the compensation resistor to set the desired crossover frequency. Determine the value by the following equation: π C R3 = G G EA CS f Where f C is the desired crossover frequency (preferably 33KHz). Choose the compensation capacitor to set the zero below one fourth of the crossover frequency. Determine the value by the following equation: C3 > π R3 Determine if the second compensation capacitor, C4 is required. It is required if the ESR zero of the output capacitor happens at less than half of the switching frequency. Or: π C RESR fsw > If this is the case, then add the second compensation capacitor. Determine the value by the equation: C RESR(max) C4 = R3 Where R ESR(MAX) is the maximum ESR of the output capacitor. f C C External Boost Diode For input voltages less than or equal to 5, it is recommended that an external boost diode be added. This will help improve the regulator efficiency. The diode can be a low cost diode such as an IN44 or BAT54. MP0 5 BOOST DIODE 0nF MP0_F03 Figure 3 External Boost Diode This diode is also recommended for high duty cycle operation (when >5%) and high IN output voltage ( >) applications. However, do not exceed the absolute maximum voltage for these pins. MP0 Rev.. www.monolithicpower.com 9

PACKAGE INFORMATION MSOP0 MP0 Rev.. www.monolithicpower.com 0

QFN0 (3mm x 3mm) NOTICE: The information in this document is subject to change without notice. Please contact MPS for current specifications. Users should warrant and guarantee that third party Intellectual Property rights are not infringed upon when integrating MPS products into any application. MPS will not assume any legal responsibility for any said applications. MP0 Rev.. www.monolithicpower.com