Semiconductor ICL80 September 998 File Number 28. MHz, Four Quadrant Analog Multiplier The ICL80 is a four quadrant analog multiplier whose output is proportional to the algebraic product of two input signals. Feedback around an internal op amp provides level shifting and can be used to generate division and square root functions. A simple arrangement of potentiometers may be used to trim gain accuracy, offset voltage and feedthrough performance. The high accuracy, wide bandwidth, and increased versatility of the ICL80 make it ideal for all multiplier applications in control and instrumentation systems. Applications include RMS measuring equipment, frequency doublers, balanced modulators and demodulators, function generators, and voltage controlled amplifiers. Pinout 2 ICL80 (METAL CAN) TOP VIEW Y OS 0 9 Z OS 8 GND Features Accuracy....................... ±0.5% ( A Version) Input Voltage Range......................... ±0V Bandwidth................................. MHz Uses Standard ±5V Supplies BuiltIn Op Amp Provides Level Shifting, Division and Square Root Functions Ordering Information PART NUMBER MULTIPLI CATION ERROR (MAX) TEMP. RANGE ( o C) PKG ICL80ACTX ±0.5% 0 to 70 0 Pin Metal Can ICL80BCTX ±% 0 to 70 0 Pin Metal Can ICL80CCTX ±2% 0 to 70 0 Pin Metal Can PKG. NO. T0.B T0.B T0.B 7 X OS OUTPUT 5 Functional Diagram X OS VOLTAGE TO CURRENT CONVERTER AND SIGNAL COMPRESSION BALANCED VARIABLE GAIN AMPLIFIER OP AMP OUT Z OS Y OS VOLTAGE TO CURRENT CONVERTER CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. Copyright Harris Corporation 998
ICL80 Absolute Maximum Ratings Supply Voltage...................................... ±8 Input Voltages (,,, X OS, Y OS, Z OS )......... V SUPPLY Operating Conditions Temperature Range ICL80XC................................ 0 o C to 70 o C Thermal Information Thermal Resistance (Typical, Note ) θ JA ( o C/W) θ JC ( o C/W) Metal Can Package............... 0 75 Maximum Junction Temperature (Metal Can Package).......75 o C Maximum Storage Temperature Range.......... 5 o C to 50 o C Maximum Lead Temperature (Soldering 0s)............ 00 o C CAUTION: Stresses above those listed in Absolute Maximum Ratings may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. NOTE:. θ JA is measured with the component mounted on an evaluation PC board in free air. Electrical Specifications T A = 25 o C, V SUPPLY = ±5V, Gain and Offset Potentiometers Externally Trimmed, Unless Otherwise Specified PARAMETER TEST CONDITIONS ICL80A ICL80B ICL80C MIN TYP MAX MIN TYP MAX MIN TYP MAX UNITS Multiplier Function XY 0 XY 0 XY 0 Multiplication Error 0 < X < 0 0 < Y < 0 0.5.0 2.0 % Full Scale Divider Function 0Z X 0Z X 0Z X Division Error X = 0 0. 0. 0. % Full Scale X =.5.5.5 % Full Scale Feedthrough X = 0, Y = ±0V 50 00 200 mv Y = 0, X = ±0V 50 00 50 mv NonLinearity X Input Y Input Frequency Response Small Signal Bandwidth (db) X = 20V PP ±0.5 ±0.5 ±0.8 % Y= ±0V DC Y = 20V PP ±0.2 ±0.2 ±0. % X = ±0V DC.0.0.0 MHz Full Power Bandwidth 750 750 750 khz Slew Rate 5 5 5 V/µs % Amplitude Error 75 75 75 khz % Vector Error (0.5 o Phase Shift) 5 5 5 khz Settling Time (to ±2% of Final Value) Overload Recovery (to ±2% of Final Value) V ln = ±0V µs V ln = ±0V µs Output Noise 5Hz to 0kHz 0. 0. 0. mv RMS 5Hz to 5MHz mv RMS Input Resistance X lnput V ln = 0V 0 0 0 MΩ Y lnput MΩ Z lnput kω 2
ICL80 Electrical Specifications T A =25 o C, V SUPPLY = ±5V, Gain and Offset Potentiometers Externally Trimmed, Unless Otherwise Specified (Continued) PARAMETER Input Bias Current X or Y Input V ln = 0V 2 5 7.5 0 µa Z Input 25 25 25 µa Power Supply Variation Multiplication Error 0.2 0.2 0.2 %/% Output Offset 50 75 00 mv/v Scale Factor 0. 0. 0. %/% Quiescent Current.5.0.5.0.5.0 ma THE FOLLOWING SPECIFICATIONS APPLY OVER THE OPERATING TEMPERATURE RANGES Multiplication Error 0V < < 0V, 0V < < 0V.5 2 % Full Scale Average Temp. Coefficients Accuracy 0.0 0.0 0.0 %/ o C Output Offset 0.2 0.2 0.2 mv/ o C Scale Factor 0.0 0.0 0.0 %/ o C Input Bias Current X or Y Input = 0V 5 5 0 µa Z Input 25 25 5 µa Input Voltage (X, Y, or Z) ±0 ±0 ±0 V Output Voltage Swing 2kΩ C L < 000pF ±0 ±0 ±0 V Schematic Diagram TEST CONDITIONS ICL80A ICL80B ICL80C MIN TYP MAX MIN TYP MAX MIN TYP MAX UNITS Q Q 2 R 2 R 8 R R 2 Q 7 Q 8 Q Q 5 Q Q 7 C Q 2 R 27 Q 25 R R Q Q R R 9 R R 7 Q 9 R Q 0 R 7 R 8 R 20 R 22 R 2 Q 22 Q 2 R R 0 R 28 Z OS COMMON Q 5 Q R 0 Q Q 2 Q 8 Q 9 Q 20 Q 2 Q 2 R 29 Q 27 OUTPUT Y OS R 2 X OS Q 28 Q R R 5 R R 2 R R 5 9 R 2 R 25 R 2
ICL80 Application Information Detailed Circuit Description The fundamental element of the ICL80 multiplier is the bipolar differential amplifier of Figure. The small signal differential voltage gain of this circuit is given by: A V = = r E Substituting r E = = g M The output voltage is thus proportional to the product of the input voltage V ln and the emitter current. In the simple transconductance multiplier of Figure 2, a current source comprising Q, D, and R Y is used. If V Y is large compared with the drop across D, then 2 FIGURE. DIFFERENTIAL AMPLIFIER kt q q = = V r IN E kt V Y I D = 2I R E and Y q = ( V ktr X V Y ) Y 2 q = K (V X x V Y ) = (V X x V Y ) ktr Y R Y Q ID V Y V D D FIGURE 2. TRANSCONDUCTANCE MULTIPLIER There are several difficulties with this simple modulator:. V Y must be positive and greater than V D. 2. Some portion of the signal at V X will appear at the output unless = 0.. V X must be a small signal for the differential pair to be linear.. The output voltage is not centered around ground. The first problem relates to the method of converting the V Y voltage to a current to vary the gain of the V X differential pair. A better method, Figure, uses another differential pair but with considerable emitter degeneration. In this circuit the differential input voltage appears across the common emitter resistor, producing a current which adds or subtracts from the quiescent current in either collector. This type of voltage to current converter handles signals from 0V to ±0V with excellent linearity. I I The second problem is called feedthrough; i.e., the product of zero and some finite Input signal does not produce zero output voltage. The circuit whose operation is illustrated by Figures A, B, and C overcomes this problem and forms the heart of many multiplier circuits in use today. This circuit is basically two matched differential pairs with cross coupled collectors. Consider the case shown in Figure A of exactly equal current sources basing the two pairs. With a small positive signal at V ln, the collector current of Q and Q will increase but the collector currents of Q 2 and Q will decrease by the same amount. Since the collectors are cross coupled the current through the load resistors remains unchanged and independent of the V ln input voltage. In Figure B, notice that with = 0 any variation in the ratio of biasing current sources will produce a common mode voltage across the load resistors. The differential output voltage will remain zero. In Figure C we apply a differential input voltage with unbalanced current sources. If is twice 2 the gain of differential pair Q and Q 2 is twice the gain of pair Q and Q. Therefore, the change in cross coupled collector currents will be unequal and a differential output voltage will result. By replacing the separate biasing current sources with the voltage I = R E FIGURE. VOLTAGE TO CURRENT CONVERTER
ICL80 = 0 V = K (V X V Y ) R /2 /2 Q Q 2 Q Q Q Q 2 Q Q = 0 2 R E FIGURE B. NO INPUT SIGNAL WITH UNBALANCED CURRENT SOURCES = 0V to current converter of Figure we have a balanced multiplier circuit capable of four quadrant operation (Figure 5). /2 /2 = 0 This circuit of Figure 5 still has the problem that the input voltage must be small to keep the differential amplifier in the linear region. To be able to handle large signals, we need an amplitude compression circuit. Q Q 2 Q Q /2 /2 FIGURE A. INPUT SIGNAL WITH BALANCED CURRENT SOURCES = 0V 2 2 /2 I /2 = 0 Q Q 2 Q Q /2 I /2 2 /2 FIGURE C. INPUT SIGNAL WITH UNBALANCED CURRENT SOURCES, DIFFERENTIAL OUTPUT VOLTAGE FIGURE 5. TYPICAL FOUR QUADRANT MULTIPLIER MODULATOR Figure 2 showed a current source formed by relying on the matching characteristics of a diode and the emitter base junction of a transistor. Extension of this idea to a differential circuit is shown in Figure A. In a differential pair, the input voltage splits the biasing current in a logarithmic ratio. (The usual assumption of linearity is useful only for small signals.) Since the input to the differential pair in Figure A is the difference in voltage across the two diodes, which in turn is proportional to the log of the ratio of drive currents, it follows that the ratio of diode currents and the ratio of collector currents are linearly related and independent of amplitude. If we combine this circuit with the voltage to current converter of Figure, we have Figure B. The output of the differential amplifier is now proportional to the input voltage over a large dynamic range, thereby improving linearity while minimizing drift and noise factors. The complete schematic is shown after the Electrical Specifications Table. The differential pair Q and Q form a voltage to current converter whose output is compressed in collector diodes Q and Q 2. These diodes drive the balanced crosscoupled differential amplifier Q 7 /Q 8 Q /Q 5. The gain of these amplifiers is modulated by the voltage to current converter Q 9 and Q 0. Transistors Q 5, Q, Q, and Q 2 are constant current sources which bias the voltage to current converter. The output amplifier comprises transistors Q through Q 27. X x I D X x (I X) (I X) I D 2 FIGURE A. CURRENT GAIN CELL 5
ICL80 MODULATOR R = 0 X I O = IN = 0 OP AMP FIGURE 7A. MULTIPLIER BLOCK DIAGRAM FIGURE B. VOLTAGE GAIN WITH SIGNAL COMPRESSION Definition of Terms Multiplication/Division Error: This is the basic accuracy specification. It includes terms due to linearity, gain, and offset errors, and is expressed as a percentage of the full scale output. Feedthrough: With either input at zero, the output of an ideal multiplier should be zero regardless of the signal applied to the other input. The output seen in a nonideal multiplier is known as the feedthrough. Nonlinearity: The maximum deviation from the best straight line constructed through the output data, expressed as a percentage of full scale. One input is held constant and the other swept through it nominal range. The nonlinearity is the component of the total multiplication/division error which cannot be trimmed out. Typical Applications Multiplication In the standard multiplier connection, the Z terminal is connected to the op amp output. All of the modulator output current thus flows through the feedback resistor R 27 and produces a proportional output voltage. MULTIPLIER TRIMMING PROCEDURE. Set = = 0V and adjust Z OS for zero Output. 2. Apply a ±0V low frequency ( 00Hz) sweep (sine or triangle) to with = 0V, and adjust X OS for minimum output.. Apply the sweep signal of Step 2 to with =0Vand adjust Y OS for minimum Output.. Readjust Z OS as in Step, if necessary. 5. With = 0.0V DC and the sweep signal of Step 2 applied to, adjust the Gain potentiometer for Output =. This is easily accomplished with a differential scope plugin (AB) by inverting one signal and adjusting Gain control for (Output ) = Zero. 5K 7.5K ICL80 7 0 9 Division If the Z terminal is used as an input, and the output of the op amp connected to the Y input, the device functions as a divider. Since the input to the op amp is at virtual ground, and requires negligible bias current, the overall feedback forces the modulator output current to equal the current produced by Z. Note that when connected as a divider, the X input must be a negative voltage to maintain overall negative feedback. DIVIDER TRIMMING PROCEDURE. Set trimming potentiometers at midscale by adjusting voltage on pins 7, 9 and 0 (X OS, Y OS, Z OS ) for 0V. 2. With = 0V, trim Z OS to hold the Output constant, as is varied from 0V through V.. With = 0V and = 0.0V adjust Y OS for zero Output voltage.. With = (and/or = ) adjust X OS for minimum worst case variation of Output, as is varied from 0V to V. 5. Repeat Steps 2 and if Step required a large initial adjustment.. With = (and/or = ) adjust the gain control until the output is the closest average around 0.0V (0V for = ) as is varied from 0V to V. OUTPUT = 0 FIGURE 7B. MULTIPLIER CIRCUIT CONNECTION Therefore I O = = = 0Z R IN 0 Since =, =
ICL80 MODULATOR I O R = I 0 Z 0 = OP AMP output of the modulator is again forced to equal the current produced by the Z input. I O = = ( ) 2 = 0 = 0 FIGURE 8A. DIVISION BLOCK DIAGRAM The output is a negative voltage which maintains overall negative feedback. A diode in series with the op amp output prevents the latchup that would otherwise occur for negative input voltages. (0 TO 0V) 7 0 9 ICL80 OUTPUT = 0 5K GAIN 7.5K SQUARE ROOT TRIMMING PROCEDURE. Connect the ICL80 in the Divider configuration. 2. Adjust Z OS,Y OS,X OS, and Gain using Steps through of Divider Trimming Procedure.. Convert to the Square Root configuration by connecting to the output and inserting a diode between Pin and the output node.. With = 0V adjust Z OS for zero output voltage. Squaring FIGURE 8B. DIVISION CIRCUIT CONNECTION The squaring function is achieved by simply multiplying with the two inputs tied together. The squaring circuit may also be used as the basis for a frequency doubler since cos 2 ωt= / 2 (cos 2ωt ). MODULATOR Z R = I 0 Z = 0 OP AMP I O = V 2 O X R = 0 I O = OP AMP X 2 IN = 0 FIGURE 0A. SQUARE ROOT BLOCK DIAGRAM 7.5kΩ FIGURE 9A. SQUARER BLOCK DIAGRAM 5kΩ SCALE FACTOR ADJUST ICL80 7 0 9 OUTPUT = 2 0 7 0 9 (0V TO 0V) N8 ICL80 GAIN OUTPUT = 0 5K 7.5K FIGURE 0B. ACTUAL CIRCUIT CONNECTION Square Root FIGURE 9B. SQUARER CIRCUIT CONNECTION Tying the X and Y inputs together and using overall feedback from the op amp results in the square root function. The Variable Gain Amplifier Most applications for the ICL80 are straight forward variations of the simple arithmetic functions described above. Although the circuit description frequently disguises the fact, it has already been shown that the frequency doubier is nothing more than a squaring circuit. Similarly the variable gain amplifier is nothing more than a multiplier, with 7
ICL80 the input signal applied at the X input and the control voltage applied at the Y input. X OS 20K Y OS 20K Z OS 20K INPUT GAIN CONTROL VOLTAGE 5K Z ICL80 7 0 9 OUTPUT = XY 0 FIGURE 2. POTENTIOMETERS FOR TRIMMING OFFSET AND FEEDTHROUGH 7.5K FIGURE. VARIABLE GAIN AMPLIFIER Typical Performance Curves 00 AMPLITUDE (db) 0 5 0 5 20 PHASE AMPLITUDE 0 0 20 0 0 PHASE (DEGREES) NONLINEARITY (% OF FULL SCALE) 0 0. XINPUT YINPUT 25 50 K 0K 00K M 0M FREQUENCY (Hz) 0.0 00 K 0K 00K FREQUENCY (Hz) FIGURE. FREQUENCY RESPONSE FIGURE. NONLINEARITY vs FREQUENCY 0 20 FEEDTHROUGH (db) 0 0 50 X = 0, Y = 20V PP 0 Y = 0, X = 20V PP 70 K 0K 00K M 0M FREQUENCY (Hz) FIGURE 5. FEEDTHROUGH vs FREQUENCY 8