Preferred Device Triacs Silicon Bidirectional Thyristors Designed primarily for full-wave ac control applications, such as light dimmers, motor controls, heating controls and power supplies; or wherever fullwave silicon gate controlled solidstate devices are needed. Triac type thyristors switch from a blocking to a conducting state for either polarity of applied main terminal voltage with positive or negative gate triggering. Features Blocking oltage to 8 All Diffused and Glass Passivated Junctions for Greater Parameter Uniformity and Stability Small, Rugged, Thermowatt Construction for Low Thermal Resistance, High Heat Dissipation and Durability Gate Triggering Guaranteed in all Four Quadrants For Hz Operation, Consult Factory PbFree Package is Available* MAXIMUM RATINGS (T J = 5 C unless otherwise noted) Rating Symbol alue Unit Peak Repetitive OffState oltage (Note 1) (T J = to +1 C, Sine Wave 5 to 6 Hz, Gate Open) N63 N639 OnState RMS Current (T C = +8 C) Full Cycle Sine Wave 5 to 6 Hz (T C = +9 C) Peak NonRepetitive Surge Current (One Full Cycle, Sine Wave 6 Hz, T C = +5 C) Preceded and followed by rated current DRM, RRM 6 8 I T(RMS) 8.. A I TSM A Circuit Fusing Consideration (t = 8.3 ms) I t A s Peak Gate Power (T C = +8 C, Pulse Width = s) Average Gate Power (T C = +8 C, t = 8.3 ms) Peak Gate Current (T C = +8 C, Pulse Width = s) Peak Gate oltage (T C = +8 C, Pulse Width = s) P GM W P G(A).5 W I GM A GM Operating Junction Temperature Range T J to +15 C Storage Temperature Range T stg to +15 C Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. Indicates JEDEC Registered Data. 1. DRM and RRM for all types can be applied on a continuous basis. Blocking voltages shall not be tested with a constant current source such that the voltage ratings of the devices are exceeded. *For additional information on our PbFree strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. 1 3 TRIACS 8 AMPERES RMS 6 thru 8 OLTS MT TOAB CASE 1A STYLE PIN ASSIGNMENT 1 Main Terminal 1 Main Terminal 3 Gate Main Terminal Preferred devices are recommended choices for future use and best overall value. G A = Assembly Location Y = Year WW = Work Week G = PbFree Package MARKING DIAGRAM N63G AYWW ORDERING INFORMATION Device Package Shipping N63 TOAB 5 Units / Box N63G TOAB (PbFree) 5 Units / Box Semiconductor Components Industries, LLC, 6 May, 6 Rev. 1 Publication Order Number: N63/D
THERMAL CHARACTERISTICS Characteristic Symbol Max Unit Thermal Resistance, JunctiontoCase R JC. C/W Maximum Lead Temperature for Soldering Purposes 1/8 from Case for Sec T L 6 C ELECTRICAL CHARACTERISTICS (T C = 5 C unless otherwise noted; Electricals apply in both directions) Characteristic Symbol Min Typ Max Unit OFF CHARACTERISTICS Peak Repetitive Blocking Current ( D = Rated DRM, RRM ; Gate Open) T J = 5 C T J = C I DRM, I RRM A ma ON CHARACTERISTICS Peak OnState oltage (I TM = 11 A Peak; Pulse Width = 1 to ms, Duty Cycle %) TM 1.3 1.55 Gate Trigger Current (Continuous dc) ( D = 1 dc, R L = ) Quadrant I: MT(+), G(+) Quadrant II: MT(+), G() Quadrant III: MT(), G() Quadrant I: MT(), G(+) MT(+), G(+); MT(), G() T C = C MT(+), G(); MT(), G(+) T C = C N639 only N639 only I GT 1 1 35 5 75 5 75 15 ma Gate Trigger oltage (Continuous dc) ( D = 1 dc, R L = ) Quadrant I: MT(+), G(+) Quadrant II: MT(+), G() Quadrant III: MT(), G() Quadrant I: MT(), G(+) MT(+), G(+); MT(), G() T C = C MT(+), G(); MT(), G(+) T C = C N639 only N639 only GT.9.9 1.1 1..5.5.5 3. Gate NonTrigger oltage (Continuous dc) ( D = Rated DRM, R L = k, T J = C) MT(+), G(+); MT(), G(); MT(+), G(); MT(), G() GD. Holding Current ( D = 1 dc, Gate Open) T C = 5 C (Initiating Current = ma) *T C = C 6. 75 ma Turn-On Time ( D = Rated DRM, I TM = 11 A, I GT = 1 ma, Rise Time =.1 s, Pulse Width = s) t gt 1.5 s DYNAMIC CHARACTERISTICS Critical Rate of Rise of Commutation oltage ( D = Rated DRM, I TM = 11 A, Commutating di/dt =. A/ms, Gate Unenergized, T C = 8 C) dv/dt(c) 5. / s Indicates JEDEC Registered Data.
oltage Current Characteristic of Triacs (Bidirectional Device) + Current Symbol DRM I DRM RRM I RRM Parameter Peak Repetitive Forward Off State oltage Peak Forward Blocking Current Peak Repetitive Reverse Off State oltage Peak Reverse Blocking Current I RRM at RRM on state TM Quadrant 1 MainTerminal + TM Maximum On State oltage Holding Current off state + oltage I DRM at DRM Quadrant 3 MainTerminal TM Quadrant Definitions for a Triac MT POSITIE (Positive Half Cycle) + (+) MT (+) MT Quadrant II N639 only () I GT (+) I GT Quadrant I I GT + I GT () MT () MT Quadrant III () I GT (+) I GT Quadrant I N639 only MT NEGATIE (Negative Half Cycle) All polarities are referenced to. With inphase signals (using standard AC lines) quadrants I and III are used. 3
T C, CASE TEMPERATURE ( C) 96 9 88 8 = CONDUCTION ANGLE = 3 6 9 dc 1 18 P A, AERAGE POWER (WATTS) 8. 6.. = CONDUCTION ANGLE T J C 3 6 dc = 18 1 9 8 3.. 5. 6. I T(RMS), RMS ON-STATE CURRENT, (AMP) 8. 3.. 5. 6. 8. I T(RMS), RMS ON-STATE CURRENT (AMP) Figure 1. RMS Current Derating Figure. OnState Power Dissipation gt, TRIGGER OLTAGE (OLTS) 1.8 5 OFF-STATE OLTAGE = 1 1.6 3 1. 1..8.6 QUADRANTS 1 3 QUADRANT. 6 6 8 1 1 T J, JUNCTION TEMPERATURE ( C) I GT, TRIGGER CURRENT (ma) 5. 6 1 QUADRANT 3 OFF-STATE OLTAGE = 1 6 8 1 T J, JUNCTION TEMPERATURE ( C) 1 Figure 3. Typical Gate Trigger oltage Figure. Typical Gate Trigger Current
i TM, INSTANTANEOUS ON-STATE CURRENT (AMP) 7 5 3 5. 3..7.5.3. T J = C 5 C.1..8 1. 1.6..8 3. 3.6.. v TM, INSTANTANEOUS ON-STATE OLTAGE (OLTS) Figure 5. OnState Characteristics, HOLDING CURRENT (ma), PEAK SURGE CURRENT (AMP) ITSM 5. 3. 6 6 8 1 1 T J, JUNCTION TEMPERATURE ( C) 8 6 CYCLE MAIN TERMINAL # POSITIE OPEN MAIN TERMINAL #1 POSITIE Figure 6. Typical Holding Current T J = C f = 6 Hz Surge is preceded and followed by rated current 3. 5. NUMBER OF CYCLES Figure 7. Maximum NonRepetitive Surge Current r(t), TRANSIENT THERMAL RESISTANCE (NORMALIZED).5..1.5..1.1..5 5. Z JC(t) = r(t) R JC 5 5 k k 5. k k t,time (ms) Figure 8. Typical Thermal Response 5
PACKAGE DIMENSIONS TOAB CASE 1A7 ISSUE AA B F T C T SEATING PLANE S NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y1.5M, 198.. CONTROLLING DIMENSION: INCH. 3. DIMENSION Z DEFINES A ZONE WHERE ALL BODY AND LEAD IRREGULARITIES ARE ALLOWED. H Q Z L G 1 3 N D A K U R J INCHES MILLIMETERS DIM MIN MAX MIN MAX A.57.6 1.8 15.75 B.38.5 9.66.8 C.16.19.7.8 D.5.35.6.88 F.1.17 3.61 3.73 G.95.5..66 H.1.155.8 3.93 J.1..36.55 K.5.56 1.7 1.7 L.5.6 1.15 1.5 N.19..83 5.33 Q..1.5 3. R.8.1.79 S.5.55 1.15 1.39 T.35.55 5.97 6.7 U..5. 1.7.5 1.15 Z.8 STYLE : PIN 1. MAIN TERMINAL 1. MAIN TERMINAL 3.. MAIN TERMINAL ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Typical parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including Typicals must be validated for each customer application by customer s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 817 USA Phone: 33675175 or 83386 Toll Free USA/Canada Fax: 33675176 or 833867 Toll Free USA/Canada Email: orderlit@onsemi.com N. American Technical Support: 889855 Toll Free USA/Canada Europe, Middle East and Africa Technical Support: Phone: 1 33 79 9 Japan Customer Focus Center Phone: 8135773385 6 ON Semiconductor Website: www.onsemi.com Order Literature: http://www.onsemi.com/orderlit For additional information, please contact your local Sales Representative N63/D