Power MOSFET IRFIB6N60A, SiHFIB6N60A PRODUCT SUMMARY V DS (V) 600 R DS(on) (Ω) V GS = V 0.75 Q g (Max.) (nc) 49 Q gs (nc) 3 Q gd (nc) 20 Configuration Single TO-220 FULLPAK D G FEATURES Low Gate Charge Q g Results in Simple Drive Requirement Improved Gate, Avalanche and Dynamic dv/dt Ruggedness Fully Characterized Capacitance and Avalanche Voltage and Current Compliant to RoHS directive 2002/95/EC Available RoHS* COMPLIANT APPLICATIONS Switch Mode Power Supply (SMPS) Uninterruptible Power Supply High Speed Power Switching High Voltage Isolation = 2.5 kv RMS (t = 60 s, f = 60 Hz) G D S S N-Channel MOSFET TYPICAL SMPS TOPOLOGIES Single Transistor Forward Active Clamped Forward ORDERING INFORMATION Package Lead (Pb)-free SnPb TO-220 FULLPAK IRFIB6N60APbF SiHFIB6N60A-E3 IRFIB6N60A SiHFIB6N60A ABSOLUTE MAXIMUM RATINGS T C = 25 C, unless otherwise noted PARAMETER SYMBOL LIMIT UNIT Drain-Source Voltage V DS 600 V Gate-Source Voltage V GS ± 30 Continuous Drain Current V GS at V T C = 25 C 5.5 I D T C = C 3.5 Pulsed Drain Current a I DM 37 Linear Derating Factor 0.48 W/ C Single Pulse Avalanche Energy b E AS 290 mj Repetitive Avalanche Current a I AR 9.2 A Repetitive Avalanche Energy a E AR 6.0 mj Maximum Power Dissipation T C = 25 C P D 60 W Peak Diode Recovery dv/dt c dv/dt 5.0 V/ns Operating Junction and Storage Temperature Range T J, T stg - 55 to 50 Soldering Recommendations (Peak Temperature) for s 300 d C Mounting Torque 6-32 or M3 screw Notes a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. ). b. Starting T J = 25 C, L = 6.8 mh, R G = 25 Ω, I AS = 9.2 A (see fig. 2). c. I SD 9.2 A, di/dt 50 A/µs, V DD V DS, T J 50 C. d..6 mm from case. lbf in. N m * Pb containing terminations are not RoHS compliant, exemptions may apply Document Number: 975 www.vishay.com S09-056-Rev. C, 3-Apr-09
THERMAL RESISTANCE RATINGS PARAMETER SYMBOL TYP. MAX. UNIT Maximum Junction-to-Ambient R thja - 65 C/W Maximum Junction-to-Case (Drain) R thjc - 2. SPECIFICATIONS T J = 25 C, unless otherwise noted PARAMETER SYMBOL TEST CONDITIONS MIN. TYP. MAX. UNIT Static Drain-Source Breakdown Voltage V DS V GS = 0 V, I D = 250 µa 600 - - V V DS Temperature Coefficient ΔV DS /T J Reference to 25 C, I D = ma d - 660 - mv/ C Gate-Source Threshold Voltage V GS(th) V DS = V GS, I D = 250 µa 2.0-4.0 V Gate-Source Leakage I GSS V GS = ± 30 V - - ± na V DS = 600 V, V GS = 0 V - - 25 Zero Gate Voltage Drain Current I DSS V DS = 480 V, V GS = 0 V, T J = 25 C - - 250 µa Drain-Source On-State Resistance R DS(on) V GS = V I D = 3.3 A b - - 0.75 Ω Forward Transconductance g fs V DS = 25 V, I D = 5.5 A 5.5 - - S Dynamic Input Capacitance C iss V GS = 0 V, - 400 - Output Capacitance C oss V DS = 25 V, - 80 - f =.0 MHz, see fig. 5 Reverse Transfer Capacitance C rss - 7. - pf V DS =.0 V, f =.0 MHz - 957 - Output Capacitance C oss V GS = 0 V V DS = 480 V, f =.0 MHz - 49 - Effective Output Capacitance C oss eff. V DS = 0 V to 480 V c - 96 - Total Gate Charge Q g - - 49 Gate-Source Charge Q gs I V GS = V D = 9.2 A, V DS = 400 V, see fig. 6 and 3 b - - 3 nc Gate-Drain Charge Q gd - - 20 Turn-On Delay Time t d(on) - 3 - Rise Time t r V DD = 300 V, I D = 9.2 A, - 25 - R G = 9. Ω, R D = 35.5 Ω, Turn-Off Delay Time t d(off) see fig. b - 30 - ns Fall Time t f - 22 - Drain-Source Body Diode Characteristics D Continuous Source-Drain Diode Current I MOSFET symbol S - - 5.5 showing the G integral reverse Pulsed Diode Forward Current a I SM S p - n junction diode - - 37 A Body Diode Voltage V SD T J = 25 C, I S = 9.2 A, V GS = 0 V b - -.5 V Body Diode Reverse t rr - 530 800 ns Recovery Time T J = 25 C, I F = 9.2 A, di/dt = A/µs b Body Diode Reverse Recovery Charge Q rr - 3.0 4.4 µc Forward Turn-On Time t on Intrinsic turn-on time is negligible (turn-on is dominated by L S and L D ) Notes a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. ). b. Pulse width 300 µs; duty cycle 2 %. c. C oss eff. is a fixed capacitance that gives the same charging time as C oss while V DS is rising from 0 % to 80 % V DS. d. t = 60 s, f = 60 Hz. www.vishay.com Document Number: 975 2 S09-056-Rev. C, 3-Apr-09
TYPICAL CHARACTERISTICS 25 C, unless otherwise noted I D, Drain-to-Source Current (A) VGS TOP 5V V 8.0V 7.0V 6.0V 5.5V 5.0V BOTTOM 4.7V 4.7V I D, Drain-to-Source Current (A) T J = 50 C T J = 25 C 20µs PULSE WIDTH 0. T J = 25 C 0. V DS, Drain-to-Source Voltage (V) Fig. - Typical Output Characteristics V DS= 50V 20µs PULSE WIDTH 0. 4.0 5.0 6.0 7.0 8.0 9.0.0 V GS, Gate-to-Source Voltage (V) Fig. 3 - Typical Transfer Characteristics I D, Drain-to-Source Current (A) VGS TOP 5V V 8.0V 7.0V 6.0V 5.5V 5.0V BOTTOM 4.7V 4.7V 20µs PULSE WIDTH T J = 50 C V DS, Drain-to-Source Voltage (V) Fig. 2 - Typical Output Characteristics R DS(on), Drain-to-Source On Resistance (Normalized) 3.0 I D = 9.2A 2.5 2.0.5.0 0.5 V GS = V 0.0-60 -40-20 0 20 40 60 80 20 40 60 T, Junction Temperature ( J C) Fig. 4 - Normalized On-Resistance vs. Temperature Document Number: 975 www.vishay.com S09-056-Rev. C, 3-Apr-09 3
C, Capacitance (pf) 2400 2000 600 200 800 400 iss oss rss V GS = 0V, f = MHz C iss = C gs C gd, C ds SHORTED C rss = Cgd C oss = C ds Cgd I SD, Reverse Drain Current (A) T J = 50 C T J = 25 C 0 A 0 V DS, Drain-to-Source Voltage (V) Fig. 5 - Typical Capacitance vs. Drain-to-Source Voltage V GS = 0 V 0. 0.2 0.5 0.7.0.2 V SD,Source-to-Drain Voltage (V) Fig. 7 - Typical Source-Drain Diode Forward Voltage V GS, Gate-to-Source Voltage (V) 20 6 2 8 4 I = D 9.2A V DS = 480V V DS = 300V V DS = 20V FOR TEST CIRCUIT SEE FIGURE 3 0 0 20 30 40 50 Q G, Total Gate Charge (nc) Fig. 6 - Typical Gate Charge vs. Gate-to-Source Voltage I D, Drain Current (A) 0 OPERATION IN THIS AREA LIMITED BY R DS(on) us us ms ms TC = 25 C TJ = 50 C Single Pulse 0. 0 00 V DS, Drain-to-Source Voltage (V) Fig. 8 - Maximum Safe Operating Area www.vishay.com Document Number: 975 4 S09-056-Rev. C, 3-Apr-09
R D 6.0 V GS V DS D.U.T. 5.0 R G - V DD I D, Drain Current (A) 4.0 3.0 2.0.0 V Pulse width µs Duty factor 0. % Fig. a - Switching Time Test Circuit V DS 90 % 0.0 25 50 75 25 50 T C, Case Temperature ( C) % V GS t d(on) t r t d(off) t f Fig. 9 - Maximum Drain Current vs. Case Temperature Fig. b - Switching Time Waveforms Thermal Response (Z thjc ) D = 0.50 0.20 0. 0.05 PDM 0. t 0.02 t2 0.0 SINGLE PULSE Notes: (THERMAL RESPONSE). Duty factor D = t / t 2 0.0 2. Peak T J = P DM x Z thjc TC 0.0000 0.000 0.00 0.0 0. t, Rectangular Pulse Duration (s) Fig. - Maximum Effective Transient Thermal Impedance, Junction-to-Case V DS 5 V t p V DS L Driver R G 20 V t p D.U.T. I AS 0.0 Ω - V DD A A I AS Fig. 2a - Unclamped Inductive Test Circuit Fig. 2b - Unclamped Inductive Waveforms Document Number: 975 www.vishay.com S09-056-Rev. C, 3-Apr-09 5
E AS, Single Pulse Avalanche Energy (mj) 600 500 400 300 200 TOP BOTTOM I D 4.A 5.8A 9.2A 0 25 50 75 25 50 Starting T, Junction Temperature ( J C) Fig. 2c - Maximum Avalanche Energy vs. Drain Current Current regulator Same type as D.U.T. Q G 50 kω V Q GS Q GD 2 V 0.2 µf 0.3 µf D.U.T. V - DS V G V GS 3 ma Charge Fig. 3a - Basic Gate Charge Waveform Fig. 3b - Gate Charge Test Circuit I G I D Current sampling resistors www.vishay.com Document Number: 975 6 S09-056-Rev. C, 3-Apr-09
Peak Diode Recovery dv/dt Test Circuit D.U.T. - Circuit layout considerations Low stray inductance Ground plane Low leakage inductance current transformer - - R G dv/dt controlled by R G Driver same type as D.U.T. I SD controlled by duty factor "D" D.U.T. - device under test - V DD Driver gate drive P.W. Period D = P.W. Period V GS = V* D.U.T. I SD waveform Reverse recovery current Body diode forward current di/dt D.U.T. V DS waveform Diode recovery dv/dt V DD Re-applied voltage Inductor current Body diode forward drop Ripple 5 % I SD * V GS = 5 V for logic level devices Fig. 4 - For N-Channel maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and reliability data, see www.vishay.com/ppg?975. Document Number: 975 www.vishay.com S09-056-Rev. C, 3-Apr-09 7
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