MJ141 (PNP), MJ142* (NPN), MJ143* (PNP) *Preferred Devices HighCurrent Complementary Silicon Power Transistors Designed for use in highpower amplifier and switching circuit applications. Features High Current Capability I C Continuous = 6 Amperes DC Current Gain h FE = 151 @ I C = 5 Adc Low CollectorEmitter Saturation oltage CE(sat) = 2.5 (Max) @ I C = 5 Adc PbFree Packages are Available* MAXIMUM RATINGS ( unless otherwise noted) Rating Symbol alue Unit CollectorEmitter oltage MJ141 MJ142/3 CEO 6 8 CollectorBase oltage MJ141 MJ142/3 CBO 6 8 EmitterBase oltage EBO 5. Collector Current Continuous I C 6 Adc Base Current Continuous I B 15 Adc Emitter Current Continuous I E 75 Adc Total Power Dissipation @ T C = 25 C Derate Above 25 C Operating and Storage Junction Temperature Range P D 3 1.71 W W/ C T J, T stg 65 to +2 C Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied, damage may occur and reliability may be affected. 6 AMPERE COMPLEMENTARY SILICON POWER TRANSISTORS 68 OLTS, 3 WATTS TO24 (TO3) CASE 197A STYLE 1 MJ14x = Device Code xx = 1, 2, or 3 G = PbFree Package A = Location Code YY = Year WW = Work Week MEX = Country of Orgin MARKING DIAGRAM MJ14xG AYYWW MEX PD, POWER DISSIPATION (WATTS) 36 33 27 21 15 9 3 4 8 12 16 2 24 T C, CASE TEMPERATURE ( C) Figure 1. Power Derating ORDERING INFORMATION Device Package Shipping MJ141 TO3 1 Units/Tray MJ141G MJ142 TO3 1 Units/Tray MJ142G TO3 1 Units/Tray (PbFree) MJ143 TO3 1 Units/Tray MJ143G TO3 (PbFree) TO3 (PbFree) 1 Units/Tray 1 Units/Tray Preferred devices are recommended choices for future use and best overall value. *For additional information on our PbFree strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. Semiconductor Components Industries, LLC, 25 December, 25 Rev. 6 1 Publication Order Number: MJ141/D
MJ141 (PNP), MJ142* (NPN), MJ143* (PNP) ÎÎ THERMAL CHARACTERISTICS Characteristic Symbol ÎÎ Max Unit Thermal Resistance, JunctiontoCase R JC ÎÎ.584 C/W ÎÎ ELECTRICAL CHARACTERISTICS (T C = 25 C unless otherwise noted) Characteristic Symbol Min Max Unit ÎÎ OFF CHARACTERISTICS CollectorEmitter Sustaining oltage (Note 1) CEO(sus) C = 2 dc, I B = ) MJ141 6 MJ142, MJ143 8 I CEO ( CE = 3, I B = ) MJ141 ( CE = 4, I B = ) MJ1442, MJ143 ÎÎ I ( CE = 6, BE(off) = 1.5 ) MJ141 CEX ( CE = 8, BE(off) = 1.5 ) MJ142, MJ143 ÎÎ ( CB = 6, I E I CBO = ) MJ141 ( CB = 8, I E = ) MJ142, MJ143 Emitter Cutoff Current I EBO ( BE = 5., I C = ) ÎÎ ON CHARACTERISTICS DC Current Gain (Note 1) h FE C = 25 Adc, CE = 3. ) 3 C = 5 Adc, CE = 3. ) 15 1 C = 6 Adc, CE = 3. ) 5. CollectorEmitter Saturation oltage (Note 1) CE(sat) C = 25 Adc, I B = 2.5 Adc) C = 5 Adc, I B = 5. Adc) 2.5 C = 6 Adc, I B = 12 Adc) 3. BaseEmitter Saturation oltage (Note 1) C = 25 Adc, I B = 2.5 Adc) C = 5 Adc, I B = 5. Adc) BE(sat) 2. 3. C = 6 Adc, I B = 12 Adc) 4. ÎÎ DYNAMIC CHARACTERISTICS Output Capacitance C ( CB = 1, I E =, f =.1 MHz) ob 2 ÎÎ pf 1. Pulse Test: Pulse Width 3 s, Duty Cycle 2.%. I C, COLLECTOR CURRENT (AMP) 1 7 5 3 2 1 7. 5. 3. 2. dc T C = 25 C WIRE BOND LIMIT THERMAL LIMIT SECOND BREAKDOWN LIMIT 5. ms ms CE, COLLECTOREMITTER OLTAGE (OLTS) Figure 2. Maximum Rated Forward Biased Safe Operating Area s.7.5.3.2 MJ141.1 MJ142, MJ143 2. 3. 5. 7. 1 2 3 5 7 1 There are two limitations on the power handling ability of a transistor: average junction temperature and second breakdown. Safe operating area curves indicate I C CE limits of the transistor that must be observed for reliable operation: i.e., the transistor must not be subjected to greater dissipation than the curves indicate. The data of Figure 2 is based on T J(pk) = 2 C; T C is variable depending on conditions. Second breakdown pulse limits are valid for duty cycles to 1% provided T J(pk) 2 C. T J(pk) may be calculated from the data in Figure 13. At high case temperatures, thermal limitations will reduce the power that can be handled to values less than the limitations imposed by second breakdown. 2
MJ141 (PNP), MJ142* (NPN), MJ143* (PNP) TYPICAL ELECTRICAL CHARACTERISTICS MJ142 (NPN) MJ141, MJ143 (PNP) h FE, DC CURRENT GAIN 3 2 1 7 5 3 2 1 7. 5. CE = 3. T J = 55 C T J = 15 C 3..7 2. 3. 5. 7. 1 2 3 5 7 Figure 3. DC Current Gain h FE, DC CURRENT GAIN 3 2 1 7 5 3 2 1 7. 5. CE = 3. T J = 55 C T J = 15 C 3..7 2. 3. 5. 7. 1 2 3 5 7 Figure 4. DC Current Gain CE, COLLECTOREMITTER OLTAGE (OLTS) 2..8.4.1 I C = 1 A.2.3 I C = 6 A I C = 25 A.5.7 2. 3. 5. 7. 1 I B, BASE CURRENT (AMPS) CE, COLLECTOREMITTER OLTAGE (OLTS) 2..8.4.1 I C = 1 A.2.3 I C = 6 A I C = 25 A.5.7 2. 3. 5. 7. 1 I B, BASE CURRENT (AMPS) Figure 5. Collector Saturation Region Figure 6. Collector Saturation Region, OLTAGE (OLTS) 2..8.4.7 BE(sat) @ I C /I B = 1 BE(on) @ CE = 3. CE(sat) @ I C /I B = 1 2. 3. 5. 7. 1 2 3 5 7, OLTAGE (OLTS) 2..8.4.7 BE(sat) @ I C /I B = 1 BE(on) @ CE = 3. CE(sat) @ I C /I B = 1 2. 3. 5. 7. 1 2 3 5 7 Figure 7. On oltages Figure 8. On oltages 3
MJ141 (PNP), MJ142* (NPN), MJ143* (PNP) t, TIME ( s) μ.7.5.3.2.1.7.5.3.2 t d t r MJ142 (NPN) MJ141, MJ143 (PNP).1.4.7 2. 3. 5. 7. 1 2 3 5 7.7 2. 3. 5. 7. 1 2 3 5 7 t, TIME ( s) μ 4. 3. 2..7.5.3.2.1.7 t f t s MJ142 (NPN) MJ141, MJ143 (PNP) Figure 9. TurnOn Switching Times Figure 1. TurnOff Switching Times CC 3 C, CAPACITANCE (pf) 1 7 5 3 2 1 7 5 3 2 C ib C ob C ib C ob MJ142 (NPN) MJ141, MJ143 (PNP) + 2. R B t r 12 2 ns 1 to 1 s DUTY CYCLE 2.% +1 R B 12 t r 2 ns 1 to 1 s BB DUTY CYCLE 2.% + 7. R L CC R L TO SCOPE t r 2 ns 3 TO SCOPE t r 2 ns 1 2. 3. 5. 7. 1 2 3 5 7 1 R, REERSE OLTAGE (OLTS) Figure 11. Capacitance ariation FOR CURES OF FIGURES 3 & 6, R B & R L ARE ARIED. INPUT LEELS ARE APPROXIMATELY AS SHOWN. FOR NPN CIRCUITS, REERSE ALL POLARITIES. Figure 12. Switching Test Circuit r(t), TRANSIENT THERMAL RESISTANCE (NORMALIZED).7.5.3.2.1.7.5.3.2.2 D =.5.5.2.1 SINGLE PULSE.1 R JC(t) = r(t) R JC R JC =.584 C/W MAX D CURES APPLY FOR POWER PULSE TRAIN SHOWN READ TIME AT t 1 T J(pk) T C = P (pk) R JC(t).1.2.3.5.7.1.2.3.5.7 2. 3. 5. 7. 1 2 3 5 7 1 2 3 5 7 1 2 t, TIME (ms) P (pk) t 1 t 2 DUTY CYCLE, D = t 1 /t 2 Figure 13. Thermal Response 4
MJ141 (PNP), MJ142* (NPN), MJ143* (PNP) PACKAGE DIMENSIONS TO24 (TO3) CASE 197A5 ISSUE K H E 2 1 A N U C T SEATING PLANE D 2 PL K.3 (.12) M T Q M Y M L G Y Q.25 (.1) M T B Y M NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. INCHES MILLIMETERS DIM MIN MAX MIN MAX A 1.53 REF 38.86 REF B.99 5 25.15 26.67 C.25.335 6.35 8.51 D.57.63 1.45 E.6.7 1.53 1.77 G.43 BSC 1.92 BSC H.215 BSC 5.46 BSC K.44.48 11.18 12.19 L.665 BSC 16.89 BSC N.76.83 19.31 28 Q.151.165 3.84 4.19 U 1.187 BSC 3.15 BSC.131.188 3.33 4.77 STYLE 1: PIN 1. BASE 2. EMITTER CASE: COLLECTOR ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Typical parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including Typicals must be validated for each customer application by customer s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 61312, Phoenix, Arizona 85821312 USA Phone: 48829771 or 8344386 Toll Free USA/Canada Fax: 48829779 or 83443867 Toll Free USA/Canada Email: orderlit@onsemi.com N. American Technical Support: 82829855 Toll Free USA/Canada Japan: ON Semiconductor, Japan Customer Focus Center 291 Kamimeguro, Meguroku, Tokyo, Japan 15351 Phone: 8135773385 5 ON Semiconductor Website: Order Literature: http://www.onsemi.com/litorder For additional information, please contact your local Sales Representative. MJ141/D