Lithography S P E C I A L International SEMATECH: A Focus on the Photomask Industry by Wally Carpenter, International SEMATECH, Inc. (*IBM Corporation Assignee) It is well known that the semiconductor industry continues to drive performance improvements through lithography resolution development. Further, the International Technology Roadmap for Semiconductors (ITRS) timing continues to be driven aggressively, resulting in less inherent lithography resolution advantage against the desired linewidth. The effect has been to require significantly tightened photomask specifications with aggressive timing constraints. Mask Error Enhancement Factors (MEEF) and wavelength choices are driving a need for multiple options for the photomask end user, which include Attenuated and Alternating Phase Shifting Masks. The compounded effect of the roadmap move-in results in extreme measures being needed to ensure the photomask infrastructure will be ready for these demands. This article will review the changes and trends that have occurred in the ITRS and their compounded impact on the photomask industry. Critical issues will be identified and addressed at a photomask industry level. Also, an overview of International SEMATECH s roadmap will focus on key critical issues in the photomask industry. Introduction Historically, the semiconductor industry benefited from the fact that the lithography wavelength was several times shorter than minimum linewidth. As we approach the nm technology node, however, we find we will be using 193 nm lithography. Indeed, we will need to use 193 nm lithography to introduce the nm node, gaining the benefit of 157 nm lithography some time after the first nm production occurs. These continue the trend established at the nm node, using 24 nm lithography, where wavelength exceeds linewidth. The impact of this trend can be seen in the declining k 1 represented in Figure 1. The k 1 that will be available for the next few technology nodes are shown by the heavier line. It is this declining k 1 that has fostered the Mask Error Enhancement Factors and the growing dependence on the mask as an integral optical element, not just as a mask. We find we must incorporate into the mask materials and features that enhance the inherent resolution capability of the exposure tool. While this enhancement is required on only critical levels, the percentage of levels that are critical and need enhancement is increasing with each succeeding technology node. For the nm mask set, it is quite reasonable to expect several levels will require a weak phase shift mask, with optical proximity correction, and several levels will require strong phase shift masks. The production of phase shift masks, k1 with NA = 0. 0.6 0.5 0.4 0.3 0.2 0.1 Declining k 1 157nm 193nm 24nm Exposure Wavelength 50 Technology Figure 1. k 1 trend against technology node. Autumn 00 Yield Management Solutions 21
weak and strong, cause the mask maker to incur more cost and time to produce, especially for the strong phase shift mask. Further, the equipment infrastructure supporting the mask makers is not improving rapidly enough to avoid increasing production turn times. As a result, mask production times and cost are increasing, putting cost pressure on the end user. There isn t a solution to this worsening economic situation on the immediate horizon. Options, strategies, and impacts Since 1994, SEMATECH and its successor, International SEMATECH, have used the technology roadmap sponsored by the Semiconductor Industry Association (SIA) to guide its work. The SIA roadmap began as a United States focused effort, encouraging a dialogue that has proven useful in creating a reference specification set for semiconductor manufacturers and their suppliers to use in their planning. Over the years, the effort and the benefit have become international. The roadmap is now referred to as the International Technology Roadmap for Semiconductors (ITRS). The most salient aspect of the roadmap is the definition of technology nodes and the timing for these nodes (a node is a set of requirements composed to support semiconductor manufacturing at a specific minimum linewidth). Reflecting the general trend in technology for accelerating development, the timing of the future nodes has always been shortened with each roadmap update. This acceleration is depicted in Figure 2. Note that in anticipation of future timing acceleration and to ensure developments are completed in a timely fashion, the Lithography Thrust in International SEMATECH 500 350 250 50 35 25 1994 1997 199/99 Best Case Opportunity 99 Plan ITRS Trend 95 97 99 01 03 05 07 09 11 Figure 2. International technology roadmap for semiconductors historical acceleration. 1 35% 5 s is targeting its nm node work one year ahead of the 1999 Roadmap update and subsequent nodes two years ahead of the update. For mask making, the acceleration has been more aggressive than suggested by the node timing changes. Generally, with each roadmap update, the mask specifications for each node have been tightened. The effect has been to significantly accelerate and increase the technical demands on mask making. The effect on critical dimensions has been most pronounced, with International SEMATECH s target being accelerated forward up to five years in just the past two years. See Figures 3, 4, 5 and 6. The impact of the five-year acceleration can be best appreciated when it is understood that it takes four to five years to develop a new mask writer or mask inspection tool platform. Thus the impact of the acceleration has been to eliminate the possibility of new platforms for nm node and perhaps the nm node as well. Current platforms just now arriving to support the nm node will have to be extended through the nm and nm pilot lines. The industry is relying on incremental improvements to the mask-making tool base being sufficient to address profound increases in the technical requirements and need to contain associated cost increases. This is a risk. Along with continuing acceleration of the technology nodes has been the evolution in lithography solutions. In 1991, it was believed optical lithography would end at the nm node with 24 nm DUV lithography where the exposure wavelength was longer than the linewidth. From nm node and beyond we would be using non-optical, next-generation lithography Figure 3. Mask CD uniformity at nm technology node for dense lines (DRAM half-pitch). 22 Autumn 00 Yield Management Solutions
1 35% 5 s (NGL). In the intervening time the industry has become creative in pursuing optical proximity correction (OPC), phase shift masks (PSM) and changes in stepper/scanner illumination to extract more resolution than implied by the exposure wavelength. The result has been the industry currently believes that by using 157 nm exposure, optical lithography can be extended to the nm node with NGL being introduced in the transition between the nm and 50 nm nodes. International SEMATECH member companies generally plan to use either 193 nm or 157 nm lithography for the nm node. By the nm node, though, most anticipate a change to NGL will be well underway and completed by the 50 nm node. The significant points to extract from the lithography solutions evolution are that it is indeed an evolution. Historically, the solutions have continually changed and will likely continue to do so. International SEMATECH will have to continue refocusing its efforts, adapting to Figure 4. Mask CD uniformity at nm technology node for isolated lines (MPU gates). and fostering the change within the supplier community. A recently required adaptation has been the rapid escalation in 157 nm. As the node was accelerated forward, it became impossible for NGL to respond quickly enough. Thus, an optical solution had to be found, with 157 nm selected, despite its unique problems. The 157 nm will be critical for the nm node to happen on schedule. With 157 nm lithography becoming identified as the critical solution for the latter nm and nm nodes just five years before it is to be used in production, the industry faces a tough developmental and cost challenge. It should be noted that the industry is allowing itself half the time to develop its 157 nm capability as it allowed for development of the 193 nm. Mask defect inspection recent history and future issues Mask defect inspection means many things to the mask maker, end user and tool supplier. Depending on one s own personal experience, defects can range from the classic missing shapes and additional images, to actinic residuals, corner rounding, phase errors and so on. However, when boiled down to its critical essence it is simply: Will any abnormality on the mask print on the wafer within the boundaries of my process? Today or tomorrow? As the wafer process engineer drives the process harder and tighter to gain the benefits of device performance, abnormalities that were once in the noise level have now become critical issues. Looking back and into the future, the choices made three to five years ago are becoming today s reality and also the foundation we use to bridge into the future. One such choice was KLA-Tencor s TeraScan DUV ( ) 1 40% 5 s 0 07 0 09 45% 5 s 6 4 07 0 09 Figure 5. Mask CD uniformity at nm technology node for dense lines (DRAM half-pitch). Figure 6. Mask CD uniformity at nm technology node for isolated lines (MPU gates). Autumn 00 Yield Management Solutions 23
mask defect inspection system, which was developed based on the mask industry s projections and supported by International SEMATECH. ISMT membership had become increasingly concerned with the state of the mask inspection infrastructure in 1996 and foresaw the future at that time as one of an incremental improvement of the base 4 nm-wavelength platform. The industry was largely converting to 24 nm-wavelength exposure systems and making significant progress to nm-lithography ground rules. This began the current methodology of working in sub-wavelength lithography as a matter of necessity. While the wafer industry was making these significant transitions, there began a growing concern about at or near stepper wavelength defects that would not be detectable by the then-current mask defect inspection systems. This primary concern combined with the physically shrinking defect size demands on masks that would likely not be resolved by 4 nm-based optics resulted in International SEMATECH s recognition that focus must be applied here. This was key to ensuring mask defect inspection technology capability existed when required. KLA-Tencor clearly recognized an entirely new approach would be required to meet the specifications identified by the ISMT members. KLA-Tencor also recognized a completely new platform had significant risks and expenses for such a small but critical market. With all of these parts at play, ISMT and KLA-Tencor agreed to a financial arrangement which allowed KLA-Tencor to ramp staffing quickly and provide leading-edge computing power used in rapidly identifying the most promising methods. New methods of project management were also employed on this program that cleared the way for more progressive solutions. A risk mitigation plan was also supported and implemented to ensure a shorter-term alternative path could be executed as needed. This plan involved an extension of the existing 3XX platform and transitioning to a shorter wavelength (363. nm), thus regaining resolution capability. The plan additionally provided a path for data processing performance improvements that, while not equal to the DUV system, would provide some interim relief for leading-edge requirements. The risk mitigation plan proved successful. While KLA-Tencor had not planned to sell these systems in quantity, it found customers needed this added capability because of rapid movement and change shrinking lithography demands as evidenced by the ITRS Roadmap timing and requirements. Throughout the DUV tool development, ISMT members remained close to the process and continued to make input to the requirements of tool performance and timing, which kept development on pace with technology demands. The list of critical risks was retired early in the process leaving a substantial list of issues that have been addressed and closed through the remaining time. While not to the original schedule, KLA-Tencor voluntarily stepped up the challenges of meeting the more aggressive roadmap targets without changing the original contract agreement. The DUV TeraScan platform will soon be shipped to customers throughout the world operating at a DUV inspection wavelength, are capable of meeting nm node ground rules for binary masks and inspecting for some attenuated and alternating mask conditions. The next critical step being addressed by ISMT and KLA-Tencor is in 193 nm Alternating Phase Shift Masks (Alt PSM). ISMT members have sent a strong message to the industry and KLA-Tencor regarding its Alt PSM mask defect inspection requirements. The focus and direction is also clearer than at anytime in the past for this form of mask technology. What is making this new effort successful is that ISMT members are working together as a team in defining these critical specifications and, secondly, KLA-Tencor is listening and working toward meeting those requirements. Looking forward, mask defect inspection can move down many branches. One is to remain close to the scanners at wavelength performance capability such as 193 nm or even 157 nm wavelengths. Another is continuing to address phase shift capability for both attenuated and alternating forms; they will become a mainstream in the foreseeable future. Yet another is to branch into addressing linewidth variations across the mask at high or low frequency orders to ensure CD uniformity errors are captured. At the nm-technology node and below, CD errors are as important to capture as the more classic defects. Mask costs As previously mentioned, mask cost is becoming a significant economic factor, especially for ASIC manufacturers. For years the industry has operated with a nearly flat mask cost increase and benefited from the 24 Autumn 00 Yield Management Solutions
economies of scale as the mask industry consolidated. However, as the industry entered the nm node, along with its declining k 1, mask cost began to rise significantly. This is displayed in a recent International SEMATECH analysis depicted in Figure 7. Typical mask costs are doubling from the 250 nm node to the nm node and likely tripling by the nm node. These cost growths are reflecting the greater equipment cost and longer mask build cycles of the more complex masks being demanded. The paramount factor in the mask cost remains the mask write, as shown in Figure, while mask defect inspection is most improved. International SEMATECH s focus is containing the write time growth and pursuing yield improvements, such as with mask repair, to avoid having to re-write scrapped masks or reduce the multiple write steps required for alternating PSM. Conclusion The International SEMATECH membership supports and endorses driving the ITRS Roadmap requirements to a 2-year cycle through the nm lithography technology node. Currently, membership supports a 3-year cycle beyond the nm node. It is projected that as the necessary learning occurs to address nm node issues on this cycle it may become the position of International SEMATECH to push for a 2-year cycle beyond nm. Changes to the ITRS Roadmap go well beyond a simple timing shift as previously seen in this roadmap. The impact is compounded by the influence of mask usage Cost Savings $25K $K $15K $K $5K $0 All Equip. Cost All Equip. Time Figure. Mask cost drivers. E-beam Write Laser Write Negated Parameter Blank Cost 157 altpsm ($33K) 157 OPC ($23K) Yield Pattern Inspect in low k 1 imaging solutions that drive much higher Mask Error Enhancement Factors. The tightened mask specifications drive 2-3 years of additional pull-in to the roadmap for mask CD uniformity and defect size issues. Mask types at the nm node will include 193 nm and 157 nm applications as well as Binary, Attenuated and Alternating forms. The influence of these multiple applications will selectively affect the mask ITRS specifications that will in turn affect the mask equipment development requirements. International SEMATECH and Selete see their responsibility to include ensuring appropriate requirements are dictated to the equipment suppliers as over specifying or under specifying a system can significantly effect mask costs and appropriate mask availability. $50K $45K $40K $35K $30K $25K $K $15K $K $5K $0 24nm Binary 24nm OPC 193nm OPC 193nm PSM (90/2) 157nm nm OPC 157nm PSM (90/2) EUV X-Ray Scalpel IPL (compliant) IPL (non-compliant) 250nm nm nm nm nm 50nm Technology Finally, the specific issues and solutions to bring mask defect inspection capability to the industry was not a choice but a requirement. Future issues of mask inspection, write and repair must be considered global issues that must be addressed collaboratively through International SEMATECH and SELETE. 157 nm issues of blanks transmission, surface contamination and Electrostatic Discharge (ESD) are currently being addressed through global and collective collaboration. Prospects for solutions appear promising. Figure 7. International SEMATECH mask cost analysis. Autumn 00 Yield Management Solutions 25