A Phase Shif Full Bridge Based Reconfigurable PEV Onboard Charger Wih Exended ZVS Range and Zero Duy Cycle Loss Haoyu Wang, Member, IEEE School of Informaion Science and Technology ShanghaiTech Universiy Shanghai, China wanghy@shanghaiech.edu.cn Absrac In his paper, an inegraed onboard charger archiecure is proposed for plug-in elecric vehicle (PEV). In his archiecure, he phase shif full bridge (PSFB) converer serves as he main high volage baery charging opology, and he half bridge LLesonan converer serves as he low volage baery charging opology. Under ligh charging mode, he half-bridge LLC is reconfigured o be paralleled wih he PSFB opology, o guaranee zero volage swiching (ZVS) of he lagging-leg MOSFETs. Pracical design consideraions are presened for boh he PSFB and he half bridge LLC converers. Swiching frequency and he shifed phase angle provide wo degrees of freedom o regulae he oupu volage/curren of boh converers. The proposed archiecure mainains low cos and high efficiency in his specific applicaion. A 39V inpu, 4V/.4A, 4V/A oupus converer prooype is designed, simulaed, and analyzed o verify he proof of concep. Keywords inegraed charger; LLC; onboard charging; PEV; PSFB; ZVS; I. INTRODUCTION Boh he environmenal problems and he energy crisis have been pushing he ransiion from convenional inernal combusion engine vehicles owards more elecrified plug-in elecric vehicles (PEV) [], []. In order o achieve a longer elecric mileage, a high volage Li-ion baery pack is insalled onboard. Thus, an onboard baery charger is mandaary o charge his high volage baery pack [3], [4]. Plus, a low volage lead-acid baery (V/4V) is insalled onboard o provide power o he auxiliary loads, such as he air condiioner, head lighs, sereo sysems [5]. The ypical configuraion of he power managemen sysem in PEV is ploed in Fig.. There are hree major power modules: a) onboard charger for he high volage baery, b) propulsion moor drive, and c) low volage baery charger. I should be noed ha boh he high volage charger and he low volage charger require an isolaed / conversion sage. The PSFB dc/dc opology as shown in Fig.., enjoys he benefis of a) simple circui srucure wih reduced componens coun, b) zero volage swiching of MOSFETs, Grid PFC Link Isolaed AC Conroller Link / Converer / Converer /AC Inverer AC Isolaed High Volage Baery Pack Moor Low Volage Baery Onboard Appliances Fig.. Power managemen archiecure of a full elecric vehicle. S S D V 3 L n : v e -i L V ba,h S S 5 v c S 6 v d S 4 L r and c) easy o conrol wih pulse widh modulaion. Therefore, i has been widely used in he PEV onboard baery chargers [6] [8]. Regarding o he low volage baery charger, half bridge LLC opology as shown in Fig.., is considered as a good candidae due o is wide volage gain range and ZVS feaures. However, he radiional ZVS PSFB dc dc converer has wo fundamenal limiaions: a) he lagging leg MOSFETs lose ZVS feaure under ligh load condiions, and b) he duy cycle loss problem. Many research effors have been made o solve hose problems [9] [3]. Ideas on uilizing he ZVS half bridge D D 3 D 4 n :: D 5 D 6 C f C o V ba,h Fig.. Convenional onboard charger opologies: a) PSFB based high volage baery charger, and b) Half bridge LLC based low volage baery charger. V ba,l 978--4673-955-/6/$3. 6 IEEE 48
v ea D 3 v Ca C a V ba,h i L D a C f V S S D 3 L n : v e S S 4 i L D D 4 D a i D i D3 Duy cycle loss i D Duy cycle loss Fig. 3. Duy cycle loss of PSFB converer a heavy load condiion. v ea i ds i ds Hard ZVS swiching Fig. 4. PSFB MOSFET drain-source I-V waveforms under ligh load condiion. LLC opology o miigae he hard swiching problems on he PSFB lagging leg have araced special aenion [4] [7]. In [4], a dual oupu dc/dc converer combining PSFB and half bridge LLC opologies is proposed o achieve he ZVS of he lagging leg. However, he proposed converer sill suffers from duy cycle loss problems and design consideraions are no opimized for he PEV specific applicaions. In [5], a PSFB and LLC inegraed opology is proposed wih he dual oupus in series; in [6], a PSFB and LLC inegraed opology is proposed wih he LLC oupu in series wih he PSFB auxiliary capacior; while in [7], PSFB and LLC oupus are simply in parallel. However, all hose converers significanly increases he componens coun, and he secondary side always suffers from doubled diode conducion losses. Moreover, he parallel opology proposed in [7] suffers from increased conrol complexiy. In his paper, a self-reconfigurable PEV onboard charger is proposed. In he proposed archiecure, an auxiliary circui is added o he secondary side of he PSFB opology. This modificaion eliminaes he duy cycle loss problem and miigaes he urning off di/d on he secondary diodes. Moreover, under ligh load charging mode, he half bridge LLC based low volage baery charger can be swiched o he link (AC/ sage oupu) of he PSFB converer. Therefore, he proposed archiecure can achieve hose benefis simulaneously: a) full ZVS range of he lagging leg; b) zero duy cycle loss and reduced circulaing currens; c) relaive low v c v d V ba,l circui componens coun due o he opology reuse; and d) reduced secondary side diode urning off losses. II. ISSUES WITH CONVENTIONAL PSFB TOPOLOGY PSFB converer is a classic ZVS isolaed dc/dc opology and has been well sudied. By acively conrolling he phase shif amoun beween he leading phase leg and he phase lagging leg, he roo mean square volage exposed o he ransformer primary side can be acively conrolled. Therefore, he volage/curren regulaion can be achieved by phase shif conrol. Is main issues are summarized as below. A. Duy cycle loss a heavy load condiion A heave load condiion, PSFB opology suffers from duy cycle loss. Duy cycle loss occurs when he curren enering ino he ransformer primary side (-i L as defined in Fig. ) inersec wih he secondary side oupu curren ( as defined in Fig. ). From his momen on, all he diodes (D -D 4 ) on he secondary side are off. This phenomenon is marked in Fig. 3. During he duy cycle loss mode, he ransformer secondary side sees a shor circui. Thus, no power is delivered o he load side, and he curren will be circulaing on he primary side ank. This squeezes he effecive power supply duy cycle and increases he conducion losses. Moreover, in order o deliver he required amoun of power o he load, he circui componens need o sand higher curren sresses due o he low power supply uilizaion rae. B. ZVS feaure loss in he lagging leg a ligh load condiion The ZVS mechanism of power MOSFET is deailed as: before he curren conducion hrough he MOSFET channel, here is a curren from he source erminal o he drain erminal of he MOSFET. This curren goes hrough he MOSFET body diode and creaes a zero volage condiion for he MOSFET channel. Thus, ZVS is achieved when he curren inersecs wih zero and he conducion is swiched from he body diode o he channel. This ZVS feaure can be observed among all he power MOSFETs. However, wih he decrease of load power, his source o drain curren on he lagging leg MOSFETs decays. When he inegral of his curren during he dead band canno fully L r n :: D 5 Fig. 5. Proposed self-reconfigured onboard charger opology combinaion. D 6 C o 48
v ea n i L L /n ilf V /n Vba,h i L n i L L /n n i L L /n V ba,h b V /n n i L L /n V /n V ba,h V ba,h n i L L /n (d) (e) V ba,h i D i D i Da i Da i D i D4 i D3 i D Fig. 6. Key waveforms of he circui. I o II III IV V 3 4 5 charger and discharge he lagging leg MOSFET oupu capaciances, he ZVS feaure is los. This can be clearly observed from Fig. 4. As shown on he waveform of in Fig. 4, before crosses wih zero, here is no a negaive curren o pre-charge or pre-discharge C oss. This ZVS loss problem brings severe ringing and EMI problems o he circui. To reduce he ringing and EMI, ypically a lossy snubber and an addiional bulky passive filering ank is required. Thus, boh he conversion efficiency and he power densiy decays. III. PROPOSED RECONFIGURABLE PEV ONBOARD CHARGER A. Topology Descripion The proposed reconfigurable PEV onboard charger is ploed in Fig. 5. As shown, by adoping wo single-poledouble-hrow relays, he half bridge LLC opology in he low volage baery charger can be re-conneced o he lagging leg of he PSFB converer. Moreover, a capacior diode nework is added on he secondary side of he PSFB opology. This nework can eliminae he duy cycle loss problem of PSFB converer. (c) Fig. 7. PSFB equivalen circuis of differen operaion modes during one half swiching cycle. a) Mode I: < ; b) Mode II, < ; c) Mode III, < 3; d) Mode IV, 3 < 4; e) Mode V, 4 < 5. B. Operaion Principle Key waveforms of he proposed circui is ploed in Fig. 6. As shown, in each half swiching cycle, here are five differen operaing modes. The nex half swiching cycle is symmerical o he firs swiching cycle. To faciliae he analysis, one specific half swiching period, [, 5 ) is exraced from Fig. 6. The five operaing modes of PSFB sage during his half swiching cycle corresponds o five equivalen circuis as shown in Fig. 7. I should be noed ha he primary side volage source and impedance are boh equivalen o he secondary side. The following analysis is based on he assumpion: C a, C f, and C o are sufficienly large such ha one can ignore heir volage ripples. Thus, hose capacior volages are considered as dc volages,, V ba,h, and V ba,l, respecively. Mode I: [, ). Mode I sars when S 3 is urned off and S 4 is urned on. The full bridge generaes a posiive volage V. D, D 3 conduc on he secondary side. Therefore, V is coupled o be V /n on he secondary side. D a conducs. Thus, negaive erminal of C a is conneced o he isolaed ground, as demonsraed in Fig. 7. Mode I ends when i L reaches zero. i L decreases linearly as, di L V nv d Ca = () L decreases linearly as, dilf Vba, h + VCa = () d Lf I should be noed ha = n i L in mode I. Mode II: [, ). D, D 3 are off while D, D 4 are on. Therefore, V is coupled o be V /n on he secondary side. D a keeps conducing. Thus, negaive erminal of C a is conneced o he isolaed ground, as demonsraed in Fig. 7. Mode II ends when i Da reaches zero and D a is urned off. In his mode, i L decreases linearly as, 48
di L V + nv d Ca = (3) L In Mode II, sill decreases linearly following Eq. (). While = n i L in modes II-V. The iniial value of i L ( ) =, which can faciliae solving he ime-domain expression for i L (). Mode III: [, 3 ). D, D 4 are sill on and V is coupled o be V /n on he secondary side. D a is on. Thus, C a is paralleled wih he filering inducor, as demonsraed in Fig. 7(c). Mode III ends when S is urned off and S is urned on. In his mode, i L decreases linearly as, di L nv V + nv d Ca ba, h = (4) L increases linearly as, dilf VCa = (5) d Lf Mode IV: [ 3, 4 ). S and S 4 are boh on. Thus, he oupu of he full bridge is zero. D, D 4 are sill on and zero is coupled o he secondary side. D a is sill on. Thus, C a is sill paralleled wih he filering inducor, as demonsraed in Fig. 7(d). Mode IV ends when i Da reaches zero and D a is urned off. In his mode, i L increases linearly as, di L nv + nv d In Mode III, sill increases linearly following Eq. (5). Ca ba, h = (6) L Mode V: [ 4, 5 ). S and S 4 are boh on. Thus, he oupu of he full bridge is zero. D, D 4 are sill on and zero is coupled o he secondary side. D a conducs. Thus, negaive erminal of C a is conneced o he isolaed ground, as demonsraed in Fig. 7(e). Mode V ends when S 3 is urned on and S 4 is urned off and he circui operaion eners ino he second half cycle. In his mode, i L increases linearly as, di L nv Ca d = (7) L decreases linearly following Eq. (). I should be noed ha, T s 3 = ( π ϕ) (8) π where, ϕ is he shifed phase angel beween he leading and lagging legs. ϕ is an acively conrolled variable. Assuming ha all he circui componens are ideal, all he inpu power is delivered o he high volage baery pack. According o he law of energy conservaion, T + s ( π ϕ) π ViL () d in = = ba, h ch arge Ts / (9) P V I L r n : L r According o he charge balance of he auxiliary capacior, C a, T s + ic () d = () Therefore, if circui parameers (L,, n, V, I charge, ϕ) are considered as known variables, he wo unknown volages,, and V ba,h could be represened by hose known variables based on he wo equaions (9-). This means ha he dc operaing poin of his converer can be solved numerically. Regarding o he half bridge LLC converer, during his half swiching cycle defined by [ - 5 ), S 4 is always on. Thus, he inpu o he LLesonan ank is always grounded, as shown in Fig. 8. D 6 is always on. Thus, he low volage baery (- V ba, ) is conneced o he secondary side of he ransformer. The magneizing inducor volage is clamped o be -n V ba,. Thus, decrease linearly. and v Cr resonaes sinusoidally. This could be observed from Fig. 6. The LLC circui can be modeled based on he firs harmonic approximaion (FHA) [8]. The secondary side of he ransformer is equivalen o an effecive resisance, R eff n V = () 8 ba, l π Iba, l The LLC circui model using FHA is ploed in Fig. 8. Uilizing his circui model, he volage gain can be predicaed. I should be noed ha his predicaion demonsraes good accuracy when he swiching frequency is close o he resonan frequency beween L r and [9]. IV. DESIGN CONSIDERATIONS A. ZVS condiion of he lagging leg MOSFETs The ZVS of he lagging leg MOSFETs is achieved by he join force of i L and. The corresponding criical waveforms are ploed in Fig. 9, where Fig. 9 illusraes he more deailed waveforms during he dead band ( ead ). Fig. shows he equivalen circui during he dead band. Boh S 3 and S 5 have heir channels off. i L + joinly charges C oss3 from V o V, and discharges C oss4 from V o V. Therefore, he ZVS condiion is defined as, [ ] V ba,l + dead il () + ilr() d C ossv () Fig. 8. a) LLC equivalen circui during one half swiching cycle, [ - 5); b) circui model using FHA. ilm R e 483
i L b V/div A/div b V/div i L A/div Q dead V T V rechg Baery Volage A 5 V B.38A kw 4V Power C I chg Charge Curren 4 3 5 i L + A/div A/div μs/div 4 3 Fig. 9. ZVS waveforms of he lagging leg. As can be observed from Fig. 9, i L () can be considered as a consan curren source during his narrow dead band. i L () can be calculaed as, TnV s ba,l ilr () = i ( ) [, dead ) Lr o = (3) + 4Lm I should be noed ha i L () can be derived based on he circui analysis in Secion III. Thus, he ZVS condiion of lagging leg MOSFETs can be achieved once Eq. () is saisfied. B. LLC ank parameers selecion Regarding o he LLC par, he resonan ank L r,, are he mos imporan design parameers. To guaranee he opimized operaion of he LLC converer, he swiching frequency should be equal o he resonan frequency, fs = (4) π LrCr The volage gain is also deermined by he qualiy facor, Q, which is defined as he raio beween he characerisic impedance and effecive load resisance, 5 D S3 D S4 Lr / Cr Q = (5) R eff il+ A/div A/div C oss3 ns/div V i L C oss4 Q Q + Q Fig.. Charging/discharging MOSFETs oupu capaciors during he dead band of he lagging leg. Consan curren charge Consan volage charge Charge Complee Re-charge Charge complee Fig.. kw charging profile of a 5V-4V baery pack. Deailed selecion of Q can be found in [8]. The basic idea is o make sure ha he volage gain curve a f r has a sharp slope, such ha he f s has a narrow range and close o he resonan frequency. The gain flucuaion range corresponds o he flucuaion on he link inpu volage. This flucuaion origins from he grid and he PFecificaion sage. Afer selecing Q and f s, he L r and could be calculaed. Generally, large means reduced circulaing curren and conducion losses. However, large could resuls in ZVS loss in he MOSFETs. can be seleced by is larges possible value which sill guaranees ZVS of he lagging leg MOSFETs. C. Semiconducor devices selecion MOSFETs S -S 4 mus have heir volage sress equal o V. Typically, a % margin should be reserved. Thus, he volage raing of MOSFETs can be calculaed. The curren sress of he MOSFETs can be calculaed based on he expression of i L a he raed power of PSFB. I should be noed ha a he PSFB raed power, he LLC opology is no acivaed. Regarding o power diodes, D -D 4 have heir volage sress equal o V ba,h +, D a and D a have heir volage sress equal o V ba,h, while D 5 and D 6 have heir volage sress equal o V ba,l. Typically, a % margin should be reserved. The curren sress of he diodes can be calculaed based on he expression of secondary side currens a he raed power, which can be derived based on he circui analysis in Secion III. V. RESULTS The specificaions and design parameers of he proposed inegraed charger are summarized in Table I. Fig. shows he kw charging profile of a PEV onboard baery pack. The charging is classified ino consan curren charging and consan volage charging. While in he ransiion beween hose wo charging modes, he charging power reaches is maximum value. Three imporan operaing poins (A, B, C) are marked in Fig. Based on he circui parameers shown in Table I. The normalized volage gain of LLC converer versus f s under differen load condiions is ploed in Fig.. As shown, wihin he specified dc link volage range (39V ± V), f s can always be consrained in a narrow range close o f r. I end 484
TABLE I SPECIFICATIONS AND DESIGNED PARAMETERS OF THE PROPOSED CHARGER v ds3 V/div Symbol Parameer Symbol Parameer V 39V±V L r 35 μh V ba,h 5V-4V 8 nf P PSFB,max kw μh V ba.l 4 V n :: 4:3:3 3.8A.A/div (ac) f s khz n : : P LLC,max 3 W L 4 μh 4 35.V.5V/div v Ca (ac) Co μf 56 μh μs/div C f μf C a μf Fig. 4. PSFB circui waveforms a V ba = 4 V, I ba =.38A, LLC no acivaed.. % load 5% load 33% load % load V/div v ds3 Normalized gain.5. A/div 4A/div i D 3 A/div i D3.5 3 4 Frequency[kHz] Fig.. Normalized gain versus he frequency for he seleced design parameers. 3 4 i ds v ds A/div V/div V/div μs/div v ds3 Fig. 3. PSFB circui waveforms a V ba = 4V, I ba =.48A, LLC Simulaion is conduced based on he parameers provided in Table I. MOSFET C oss is se o be 5 pf. Simulaion daa is presened in figures 3-5. Fig. 3 demonsraes he circui operaion a PSFB ligh load condiion, where he charging power for he high volage baery is W (poin C in Fig. ). A his operaing poin, he LLC converer is reconfigured and acivaed. As shown, V ds3 drops o zero before he conducion of MOSFET. Therefore, ZVS is achieved on he lagging leg. 4 Fig. 5. PSFB circui waveforms a V ba = 5 V, I ba =.38A, LLC no acivaed. Fig. 4 shows he circui operaion a he PSFB full load condiion, where he charging power for he high volage baery is kw (poin B in Fig. ). A his operaing poin, he LLC converer is in idle mode. As can be observed on he curve of and v ds3 The PSFB can achieve ZVS on he lagging leg by iself. Ac coupled filer inducor curren ( ) and ac coupled auxiliary capacior volage (v Ca ) waveforms are also capured. ripple is.4a wih is dc offse as.8a. v Ca ripple is.8v wih is dc offse as 35. V. The ripple volage is much smaller han is dc offse. Fig. 5 shows he circui operaion a he beginning of consan curren charging mode, where he baery volage is 5V and he charging power is 595W (poin A in Fig. ). A his operaing poin, he LLC converer is also in idle mode. The PSFB achieve ZVS on he lagging leg wihou he assisance of LLC converer. i D and i D3 are capured. The waveforms shows ha duy cycle loss is successfully eliminaed. VI. CONCLUSIONS In his paper, a self-reconfigured PEV onboard charging archiecure is proposed. The proposed archiecure adops an auxiliary circui on he secondary side of he PSFB converer, which help o eliminae he duy cycle loss problem. Moreover, a ligh charging mode, a half bridge LLC opology is reconfigured o be conneced o he link. This help he 485
PSFB converer o realize ZVS on he lagging leg. The proposed converer demonsraes he benefis of a) opimized LLC swiching frequency; a) full ZVS range of he lagging leg; b) zero duy cycle loss and reduced circulaing currens; c) relaive low circui componens coun due o he opology reuse; and d) reduced secondary side diode urning off losses. Circui analysis and design consideraions are boh conduced in deail. A kw charging prooype is designed and simulaed o verify he proof of concep. Fuure work will be focused on he hardware implemenaion of his designed charger. REFERENCES [] Z. Li, O. Onar, A. Khaligh, and E. Schalz, Design and Conrol of a Muliple Inpu / Converer for Baery/Ulra-capacior Based Elecric Vehicle Power Sysem, in 9 Tweny-Fourh Annual IEEE Applied Power Elecronics Conference and Exposiion, 9, pp. 59 596. [] O. C. Onar, J. Kobayashi, D. C. Erb, and A. Khaligh, A Bidirecional High-Power-Qualiy Grid Inerface Wih a Novel Bidirecional Noninvered Buck Boos Converer for PHEVs, IEEE Trans. Veh. Technol., vol. 6, no. 5, pp. 8 3,. [3] M. Yilmaz and P. T. Krein, Review of baery charger opologies, charging power levels, and infrasrucure for plug-in elecric and hybrid vehicles, IEEE Trans. Power Elecron., vol. 8, no. 5, pp. 5 69, 3. [4] A. Khaligh and S. Dusmez, Comprehensive Topological Analysis of Conducive and Inducive Charging Soluions for Plug-In Elecric Vehicles, IEEE Trans. Veh. Technol., vol. 6, no. 8, pp. 3475 3489, Oc.. [5] H. Wang, A. Hasanzadeh, and A. Khaligh, Transporaion Elecrificaion: Conducive Charging of Elecrified Vehicles, IEEE Elecrif. Mag., vol., no., pp. 46 58, Dec. 3. [6] S. Moisseev, K. Soshin, and M. Nakaoka, Tapped-inducor filer assised sof-swiching PWM - power converer, IEEE Trans. Aerosp. Elecron. Sys., vol. 4, no., pp. 74 8, 5. [7] H. Cha, L. Chen, R. Ding, Q. Tang, and F. Z. Peng, An alernaive energy recovery clamp circui for full-bridge PWM converers wih wide ranges of inpu volage, IEEE Trans. Power Elecron., vol. 3, no. 6, pp. 88 837, 8. [8] O. C. Onar, J. M. Miller, S. L. Campbell, C. Coomer, C. P. Whie, and L. E. Seiber, A novel wireless power ransfer for in-moion EV/PHEV charging, in 3 Tweny-Eighh Annual IEEE Applied Power Elecronics Conference and Exposiion (APEC), 3, pp. 373 38. [9] T. T. Song and N. Huang, A novel zero-volage and zero-currenswiching full-bridge PWM converer, IEEE Trans. Power Elecron., vol., no., pp. 86 9, 5. [] B. Gu, J.-S. Lai, N. Kees, and C. Zheng, Hybrid-Swiching Full-Bridge Converer Wih Minimal Volage Sress of Bridge Recifier, Reduced Circulaing Losses, and Filer Requiremen for Elecric Vehicle Baery Chargers, IEEE Trans. Power Elecron., vol. 8, no. 3, pp. 3 44, Mar. 3. [] M. Pahlevaninezhad, P. Das, J. Drobnik, P. K. Jain, and A. Bakhshai, A novel ZVZCS full-bridge / converer used for elecric vehicles, IEEE Trans. Power Elecron., vol. 7, no. 6, pp. 75 769,. [] Y. Do Kim, C. E. Kim, K. M. Cho, K. B. Park, and G. W. Moon, ZVS phase shif full bridge converer wih conrolled leakage inducance of ransformer, INTELEC, In. Telecommun. Energy Conf., pp. 6, 9. [3] W. Chen, P. Rong, and Z. Lu, Snubberless bidirecional - converer wih new CLLesonan ank feauring minimized swiching loss, IEEE Trans. Ind. Elecron., vol. 57, no. 9, pp. 375 386,. [4] Y. Chen, X. Pei, L. Peng, and Y. Kang, A high performance dual oupu - converer combined he phase shif full bridge and LLesonan half bridge wih he shared lagging leg, Conf. Proc. - IEEE Appl. Power Elecron. Conf. Expo. - APEC, pp. 435 44,. [5] C. Liu, B. Gu, J.-S. Lai, M. Wang, Y. Ji, G. Cai, Z. Zhao, C.-L. Chen, C. Zheng, and P. Sun, High-Efficiency Hybrid Full-Bridge Half-Bridge Converer Wih Shared ZVS Lagging Leg and Dual Oupus in Series, IEEE Trans. Power Elecron., vol. 8, no., pp. 849 86, Feb. 3. [6] B. Gu, C.-Y. Y. Lin, B. F. Chen, J. Dominic, and J.-S. S. Lai, Zero- Volage-Swiching PWM Resonan Full-Bridge Converer Wih Minimized Circulaing Losses and Minimal Volage Sresses of Bridge Recifiers for Elecric Vehicle Baery Chargers, IEEE Trans. Power Elecron., vol. 8, no., pp. 4657 4667, Oc. 3. [7] M. Yu, D. Sha, and X. Liao, Hybrid PS Full Bridge and LLC Half Bridge - Converer for Low-Volage and High-Curren Oupu Applicaions, no. 333, pp. 88 94, 4. [8] H. Wang, S. Dusmez, and A. Khaligh, Design and Analysis of a Full Bridge LLC Based PEV Charger Opimized for Wide Baery Volage Range, IEEE Trans. Veh. Technol., vol. 63, no. 4, pp. 63 63, 4. [9] H. Wang, S. Dusmez, and A. Khaligh, Design Consideraions for a Level- On-board PEV Charger Based on Inerleaved Boos PFC and LLC Resonan Converers, in 3 IEEE Transporaion Elecrificaion Conference and Expo (ITEC), 3, pp. 8. 486