Order code V DS R DS(on ) max. I D

Datasheet N-channel 9 V,.21 Ω typ., 2 A MDmesh K5 Power MOSFET in a TO 22FP package Features TO-22FP D(2) 1 2 3 Order code V DS R DS(on ) max. I D STF2N9K5 9 V.25 Ω 2 A Industry s lowest R DS(on) x area Industry s best FoM (figure of merit) Ultra-low gate charge 1% avalanche tested Zener-protected Applications G(1) Switching applications S(3) AM15572v1_no_tab Description This very high voltage N-channel Power MOSFET is designed using MDmesh K5 technology based on an innovative proprietary vertical structure. The result is a dramatic reduction in on-resistance and ultra-low gate charge for applications requiring superior power density and high efficiency. Product status link STF2N9K5 Product summary Order code Marking Package Packing STF2N9K5 2N9K5 TO-22FP Tube DS11634 - Rev 4 - October 218 For further information contact your local STMicroelectronics sales office. www.st.com

Electrical ratings 1 Electrical ratings Table 1. Absolute maximum ratings Symbol Parameter Value Unit V GS Gate-source voltage ±3 V I D Drain current (continuous) at T C = 25 C 2 A I D Drain current (continuous) at T C = 1 C 13 A I (1) D Drain current (pulsed) 8 A P TOT Total dissipation at T C = 25 C 4 W V ISO Insulation withstand voltage (RMS) from all three leads to external heat sink (t=1 s; T C =25 C) 25 V dv/dt (2) Peak diode recovery voltage slope 4.5 dv/dt (3) MOSFET dv/dt ruggedness 5 V/ns T J T stg Operating junction temperature range Storage temperature range -55 to 15 C 1. Pulse width limited by safe operating area. 2. I SD 2 A, di/dt 1 A/μs; V DS peak V (BR)DSS, V DD = 45 V. 3. V DS 72 V. Table 2. Thermal data Symbol Parameter Value Unit R thj-case Thermal resistance junction-case 3.1 C/W R thj-amb Thermal resistance junction-ambient 62.5 C/W Table 3. Avalanche characteristics Symbol Parameter Value Unit I AR Avalanche current, repetitive or not repetitive (pulse width limited by T jmax ) 6.5 A E AS Single pulse avalanche energy (starting Tj = 25 C, I D = I AR, V DD = 5 V) 5 mj DS11634 - Rev 4 page 2/13

Electrical characteristics 2 Electrical characteristics T C = 25 C unless otherwise specified Table 4. On/off-state Symbol Parameter Test conditions Min. Typ. Max. Unit V (BR)DSS I DSS I GSS Drain-source breakdown voltage Zero gate voltage drain current Gate body leakage current V GS = V, I D = 1 ma 9 V V GS = V, V DS = 9 V 1 µa V GS = V, V DS = 9 V T C = 125 C (1) 5 µa V DS = V, V GS = ±2 V ±1 µa V GS(th) Gate threshold voltage V DD = V GS, I D = 1 µa 3 4 5 V R DS(on) Static drain-source onresistance V GS = 1 V, I D = 1 A.21.25 Ω 1. Defined by design, not subject to production test. Table 5. Dynamic Symbol Parameter Test conditions Min. Typ. Max. Unit C iss Input capacitance C V DS = 1 V, f = 1 MHz, oss Output capacitance - 12 - pf C rss Reverse transfer capacitance V GS = V - 15 - pf - 1 - pf C o(er) (1) C o(tr) (2) Equivalent capacitance energy related V GS = V, Equivalent capacitance time related V DS = to 72 V - 78 - pf 22 - pf R g Intrinsic gate resistance f = 1 MHz, I D = A - 3.7 - Ω Q g Total gate charge V DD = 72 V, I D = 2 A - 4 - nc Q gs Gate-source charge V GS = to 1 V - 14 - nc Q gd Gate-drain charge (see Figure 14. Test circuit for gate charge behavior) - 17 - nc 1. C o(er) is a constant capacitance value that gives the same stored energy as C oss while V DS is rising from to 8% V DSS. 2. C o(tr) is a constant capacitance value that gives the same charging time as C oss while V DS is rising from to 8% V DSS. Table 6. Switching times Symbol Parameter Test conditions Min. Typ. Max. Unit t d(on) Turn-on delay time V DD = 45 V, I D = 1 A, - 2.2 - ns t r Rise time R G = 4.7 Ω - 13.5 - ns t d(off) Turn-off delay time V GS = 1 V (see Figure 13. Test - 64.7 - ns t f Fall time circuit for resistive load switching times and Figure 18. Switching time waveform) - 16 - ns DS11634 - Rev 4 page 3/13

Electrical characteristics Table 7. Source-drain diode Symbol Parameter Test conditions Min. Typ. Max. Unit I SD Source-drain current - 2 A I SDM (1) Source-drain current (pulsed) - 8 A V SD (2) Forward on voltage I SD = 2 A, V GS = V - 1.5 V t rr Reverse recovery time I SD = 2 A, di/dt = 1 A/µs, - 517 ns Q rr Reverrse recovery charge V DD = 6 V - 11.4 µc (see Figure 15. Test circuit for I RRM Reverse recovery current inductive load switching and diode recovery times) - 44 A t rr Reverse recovery time I SD = 2 A, di/dt = 1 A/µs, - 674 ns Q rr Reverse recovery charge V DD = 6 V, - 14 µc T j = 15 C I RRM Reverse recovery current (see Figure 15. Test circuit for inductive load switching and - 41.6 A diode recovery times) 1. Pulse width limited by safe operating area. 2. Pulsed: pulse duration = 3 µs, duty cycle 1.5%. Table 8. Gate-source Zener diode Symbol Parameter Test conditions Min. Typ. Max. Unit V (BR)GSO Gate-source breakdown voltage I GS = ±1 ma, I D = A 3 - - V The built-in back-to-back Zener diodes are specifically designed to enhance the ESD performance of the device. The Zener voltage facilitates efficient and cost-effective device integrity protection,thus eliminating the need for additional external componentry. DS11634 - Rev 4 page 4/13

Electrical characteristics (curves) 2.1 Electrical characteristics (curves) Figure 1. Safe operating area Figure 2. Thermal impedance I D (A) GIPG3112161125SOA K δ =.5 GC2521.2 1 1 1 Operation in this area is limited by R DS(on) T j 15 C T c = 25 C single pulse t p =1 µs t p =1 µs t p =1 ms t p =1 ms 1-1 1-2.1.5.2.1 Single pulse Z th = K*R thj-c δ =t p / Ƭ 1-1 1-1 1 1 1 1 2 V DS (V) 1-3 t p Ƭ 1-4 1-3 1-2 1-1 1 - t p (s) Figure 3. Output characteristics Figure 4. Transfer characteristics I D (A) 5 GIPG2911216115OCH V GS =1, 11 V I D (A) 5 V DS = 2 V GIPG2911216114TCH 4 V GS =9 V 4 3 3 2 V GS =8 V 2 1 V GS =7 V V GS =6 V 4 8 12 16 V DS (V) 1 5 6 7 8 9 1 V GS (V) Figure 5. Normalized V (BR)DSS vs temperature Figure 6. Static drain-source on-resistance V (BR)DSS (norm.) GIPG2911216115BDV R DS(on) (Ω) GIPG2911216114RID 1.12 1.8 I D = 1 ma.23.22 V GS =1 V 1.4 1..21.96.2.92.19.88-5 5 1 T j ( C).18 5 1 15 I D (A) DS11634 - Rev 4 page 5/13

Electrical characteristics (curves) Figure 7. Gate charge vs gate-source voltage Figure 8. Capacitance variation V GS (V) 14 12 V DS GIPG2911216113QVG V DS (V) V DD = 72 V I D = 2 A 7 6 C (pf) 1 4 GIPG2911216111CVR 1 5 1 3 C ISS 8 4 6 4 2 3 2 1 1 2 1 1 f = 1 MHz C OSS C RSS 1 2 3 4 Q g (nc) 1 1-1 1 1 1 1 2 V DS (V) Figure 9. Normalized gate threshold voltage vs temperature V GS(th) (norm.) 1.2 1..8.6.4 I D = 1 µa GIPG2911216116VTH Figure 1. Normalized on-resistance vs temperature R DS(on) (norm.) 2.6 2.2 1.8 1.4 1..6 V GS = 1 V GIPG2911216117RON.2-5 5 1 T j ( C).2-5 5 1 T j ( C) Figure 11. Maximum avalanche energy vs. starting T J Figure 12. Source-drain diode forward characteristics E AS (mj) 5 4 3 GIPG2911216118EAS Single pulse I D = 6.5 A V DD = 5 V V SD (V) 1.1 1.9 Tj = -5 C Tj = 25 C.8 GIPD289218127SDF 2 1.7.6.5 Tj = 15 C -5-25 25 5 75 1 125 T J ( C).4 5 1 15 I SD (A) DS11634 - Rev 4 page 6/13

Test circuits 3 Test circuits Figure 13. Test circuit for resistive load switching times Figure 14. Test circuit for gate charge behavior V DD RL VD RL + 22 μf 3.3 μf VDD V GS I G = CONST 1 Ω D.U.T. VGS pulse width RG D.U.T. pulse width 22 μf + 2.7 kω 47 kω V G 1 kω AM1469v1 AM1468v1 Figure 15. Test circuit for inductive load switching and diode recovery times Figure 16. Unclamped inductive load test circuit G 25 Ω A D D.U.T. S B A fast diode B A B G 1 µh 3.3 1 D µf + µf VDD D.U.T. VD ID L + 22 µf 3.3 µf VDD + _ RG S Vi pulse width D.U.T. AM1471v1 AM147v1 Figure 17. Unclamped inductive waveform Figure 18. Switching time waveform t on t off V(BR)DSS t d(on) t r t d(off) t f VD 9% 9% IDM ID 1% V DS 1% VDD VDD V GS 9% AM1472v1 1% AM1473v1 DS11634 - Rev 4 page 7/13

Package information 4 Package information In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK packages, depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product status are available at: www.st.com. ECOPACK is an ST trademark. DS11634 - Rev 4 page 8/13

TO-22FP package information 4.1 TO-22FP package information Figure 19. TO-22FP package outline 71251_Rev_12_B DS11634 - Rev 4 page 9/13

TO-22FP package information Table 9. TO-22FP package mechanical data Dim. mm Min. Typ. Max. A 4.4 4.6 B 2.5 2.7 D 2.5 2.75 E.45.7 F.75 1 F1 1.15 1.7 F2 1.15 1.7 G 4.95 5.2 G1 2.4 2.7 H 1 1.4 L2 16 L3 28.6 3.6 L4 9.8 1.6 L5 2.9 3.6 L6 15.9 16.4 L7 9 9.3 Dia 3 3.2 DS11634 - Rev 4 page 1/13

Revision history Table 1. Document revision history Date Revision Changes 11-May-216 1 First release. Modified title and R DS(on) in features table 1-Dec-216 2 21-Jan-217 3 5-Oct-218 4 Modified Table 4: "Avalanche characteristics", Table 5: "On/off-state", Table 6: "Dynamic", Table 7: "Switching times" and Table 8: "Sourcedrain diode" Added Section 2.1: "Electrical characteristics (curves)" Modified Section 3: "Test circuits" Datasheet promoted from preliminary data to production data Minor text changes Modified R DS(on) max. value on cover page Minor text changes Removed maturity status indication from cover page. Added Figure 12. Source-drain diode forward characteristics. Minor text changes DS11634 - Rev 4 page 11/13

Contents Contents 1 Electrical ratings...2 2 Electrical characteristics...3 2.1 Electrical characteristics (curves)... 5 3 Test circuits...7 4 Package information...8 4.1 TO-22FP package information...8 Revision history...11 DS11634 - Rev 4 page 12/13

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