MITSBISHI SEMIONDTOR <Dual-In-Line ackage Intelligent ower ower Module> TYE TYE INTEGRTED OER FNTIONS 1200/10 low-loss 4 th generation IGBT inverter bridge for 3 phase D-to- power conversion INTEGRTED DRIE, ROTETION ND SYSTEM ONTROL FNTIONS r upper-leg IGBTS :, High voltage high-speed level shifting, ontrol supply under-voltage () protection. r lower-leg IGBTS :, ontrol supply under-voltage protection (), Short circuit protection (S). Fault signaling : orresponding to an S fault (Lower-side IGBT) or a fault (Lower-side supply). Input interface : 5 line MOS/TTL compatible (High active logic). LITION 400 0.2k~0.75k inverter drive for small power motor control. Fig. 1 KGE OTLINES Dimensions in mm 30 2.54(=76.2) 2-φ4.5±0.2 2.54±0.3 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 Type name, Lot No. QR ode 22 23 24 25 26 27 28 8±0.3 10.16±0.3 (2.5) 67±0.3 79±0.5 Heat sink side 18.5±0.5 8.2±0.5 44±0.5 16.1±0.3 48.6±0.6 (2) 27.4±0.5 34±0.5 20.4±0.5 42.6±0.5 Heat sink side (2) (0.3) (1.7) (0.3) 1. FS 2. FB 3. 1 4. 5. FS 6. FB 7. 1 8. 9. FS 10. FB 11. 1 12. 13. 14. N1 15. N 16. 17. FO 18. FO 19. N 20. N 21. N 22. 23. 24. 25. 26. 27. N 28. Detail : ll external terminals are treated with lead free solder (ingredient : Sn-u) plating.
Fig. 2 INTERNL FNTIONS BLOK DIGRM (TYIL LITION EXMLE) 1 : Tight tolerance, temp-compensated electrolytic type (Note : The capacitance depends on the M control scheme used in the applied system.) 2 : 0.22~2µF R-category ceramic capacitor for noise filtering High-side input (M) (5 line) (Note 1,2) Input signal Input signal Input signal conditioning conditioning conditioning B B B B B B 2 1 Inrush current limiter circuit Level shifter Level shifter Level shifter rotection circuit () rotection circuit () rotection circuit () (Note 6) line input (Note 4) H-side IGBTS M Z (Note 8) N L-side IGBTS line output N1 N Z : ZNR (Surge absorber) : filter (eramic capacitor 2.2~6.5nF) (rotection against common-mode noise) Low-side input (M) FO FO (5 line) (Note 1, 2) Fault output (5 line) (Note 3, 5) Input signal conditioning logic rotection circuit ontrol supply nder-oltage protection () (Note 7) N D (15 line) Note1: To prevent input signals oscillation, an R coupling at each input terminal is recommended. 2: By virtue of integrating HI inside the module, direct coupling to M terminals without any opto-coupler or transformer isolation is possible. 3: output is open drain type. The signal line should be pulled up to the positive side of a 5 supply with an approximate 10kΩ resistor. 4: The wiring between the power D-link capacitor and the /N1 terminals should be as short as possible to protect against catastrophic high surge voltage. r extra precaution, a small film type snubber capacitor (0.1~0.22µF, high voltage type) is recommended to mount closely to the and N1 terminals. 5: output pulse width (tfo) should be determined by connecting external capacitor between FO and N terminals. (Example : tfo=2.4ms(typ.) at FO=22nF) 6: High voltage (1200 or more) and fast recovery type (less than 100ns) diodes should be used for the bootstrap circuit. 7: It is recommended to insert a Zener diode (24/1) between each pair of control supply terminals to prevent surge destruction. 8: To prevent LI from surge destruction, it is recommended to mount a fast recovery type diode between N and, N, terminals. Fig. 3 EXTERNL RT OF THE ROTETION IRIT I () S protection trip level H-side IGBTS External protection circuit L-side IGBTS N1 Shunt resistor (Note 1) R B N N rotection circuit (Note 2) Note1: In the recommended external protection circuit, please select the R time constant in the range 1.5~2.0. 2: To prevent erroneous protection operation, the wiring of, B, should be as short as possible. 0 ollector current waveform 2 tw () Short ircuit rotective Function (S) : S protection is achieved by sensing the L-side D-Bus current (through the external shunt resistor) with a suitable filtering time (defined by the R circuit). hen the sensed shunt voltage exceeds the S trip-level, all the L-side IGBTs are turned OFF and a fault signal () is output. Since the S fault may be repetitive, it is recommended to stop the system and check the fault, when the signal is received.
MXIMM RTINGS (Tj = 25, unless otherwise noted) INERTER RT Symbol arameter Ratings nit (surge) ES ±I ±I Tj Supply voltage Supply voltage (surge) ollector-emitter voltage Each IGBT collector current Each IGBT collector current (peak) ollector dissipation Junction temperature pplied between -, N, pplied between -, N, T = 25 T = 25, less than 1ms T = 25, per 1 chip (Note 1) 900 1000 1200 10 20 50.0 20~125 Note 1 : The maximum junction temperature rating of the power chips integrated within the is 150 (@ T 100 ) however, to ensure safe operation of the, the average junction temperature should be limited to Tj(ave) 125 (@ T 100 ). ONTROL (ROTETION) RT Symbol arameter Ratings nit D DB IN FO IFO S ontrol supply voltage ontrol supply voltage Input voltage Fault output supply voltage Fault output current urrent sensing input voltage pplied between 1-, N1-N pplied between FB-FS, FB-FS, FB-FS pplied between,, -, N, N, N-N pplied between FO-N Sink current at FO terminal pplied between -N 20 20 0.5~D0.5 0.5~D0.5 1 0.5~D0.5 TOTL SYSTEM Symbol arameter Ratings nit Self protection supply voltage limit D = 13.5~16.5, Inverter part (ROT) Tj = 125, non-repetitive, less than 2 (short circuit protection capability) T Module case operation temperature (Note 2) Tstg iso Storage temperature Isolation voltage 60Hz, Sinusoidal, 1 minute, connection pins to heat-sink plate 800 20~100 40~125 2500 rms Note 2 : T MESREMENT OINT ontrol terminals Heat sink boundary Heat-sink T ower terminals T
THERML RESISTNE Symbol Rth(j-c)Q Rth(j-c)F Rth(c-f) arameter Junction to case thermal Inverter IGBT part (per 1/6 module) resistance Inverter FDi part (per 1/6 module) ontact thermal resistance (Note 3) ase to fin, (per 1 module) thermal grease applied Note 3: Grease with good thermal conductivity and long-term endurance should be applied evenly with about 100µm~200µm on the contacting surface of and heat-sink. Min. Typ. Max. 2.00 2.67 0.047 nit / / / ELETRIL HRTERISTIS (Tj = 25, unless otherwise noted) INERTER RT E(sat) E ton trr Symbol tc(on) toff tc(off) IES arameter ollector-emitter saturation voltage FDi forward voltage Switching times ollector-emitter cut-off current D = DB = 15 IN = 5, I = 10 I = 10, IN = 0 Tj = 25 Tj = 125 = 600, D = DB = 15 I = 10, Tj = 125, IN = 0 5 Inductive load (upper-lower arm) E = ES Tj = 25 Tj = 125 Min. Typ. Max. 0.8 2.7 2.5 2.5 1.5 0.2 0.4 2.8 0.4 3.4 3.2 3.0 2.2 0.7 3.8 0.7 1 10 nit ONTROL (ROTETION) RT Symbol ID FOH FOL S(ref) IIN DBt DBr Dt Dr tfo th(on) th(off) ircuit current arameter Fault output voltage Short circuit trip level Input current Supply circuit under-voltage protection Fault output pulse width ON threshold voltage OFF threshold voltage D = DB = 15 IN = 5 D = DB = 15 IN = 0 Total of 1-, N1-N FB-FS, FB-FS, FB-FS Total of 1-, N1-N FB-FS, FB-FS, FB-FS S = 0, FO circuit pull-up to 5 with 10kΩ S = 1, IFO = 1 Tj = 25, D = 15 (Note 4) IN = 5 Trip level Tj 125 Reset level Trip level Reset level FO = 22nF (Note 5) pplied between,, -, N, N, N-N Min. Typ. Max. 3.70 1.30 3.50 1.30 4.9 1.10 0.43 0.48 0.53 0.7 1.5 2.0 10.0 12.0 10.5 12.5 10.3 12.5 10.8 13.0 1.6 2.4 2.0 3.0 4.2 0.8 1.4 2.0 Note 4 : Short circuit protection is functioning only at the low-arms. lease select the value of the external shunt resistor such that the S triplevel is less than 1.7 times device current rating. 5:Fault signal is output when the low-arms short circuit or control supply under-voltage protective functions operate. The fault output pulsewidth tfo depends on the capacitance value of FO according to the following approximate equation : FO = 9.3 10-6 tfo [F]. nit ms
MEHNIL HRTERISTIS ND RTINGS Mounting torque eight Heat-sink flatness arameter Mounting screw : M4 Recommended 1.18 N m (Note 6) Min. 0.98 50 Typ. 77 Max. 1.47 100 nit N m g µm Note 6: Measurement point of heat-sink flatness Measurement location 3.25mm Heat-sink side Heat-sink side REOMMENDED OERTION ONDITIONS D DB D, DB tdead fm IO Symbol IN(on) arameter Supply voltage ontrol supply voltage ontrol supply voltage ontrol supply variation rm shoot-through blocking time M input frequency Output r.m.s. current pplied between -, N, pplied between 1-, N1-N pplied between FB-FS, FB-FS, FB-FS r each input signal, T 100 T 100, Tj 125 = 600, D = 15, f = 15kHz.F = 0.8, sinusoidal M Tj 125, T 100 (Note 7) (Note 8) Min. Typ. Max. 350 800, 13.5 D 16.5, Ic 10 2.5 Minimum input pulse width 13.5 DB 16.5, IN(off) 20 T 100, N line wiring inductance less than 10 < Ic 17 2.7 10nH (Note 9) N N variation Between N-, N, (including surge) 5.0 Note 7 : The output r.m.s. current value depends on the actual application conditions. 8: might not make response to the input on signal with pulse width less than IN (on). 9: might not make response or work properly if the input off signal pulse width is less than IN (off). 350 13.5 13.5 1 3.3 1.5 600 15.0 15.0 800 16.5 16.5 1 15 3.4 5.0 nit / khz rms
Fig. 4 THE INTERNL IRIT FB FS 1 HI1 B IGBT1 Di1 IN HO OM S FB FS 1 HI2 B IGBT2 Di2 IN HO OM S FB FS 1 HI3 B IGBT3 Di3 IN HO OM S LI IGBT4 Di4 OT N1 NO IGBT5 Di5 OT N N N N NO OT IGBT6 Di6 N N N NO N GND FO FO
Fig. 5 TIMING HRTS OF THE ROTETIE FNTIONS [] Short-ircuit rotection (Lower-arms only with the external shunt resistor and R filter) a1. Normal operation : IGBT ON and carrying current. a2. Short circuit current detection (S trigger). a3. IGBT gate hard interruption. a4. IGBT turns OFF. a5. FO output with a fixed pulse width determined by the external capacitor FO. a6. Input = L : IGBT OFF a7. Input = H : a8. IGBT OFF state in spite of input H. Lower-arms control input a6 a7 rotection circuit state SET Internal IGBT gate a2 a3 Output current Ic a1 S a4 a8 Sense voltage of the shunt resistor S reference voltage Error output a5 R circuit time constant DELY [B] nder-oltage rotection (Lower-arm, D) b1. ontrol supply voltage rising : fter the voltage level reaches Dr, the circuits start to operate when next input is applied. b2. Normal operation : IGBT ON and carrying current. b3. nder voltage trip (Dt). b4. IGBT OFF in spite of control input condition. b5. FO keeps output during the period, however, FO pulse is not less than the fixed width for very short interval. b6. nder voltage reset (Dr). b7. Normal operation : IGBT ON and carrying current. ontrol input rotection circuit state SET ontrol supply voltage D Dr b1 Dt b3 b6 b2 b4 b7 Output current Ic Error output b5
[] nder-oltage rotection (pper-side, DB) c1. ontrol supply voltage rises : fter the voltage reaches DBr, the circuits start to operate when next input is applied. c2. Normal operation : IGBT ON and carrying current. c3. nder voltage trip (DBt). c4. IGBT OFF in spite of control input signal level, but there is no FO signal output. c5. nder voltage reset (DBr). c6. Normal operation : IGBT ON and carrying current. ontrol input rotection circuit state SET ontrol supply voltage DB DBr c1 DBt c3 c5 c2 c4 c6 Output current Ic Error output High-level (no fault output) Fig. 6 M I/O INTERFE IRIT 5 line 10kΩ,,,N,N,N M N(Logic) Note : R coupling at each input (parts shown dotted) may change depending on the M control scheme used in the application and the wiring impedance of the application s printed circuit board. The input signal section integrates a 2.5kΩ(min) pull-down resistor. Therefore, when using a external filtering resistor, pay attention to the turn-on threshold voltage requirement. Fig. 7 IRING ONNETION ITH 1 SHNT RESISTOR sing low inductance chip resistor and reducing wiring length to minimize the wiring inductance. N N Shunt resistor lease insert fast recovery type diode between N and, N, terminals. lease make the wiring connection of shunt resistor to GND as short as possible. r 3 shunt resistors connection, please refer to Fig.9.
Fig. 8 N EXMLE OF TYIL LITION IRT ITH 1 SHNT RESISTOR 1:Tight tolerance temp-compensated electrolytic type 2,3: 0.1~0.22µF R-category ceramic capacitor for noise filtering. (Note: The capacitance value depends on the M control used in the applied system.) 3 2 1 FB FS 1 HI1 B IN HO 2 FB OM S 1 FS 3 1 HI2 B IN HO 2 FB OM S M 1 FS 3 1 HI3 B IN HO M OM S LI OT N1 NO 3 5 line OT NO N N N N N N N N GND OT NO FO If this wiring is too long, short circuit might be caused. FO 15 line 4(FO) 5 R1 B Shunt resistor N1 H-side IGBTS The long wiring of GND might generate noise on input and cause IGBT to be malfunction. If this wiring is too long, the S level fluctuation might be larger and cause S malfunction. Note 1 : To avoid malfunction, the wiring of each input should be as short as possible. (less than 2-3cm) 2: By virtue of integrating HI inside the module, direct coupling to M terminals without any opto-coupler or transformer isolation is possible. 3: output is open drain type. The signal line should be pulled up to the positive side of a 5 supply with an approximate 10kΩ resistor. 4: output pulse width (tfo) should be determined by connecting external capacitor 4 between FO and N terminals. (Example : tfo=2.4ms(typ.) at FO=22nF) 5: Input signal is High-ctive type. There is a 2.5kΩ (Min.) resistor inside I to pull down each input signal line to GND. hen employing R coupling circuits at each input, set up R couple such that input signal agree with turn-off/turn-on threshold voltage. 6: To prevent errors of the protection function, the wiring of, B, should be as short as possible. 7: The time constant R51 of the protection circuit should be selected in the range of 1.5~2. S interrupting time might vary with the wiring pattern. 8: ll capacitors should be mounted as close to the terminals of the as possible. 9: To prevent surge destruction, the wiring between the smoothing capacitor and the &N1 terminals should be as short as possible. Generally a 0.1~0.22µF snubber between the &N1 terminals is recommended. 10: It is recommended to insert a Zener diode (24/1) between each pair of control supply terminals to prevent surge destruction. 11: To prevent LI from surge destruction, it is recommended to mount a fast recovery type diode between N and, N, terminals. Fig. 9 EXMLE OF EXTERNL ROTETION IRIT ITH 3 SHNT RESISTORS The time constant R of external comparator should be selected in the range of 1.5~2. S interrupting time might vary with the wiring pattern. The threshold voltage ref should be set up the same rating of short circuit trip level (S(ref) typ. 0.48). lease select the external shunt resistance such that the S trip-level is less than 1.7 times of the current rating. To avoid malfunction, the wiring of each input should be as short as possible. OR circuit output level should be set up the rating of short circuit trip level (S(ref) typ. 0.48). r extra precaution, please refer to Fig.8 L-side IGBTS rotection circuit N N External protection circuit R ref R ref R ref omparator Shunt resistor OR logic circuit