Power MOSFET, 72 A SFA72SA5LC SOT227 PRIMARY CHARACTERISTICS S 5 R DS(on).65 I D 72 A Type Modules MOSFET Package SOT227 FEATURES Fully isolated package Easy to use and parallel Low onresistance Dynamic d/dt rating Fully avalanche rated Simple drive requirements Low gate charge device Low drain to case capacitance Low internal inductance UL approved file E78996 Designed for industrial level Material categorization: for definitions of compliance please see www.vishay.com/doc?9992 DESCRIPTION Third generation power MOSFETs from ishay Semiconductors provide the designer with the best combination of fast switching, ruggedized device design, low onresistance and costeffectiveness. The SOT227 package is universally preferred for all commercialindustrial applications at power dissipation levels to approximately 6 W to W. The low thermal resistance of the SOT227 contribute to its wide acceptance throughout the industry. ABSOLUTE MAXIMUM RATINGS PARAMETER SYMBOL TEST CONDITIONS MAX. UNITS T C = 25 C 72 Continuous drain current at I D T C = 9 C 52 A Pulsed drain current I () DM 228 T C = 25 C 36 Power dissipation P D T C = 9 C 55 W Gate to source voltage ± 2 Single pulse avalanche energy E (2) AS 725 mj Repetitive avalanche current I () AR 22 A Repetitive avalanche energy E () AR 2 mj Peak diode recovery d/dt d/dt (3) /ns Operating junction and storage temperature range, T Stg 55 to 5 C Insulation withstand voltage (ACRMS) ISO 2.5 k Mounting torque M screw, on terminals and heatsink.3 Nm Notes () Repetitive rating; pulse width limited by maximum junction temperature (see fig. 8) (2) Starting = 25 C, L = 5 μh, R g = 2., I AS = 57 A (see fig. 8) (3) I SD 57 A, di F /dt 2 A/μs, DD (BR)DSS, 5 C Revision: 27Sep7 Document Number: 9782 ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?9
SFA72SA5LC THERMAL MECHANICAL SPECIFICATIONS PARAMETER SYMBOL TEST CONDITIONS MIN. TYP. MAX. UNITS Junction and storage temperature range, T Stg 55 5 C Junction to case R thjc. Case to heatsink R thcs Flat, greased surface.5 C/W Weight 3 g Mounting torque Torque to terminal. (9.7) Nm (lbf.in) Torque to heatsink.8 (5.9) Nm (lbf.in) Case style SOT227 ELECTRICAL CHARACTERISTICS ( = 25 C unless otherwise noted) PARAMETER SYMBOL TEST CONDITIONS MIN. TYP. MAX. UNITS Drain to source breakdown voltage (BR)DSS =, I D =. ma 5 Breakdown voltage temperature coefficient (BR)DSS / Reference to 25 C, I D = ma.6 / C Static drain to source onresistance R () DS(on) =, I D = 3 A 6.5 8. m =, I D = 25 μa 2. 3.. Gate threshold voltage (th) =, I D = 25 μa, = 25 C.9 Forward transconductance g fs = 5, I D = 3 A 52.5 S Drain to source leakage current I DSS = 5, =, = 25 C 3 5 = 5, =.5 5 μa = 5, =, = 5 C.2 3. ma Gate to source forward leakage = 2 2 I GSS Gate to source reverse leakage = 2 2 na Total gate charge Q g ID = 6 A 225 338 Gate to source charge Q gs = 5 77 nc Gate to drain ( Miller ) charge Q gd = ; see fig. 5 and 9 () 98 7 Turnon delay time t d(on) DD = 25 3 Rise time t r I D = 6 A Turnoff delay time t d(off) R g = 2. 5 ns Fall time t f L = 5 μh; diode used: 6APH6 3 Turnon delay time t d(on) DD = 25 35 Rise time t r I D = 6 A 7 Turnoff delay time t d(off) R g = 2. 6 ns Fall time t f L = 5 μh; diode used: 6APH6 35 Internal source inductance L S Between lead, and center of die contact 5. nh Input capacitance C iss GS = Output capacitance C oss = 25 5 pf Reverse transfer capacitance C rss f =. MHz, see fig. 5 Note () Pulse width 3 μs, duty cycle 2 % Revision: 27Sep7 2 Document Number: 9782 ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?9
SFA72SA5LC SOURCEDRAIN RATINGS AND CHARACTERISTICS PARAMETER SYMBOL TEST CONDITIONS MIN. TYP. MAX. UNITS Continuous source current (body diode) I S MOSFET symbol showing D 72 the integral reverse pn Pulsed source current (body diode) I () G SM 228 junction diode. S A = 25 C, I F = 5 A, di F /dt = A/μs (2) = 25 C, I F = 5 A, di F /dt = A/μs (2) Diode forward voltage (2) SD = 25 C, I S = 57 A, =.9.3 = 25 C, I S = 57 A, =.75 Reverse recovery time t rr 66 ns Reverse recovery current I rr 6 A Reverse recovery charge Q rr 5 μc Reverse recovery time t rr 88 ns Reverse recovery current I rr 5 A Reverse recovery charge Q rr 23 μc Forward turnon time t on Intrinsic turnon time is negligible (turnon is dominated by L S L D ) Notes () Repetitive rating; pulse width limited by maximum junction temperature (see fig. ) (2) Pulse width 3 μs, duty cycle 2 % Allowable Case Temperature ( C) 6 2 8 6 2 DC DrainSource Current (A) I DS 8 6 2 8 6 2 = 7 = 8 = = 2 = 5 = 6 = 5 2 6 8 I DS Continuous DrainSource Current (A) 2 6 8 2 6 8 2 DraintoSource oltage () Fig. Maximum DC MOSFET DrainSource Current I DS (A) Fig. 3 Typical DraintoSource Output Characteristics at = 25 C Continuous DrainSource Current (A) I DS = 25 C = 25 C = 5 C =... DraintoSource oltage () DraintoSource Current (A) I DS 9 8 7 6 5 3 2 = 7 = 8 = = 2 = 5 2 6 8 2 6 8 2 DraintoSource oltage () = 6 = 5 Fig. 2 Typical DraintoSource Output Characteristics Fig. Typical DraintoSource Current Output Characteristics at = 25 C Revision: 27Sep7 3 Document Number: 9782 ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?9
SFA72SA5LC DraintoSource Current (A) I DS 9 8 7 6 5 3 2 = 7 = 8 = = 2 = 5 2 6 8 2 6 8 2 DraintoSource oltage () = 6 = 5 DraintoSource Current (A) I DS 2 8 6 2 = 5 C = 25 C = 25 C 2.5 3. 3.5..5 5. 5.5 6. 6.5 7. 7.5 8. 8.5 9. 9.5 GatetoSource oltage () Fig. 5 Typical DraintoSource Current Output Characteristics at = 5 C Fig. 8 Typical MOSFET Transfer Characteristics R DS(on) DraintoSource OnResistance (mω) 2 8 6 2 8 6 I D = 6 A = 2 6 8 2 6 Junction Temperature ( C) DraintoSource Current (A) I DS = 5 C. = 25 C.. = 25 C.. 2 3 5 6 DraintoSource oltage () Fig. 6 Typical DraintoSource OnResistance vs. Temperature Fig. 9 Typical MOSFET Zero Gate oltage Drain Current Forward SourcetoDrain Current (A) I FSD 28 2 2 6 2 8 = 5 C = 25 C = 25 C..5..5 2. FSD DraintoSource Forward oltage Drop Characteristics () Fig. 7 Typical Body Diode Forward oltage Drop Characteristics Threshold oltage () TH 5.5 3.5 = 25 C 3 2.5 = 25 C 2.5 = 5 C.5.2..6.8. I D (ma) Fig. Typical MOSFET Threshold oltage Revision: 27Sep7 Document Number: 9782 ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?9
SFA72SA5LC t d(on) t d(off) Switching time (μs). t f t d(off) t d(on) Switching Time (μs). t r t f t r. 2 3 5 6 7 Draintosource current I ds (A) Fig. Typical MOSFET Switching Time vs. I DS, = 25 C, DD = 25, =, L = 5 μh, R G = 2. Diode used: 6APH6. 2 3 5 6 Rg (Ω) Fig. 2 Typical MOSFET Switching Time vs. R g, = 25 C, I DS = A, DD = 25, =, L = 5 μh Diode used: 6APH6 Z thjc Thermal Impedance Junction to Case ( C/W)..75 P DM..5.25 t. t 2 t.5. Duty Cycle, D = t 2.2 2. Peak = P DM x Z thjc T C DC...... t Rectangular Pulse Duration (s) Notes: Fig. 3 Maximum Thermal Impedance Z thjc Characteristics, MOSFET C Capacitance (pf) 5 2 9 6 3 GS =, f = MHz Ciss = Cgs Cgd, C ds SHORTED Crss = Cgd Coss = Cds Cgd C iss C oss C rss DraintoSource oltage () GatetoSource oltage () GS 2 6 2 8 I = D 57 A FOR TEST CIRCUIT SEE FIGURE 9 6 2 8 2 3 36 Q Total Gate Charge (nc) g DS DS DS = = 25 = Fig. Typical Capacitance vs. DraintoSource oltage Fig. 5 Typical Gate Charge vs. GatetoSource oltage Revision: 27Sep7 5 Document Number: 9782 ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?9
SFA72SA5LC OPERATION IN THIS AREA LIMITED BY R DS(on) I D Drain Current (A) μs μs ms TC = 25 C ms TJ = 5 C Single Pulse DS DraintoSource oltage () Fig. 6 Maximum Safe Operating Area R D tp (BR)DSS D.U.T. R G DD Pulse width µs Duty factor. % Fig. 7a Switching Time Test Circuit I AS Fig. 8b Unclamped Inductive Waveforms 9% Q GS Q G Q GD % GS t d(on) t r t d(off) t f Fig. 7b Switching Time Waveforms G Charge Fig. 9a Basic Gate Charge Waveform Current regulator Same type as D.U.T. 5 KW 5 2.2 µf.3 µf L Driver D.U.T. R G 2 t p D.U.T I AS. W Fig. 8a Unclamped Inductive Test Circuit DD A 3 ma Fig. 9b Gate Charge Test Circuit I G I D Current sampling resistors Revision: 27Sep7 6 Document Number: 9782 ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?9
SFA72SA5LC D.U.T. 3 Circuit layout considerations Low stray inductance Ground plane Low leakage inductance current transformer 2 R G d/dt controlled by R G Driver same type as D.U.T. I SD controlled by duty factor "D" D.U.T. Device under test DD Fig. 9c Peak Diode Recovery d/dt Test Circuit Driver Gate Drive Period P.W. D = P.W. Period = * D.U.T. I SD Waveform Reverse Recovery Current Body Diode Forward Current di/dt D.U.T. Waveform Diode Recovery dv/dt DD ReApplied oltage Inductor Curent Body Diode Forward Drop Ripple 5% I SD * = 5 for Logic Level Devices Fig. 2 For NChannel Power MOSFETs Revision: 27Sep7 7 Document Number: 9782 ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?9
SFA72SA5LC ORDERING INFORMATION TABLE Device code S F A 72 S A 5 LC 2 3 5 6 7 8 2 3 5 6 7 8 product Power MOSFET A = generation 3, MOSFET silicon die Current rating (72 = 72 A) Single switch Package indicator (SOT227) oltage rating (5 = 5 ) LC = low charge CIRCUIT CONFIGURATION CIRCUIT CIRCUIT CONFIGURATION CODE CIRCUIT DRAWING D(3) 3 (D) 2 (G) G(2) S() Lead Assignment Single switch S (S) (D) 3 2 (S) (S) (S) (G) Dimensions Packaging information LINKS TO RELATED DOCUMENTS www.vishay.com/doc?9523 www.vishay.com/doc?9525 Revision: 27Sep7 8 Document Number: 9782 ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?9
Outline Dimensions SOT227 Generation II DIMENSIONS in millimeters (inches) Ø. (.6) Ø.3 (.69) 38.3 (.58) 37.8 (.88) A x M nuts 2.5 (.92) 3. (.52) 6.25 (.26) 6.5 (.256) 25.7 (.2) 2.7 (.972) B 7.5 (.293) 7.6 (.299) 3.5 (.2) 29.8 (.73).9 (.587) 5.2 (.598) R full 2. (.83) 2.2 (.87) 3.5 (.2) 32. (.26) 8.3 (.327) x 7.7 (.33).25 (.) M C A M B M 2.2 (.87).9 (.75). (.6).5 (.77) C.3 (.5) 2.3 (.8).7 (.6) 25. (.98) 25.5 (.) Note Controlling dimension: millimeter Revision: 2Aug2 Document Number: 9523 ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?9
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