DATA SHEET MOS FIELD EFFECT TRANSISTOR 2SK2141 SWITCHING N-CHANNEL POWER MOS FET INDUSTRIAL USE DESCRIPTION The 2SK2141 is N-channel Power MOS Field Effect Transistor designed for high voltage switching applications. PACKAGE DIMENSIONS (in millimeters) FEATURES Low On-state Resistance RDS(on) = 1.1 Ω MAX. (VGS = 1 V, ID = 3. A) 1. ±.3 φ3.2 ±.2 4.5 ±.2 2.7 ±.2 LOW Ciss Ciss = 115 pf TYP. High Avalanche Capability Ratings Isolated TO-22 (MP-45F) Package 15. ±.3 1 2 3 3 ±.1 12. ±.2 ABSOLUTE MAXIMUM RATINGS (TA = 25 C) Drain to Source Voltage VDSS 6 V Gate to Source Voltage VGSS ±3 V Drain Current (DC) ID (DC) ±6. A Drain Current (pulse) ID (pulse)* ±24 A Total Power Dissipation (TC = 25 C) PT1 35 W Total Power Dissipation (Ta = 25 C) PT2 2. W Storage Temperature Tstg 55 to +15 C Channel Temperature Tch 15 C Single Avalanche Current IAS** 6. A Single Avalanche Energy EAS** 12 mj *PW 1 µs, Duty Cycle 1% **Starting Tch = 25 C, RG = 25 Ω, VGS = 2 V.7 ±.1 2.54 TYP. 1 2 3 4 ±.2 13.5 MIN. 1.3 ±.2 1.5 ±.2 2.54 TYP..65 ±.1 1. Gate 2. Drain 3. Source ISOLATED TO-22 (MP-45F) Drain (D) 2.5 ±.1 The diode connected between the gate and source of the transistor serves as a protector against ESD. When this device is actually used, an additional protection circuit is externally required if a voltage exceeding the rated voltage may be applied to this device. Gate (G) Source (S) Body diode Document No. TC-2514 (O.D. No. TC 873) Date Published January 1995 P Printed in Japan 1995
ELECTRICAL CHARACTERISTICS (TA = 25 C) CHARACTERISTIC SYMBOL MIN. TYP. MAX. UNIT TEST CONDITIONS Drain to Source On-state Resistance RDS(on).8 1.1 Ω VGS = 1 V, ID = 3. A Gate to Source Cutoff Voltage VGS(off) 2.5 3.5 V VDS = 1 V, ID = 1 ma Forward Transfer Admittance yfs 2. S VDS = 1 V, ID = 3. A Drain Leakage Current IDSS 1 µa VDS = 6V, VGS = Gate to Source Leakage Current IGSS ±1 na VGS = ±3 V, VDS = Input Capacitance Ciss 115 pf VDS = 1 V Output Capacitance Coss 26 pf VGS = Reverse Transfer Capacitance Crss 6 pf f = 1 MHz Turn-On Delay Time td(on) 15 ns VGS = 1 V Rise Time tr 15 ns VDD = 15 V Turn-Off Delay Time td(off) 75 ns ID = 3. A, RG = 1 Ω Fall Time tf 13 ns RL = 37.5 Ω Total Gate Charge QG 4 nc VGS = 1 V Gate to Source Charge QGS 6. nc ID = 6. A Gate to Drain Charge QGD 2 nc VDD = 48 V Diode Forward Voltage VF(S-D) 1. V IF = 6. A, VGS = Reverse Recovery Time trr 37 ns IF = 6. A Reverse Recovery Charge Qrr 1.5 µc di/dt = 5 A/µs Test Circuit 1: Avalanche Capability Test Circuit 2: Switching Time D.U.T. RG = 25 Ω PG. 5 Ω VGS = 2 V L VDD PG. RG D.U.T. RG = 1 Ω RL VDD VGS Wave Form VGS ID 1 % 9 % VGS (on) 9 % 9 % ID IAS BVDSS VDS VGS τ ID Wave Form ID 1 % 1 % td(on) tr td (off) tf VDD Starting Tch τ = 1 µ s Duty Cycle 1% ton toff Test Circuit 3: Gate Charge PG. D.U.T. IG = 2 ma 5 Ω RL VDD The application circuits and their parameters are for references only and are not intended for use in actual design-in's. 2
TYPICAL CHARACTERISTICS (TA = 25 C) 1 DERATING FACTOR OF FORWARD BIAS SAFE OPERATING AREA 8 TOTAL POWER DISSIPATION vs. CASE TEMPERATURE dt - Percentage of Rated Power - % 8 6 4 2 PT - Total Power Dissipation - W 6 4 2 2 4 6 8 1 12 14 16 2 4 6 8 1 12 14 16 TC - Case Temperature - C TC - Case Temperature - C FORWARD BIAS SAFE OPERATING AREA 1 1 1. ID (DC) RDS (on) Limited (at VGS = 2 V) ID (pulse) 1 ms 1 ms Power Dissipation Limited 2 ms PW = 1 s µ µ 1 s TC = 25 C Single Pulse.1 1. 1 1 1 12 1 8 6 4 2 DRAIN CURRENT vs. DRAIN TO SOURCE VOLTAGE 1 V 12 V 8 V VGS = 6 V 4 8 12 16 2 VDS - Drain to Source Voltage - V VDS - Drain to Source Voltage - V 1 DRAIN CURRENT vs. GATE TO SOURCE VOLTAGE 5 1 5. Tch = 125 C 75 C 25 C 25 C 1. VDS = 1 V 5 1 VGS - Gate to Source Voltage - V 3
1 1 1..1.1 rth (t) - Transient Thermal Resistance - C/W1 TRANSIENT THERMAL RESISTANCE vs. PULSE WIDTH.1 1 µ 1 µ 1 m 1 m 1 m 1 1 1 1 PW - Pulse Width - s Rth (ch-a) = 62.5 C/W Rth (ch-c) = 3.57 C/W TC = 25 C Single Pulse yfs - Forward Transfer Admittance - S 1 1. FORWARD TRANSFER ADMITTANCE vs. DRAIN CURRENT Tch = 25 C 25 C 75 C 125 C VDS = 1 V.1.1 1. 1 RDS (on) - Drain to Source On-State Resistance - Ω DRAIN TO SOURCE ON-STATE RESISTANCE vs. GATE TO SOURCE VOLTAGE 2. 1. ID = 6. A 3. A 1.2 A 4 8 12 16 2 VGS - Gate to Source Voltage - V RDS (on) - Drain to Source On-State Resistance - Ω 2. 1.6 1.2.8.4 DRAIN TO SOURCE ON-STATE RESISTANCE vs. DRAIN CURRENT VGS = 1 V 2 V 1. 1 1 VGS (off) - Gate to Source Cutoff Voltage - V 5. 4. 3. 2. GATE TO SOURCE CUTOFF VOLTAGE vs. CHANNEL TEMPERATURE 1. VDS = 1 V ID = 1 ma 5 5 1 15 Tch - Channel Temperature - C 4
RDS (on) - Drain to Source On-State Resistance - Ω DRAIN TO SOURCE ON-STATE RESISTANCE vs. CHANNEL TEMPERATURE 3. VGS = 1 V 2. 1. ID = 6 A 3 A 5 5 1 15 Tch - Channel Temperature - C ISD - Diode Forward Current - A 5 1 1..1.1 VGS = 1 V SOURCE TO DRAIN DIODE FORWARD VOLTAGE.5 VGS = V 1. VSD - Source to Drain Voltage - V 1.5 Ciss, Coss, Crss - Capacitance - pf 1 1 1 TC = 25 C Single Pulse 1 1. CAPACITANCE vs. DRAIN TO SOURCE VOLTAGE Crss Ciss Coss 1 1 1 VDS - Drain to Source Voltage - V td (on), tr, td (off), tf - Switching Time - ns 1 1 1 SWITCHING CHARACTERISTICS td (on) VDD = 15 V VGS = 1 V RG = 1 Ω 1. 1. 1 1 tr tf td (off) VDS - Drain to Source Voltage - V 8 6 4 2 DYNAMIC INPUT CHARACTERISTICS VDD = 45 V 3 V 12 V VDS VGS ID = ID (DC) 16 14 12 1 8 6 4 2 VGS - Gate to Source Voltage - V trr - Reverse Recovery Time - ns 8 6 4 2 REVERSE RECOVERY TIME vs. DIODE FORWARD CURRENT di/dt = 5 A/ µ s VGS = 1 V 2 4 6 8 Qg - Gate Charge - nc.1 1. 1 1 Diode Forward Current - A 5
IAS - Single Avalanche Current - A 5 1 SINGLE AVALANCHE CURRENT vs. INDUCTIVE LOAD IAS = 6. A RG = 25 Ω 1. VDD = 15 V VGS = 2 V Starting Tch.5 1 µ 1 µ EAS = 12 mj 1 m 1 m EAS - Single Avalanche Energy - mj 14 12 1 8 6 4 2 SINGLE AVALANCHE ENERGY vs. STARTING CHANNEL TEMPERATURE ID (peak = ID (DC) VDD = 15 V 25 5 75 1 125 15 L - Inductance - H Starting Tch-Starting Channel Temperature - C 6
REFERENCE Document Name NEC semiconductor device reliability/quality control system. Quality grade on NEC semiconductor devices. Semiconductor device mounting technology manual. Semiconductor device package manual. Guide to quality assurance for semiconductor devices. Semiconductor selection guide. Power MOS FET features and application switching power supply. Application circuits using Power MOS FET. Safe operating area of Power MOS FET. Document No. TEI-122 IEI-129 IEI-127 IEI-1213 MEI-122 MF-1134 TEA-134 TEA-135 TEA-137 7
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