IR2172 LINEAR CURRENT SENSING IC. Features. Product Summary

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Features Floating channel up to +00V Monolithic integration Linear current feedback through shunt resistor Direct digital PWM output for easy interface Low IQBS allows the boot strap power supply Independent fast overcurrent trip signal High common mode noise immunity Input overvoltage protection for IGBT short circuit condition Open Drain outputs Description is the monolithic current sensing IC designed for motor drive applications. It senses the motor phase current through an external shunt resistor, converts from analog to digital signal, and transfers the signal to the low side. IR s proprietary high voltage isolation technology is implemented to enable the high bandwidth signal processing. The output format is discrete PWM to eliminate need for the A/D input interface. The dedicated overcurrent trip () signal facilitates IGBT short circuit protection. The output pulse can be programmed by the external resistor and capacitor. The open-drain outputs make easy for any interface from.v to 1V. ADVAE INFORMATION Product Summary Packages Data Sheet No. PD01-C LINEAR CURRENT SENSING IC V OFFSET 00Vmax I QBS 1mA Vin +/-0mVmax Gain temp.drift 0ppm/ o C (typ.) fo Overcurrent trip signal delay Overcurrent trip level 8 Lead SOIC 0kHz (typ.) 1.usec (typ) +/-0mV (typ.) 8 Lead PDIP 1 Lead SOIC (wide body) Block Diagram Up to 00V 1V VCC V+ PWM Output GND Overcurrent V- To Motor Phase

ADVAE INFORMATION Absolute Maximum Ratings Absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. All voltage parameters are absolute voltages referenced to, all currents are defined positive into any lead. The thermal resistance and power dissipation ratings are measured under board mounted and still air conditions. Symbol Definition Min. Max. Units V S High side offset voltage -0. 00 V BS High side floating supply voltage -0. V CC Low side and logic fixed supply voltage -0. V IN Maximum input voltage between V IN+ and V IN- - V Digital PWM output voltage -0. VCC +0. V Overcurrent output voltage -0. VCC +0. V IN- V IN- input voltage (note 1) V S - V B+ 0. dv/dt Allowable offset voltage slew rate 0 V/ns P D Package power dissipation @ T A + C 8 lead SOIC. 8 lead PDIP 1.0 W 1 lead SOIC 1. Rth JA Thermal resistance, junction to ambient 8 lead SOIC 00 8 lead PDIP 1 C/W 1 lead SOIC 100 T J Junction temperature 10 T S Storage temperature - 10 C T L Lead temperature (soldering, 10 seconds) 00 Note 1: Capacitors are required between and Vin-, and between and Vs pins when bootstrap power is used. The external power supply, when used, is required between Vs and Vin-, and between and Vs pins. V Recommended Operating Conditions The output logic timing diagram is shown in figure 1. For proper operation the device should be used within the recommended conditions. Symbol Definition Min. Max. Units V B High side floating supply voltage V S +1.0 V S +0 V S High side floating supply offset voltage note 00 V Digital PWM output voltage VCC V V Overcurrent output voltage VCC V CC Low side and logic fixed supply voltage 9. 0 V IN Input voltage between V IN+ and V IN- -0 +0 mv T A Ambient temperature -0 1 C Note : Logic operation for Vs of - to +00V. Logic state held for Vs of -V to -S.

ADVAE INFORMATION DC Electrical Characteristics V CC = V BS = 1V, unless otherwise specified. Symbol Definition Min. Typ. Max. Units Test Conditions V IN Nominal input voltage range before saturation -0 0 V IN+ _ V IN- V + Overcurrent trip positive input voltage 0 V - Overcurrent trip negative input voltage -0 V OS Input offset voltage -10 0 10 V IN = 0V (Note 1) V OS/ TA Input offset voltage temperature drift µv/ o C G Gain (duty cycle % per V IN ) 1 1 1 %/V max gain error=% (Note ) G/ TA Gain temperature drift 0 ppm/ o C I LK Offset supply leakage current 0 µa V B = V S = 00V I QBS Quiescent V BS supply current 1 V S = 0V ma I QCC Quiescent V CC supply current 1 LIN Linearity (duty cycle deviation from ideal linearity 0. 1 % curve) V LIN/ TA Linearity temperature drift.00 %/ o C I O Digital PWM output sink current 0 ma I C output sink current 10 1 mv V O = 1V V O = 0.1V V O = 1V V O = 0.1V Note 1: ±10mV offset represents ±1.% duty cycle fluctuation Note : Gain = (full range of duty cycle in %) / (full input voltage range). AC Electrical Characteristics V CC = V BS = 1V, unless otherwise specified. Symbol Definition Min. Typ. Max. Units Test Conditions Propagation delay characteristics fo Carrier frequency output 0 khz figure 1 f/ TA Temperature drift of carrier frequency 00 ppm/ o C V IN = 0 & V Dmin Minimum duty % VIN+=-0mV,VIN-=0V Dmax Maximum duty 9 % VIN+=+0mV,VIN-=0V BW fo bandwidth 1 khz PHS Phase shift at 1kHz -10 o V IN + = 100mVpk -pk sine wave, gain=-db V IN + =100mVpk-pk sine wave

ADVAE INFORMATION AC Electrical Characteristics cont. V CC = V BS = 1V, unless otherwise specified. Symbol Definition Min. Typ. Max. Units Test Conditions Proagation delay characteristics tdoc Propagation delay time of 1 1. twoc Low true pulse width of 1 µsec Timing Waveforms Duty=% Vin+= -0mV Vin- = 0V Duty=9% Vin+= +0mV Vin- = 0V Carrier Frequency = 0kHz Figure 1 Output waveform Application Hint: Temperature drift of the output carrier frequency can be cancelled by measuring both a PWM period and the on-time of PWM (Duty) at the same time. Since both periods vary in the same direction, computing the ratio between these values at each PWM period gives consistent measurement of the current feedback over the temperature drift.

ADVAE INFORMATION Lead Definitions Symbol Description V CC V IN+ V IN- V B V S N.C. Low side and logic supply voltage Low side logic ground Positive sense input Negative sense input High side supply High side return Digital PWM output Overcurrent output (negative logic) No connection Lead Assignment 1 VCC VIN+ 8 1 VCC VIN+ 8 1 1 VIN- VIN- 1 VCC VIN+ 1 VIN- 1 1 8 lead SOIC 8 lead PDIP 11 S 10 8 9 1 lead SOIC S

ADVAE INFORMATION Case Outline - 8 Lead SOIC (MS-01AA) 01-001 09 8 Lead PDIP 01-00 01

ADVAE INFORMATION 1 Lead SOIC (wide body) 01-01 0 IR WORLD HEADQUARTERS: Kansas St., El Segundo, California 90 Tel: (10) -10 IR EUROPEAN REGIONAL CENTRE: 9/ Godstone Rd., Whyteleafe, Surrey CR 0BL, United Kingdom Tel: ++ (0) 0 8 8000 Data and specifications subject to change without notice. /0/000