GreenMode PWM Conroller wih Variable Frequency and Brown IN/ Proecions REV. 01 General Descripion The is buil wih several funcions, proecion and EMIimproved soluion in a iny package. I akes less componen couns or circui space, especially in he ideal for hose oal soluions of low cos. The implemened funcions include low sarup curren, greenmode powersaving operaion, leadingedge blanking of he curren sensing and inernal slope compensaion. I also feaures more proecions like OPP (Over Power Proecion), OCP (Over Curren Proecion), OSCP (Oupu Shor Circui Proecion) and OVP (Over Volage Proecion) o preven circui damage occurred under abnormal condiions. Furhermore, he Frequency Swapping funcion is o reduce he noise level and hus helps he power circui designers o easily deal wih he EMI filer design by spending minimum amoun of componen cos and developing ime. Typical Applicaion Feaures HighVolage CMOS Process wih Excellen ESD proecion Very Low Sarup Curren (<12 A) Curren Mode Conrol Green Mode Conrol UVLO (Under Volage Lockou) Variable Frequency Technology around 130kHz LEB (LeadingEdge Blanking) on CS Pin Inernal Frequency Swapping Inernal Slope Compensaion OVP (Over Volage Proecion) on Pin BNO/BNI (BrownOu/In) Funcion OPP (Over Power Proecion) OCP (Over Curren Proecion) OSCP (Shor circui proecion) 300mA/500mA Driving Capabiliy Applicaions Swiching AC/DC Adapor and Baery Charger Open Frame Swiching Power Supply AC inpu EMI Filer DC Oupu BNO COMP CS/OVP phoocoupler GND DS01 Sepember 2015 1
Pin Configuraion SOT26 (TOP VIEW) CS 6 5 4 37 YW pp 1 2 3 GND COMP BNO Ordering Informaion YY, Y : Year code (D: 2004, E: 2005..) WW, W : Week code PP : Producion code 37 : Par number Package Top Mark Shipping GL SOT26 YW/37 3000 /ape & reel The is ROHS complian/ Green packaged Proecion Mode Swiching OVP BNO OPP OCP OSCP In. OTP CS Pin OVP Freq. 130kHz AuoResar AuoResar AuoResar AuoResar AuoResar AuoResar AuoResar Pin Descripions PIN NAME FUNCTION 1 GND Ground 2 COMP Volage feedback pin (same as he COMP pin in UC384X). Connec a phoocoupler o close he conrol loop and achieve he regulaion. 3 BNO Brownou Proecion Pin. Connec a resisor divider beween his pin and bulk capacior volage o se he brownou level. If he volage below he hreshold, he PWM oupu will be disabled. 4 CS Curren sense pin, connec i o sense he MOSFET curren. This pin is also conneced o an auxiliary winding of he PWM ransformer hrough a resisor and a diode for oupu overvolage proecion. 5 Supply volage pin 6 Gae drive oupu o drive he exernal MOSFET DS01 Sepember 2015 2
Block Diagram UVLO 28.5V Vcc OVP Comparaor OVP 31V UVLO On/off PG Vcc OK Vref OK Inernal Bias&Ref OSCP Lach 4.5V Vcc Sof Drive PDR COMP RFB Bias Green Mode OSC Conrol 2Vf 2R R OPP/OCP PWM Comparaor S R SET CLR Q Q VBIAS Duy Σ Slope Com. OPP Comparaor V OPP CS COMP LEB 0.75V BNI//BNO 1.40/1.30V BNO Offse Delay Time OCP Comparaor OSC1. Sample Delay OSCP COMP 4.7V OPP Comparaor Delay Time Delay Time OSC2. S SET Q OPP/ OCP PDR 0.30V CSOVP In. OTP OSC1. PG OVP/CS_OVP Ex. OTP BNO ½ Couner PG R S R CLR SET CLR Q Q Q Lach PDR GND DS01 Sepember 2015 3
Absolue Maximum Raings Supply Volage COMP, BNO, CS Maximum Juncion Temperaure Sorage Temperaure Range Package Thermal Resisance (SOT26, JA) Power Dissipaion (SOT26, a Ambien Temperaure = 85 C) Lead emperaure (Soldering, 10sec) ESD Volage Proecion, Human Body Model ESD Volage Proecion, Machine Model 0.3V ~ 30V 0.3V ~ 10V 0.3V ~ 0.3V 150 C 65 C ~ 150 C 200 C/W 200mW 260 C 2.5 KV 250 V Cauion: Sress exceeding Maximum Raings may damage he device. Maximum Raings are sress raings only. Funcional operaion above he Recommended Operaing Condiions is no implied. Exended exposure o sress above Recommended Operaing Condiions may affec device reliabiliy. Recommended Operaing Condiions Iem Min. Max. Uni Operaing Juncion Temperaure 40 125 C Supply Volage 8.5 26.5 V Capacior 3.3 10 F Sarup resisor Value (AC Side, Half Wave) 400K 1.8M COMP Pin Capacior 1 10 nf CS Pin Capacior Value 47 390 pf Noe: 1. I s essenial o connec pin wih a SMD ceramic capacior (0.1 F ~ 0.47 F) o filer ou he undesired swiching noise for sable operaion. This capacior should be placed close o IC pin as possible 2. Connecing a capacior o COMP pin is also essenial o filer ou he undesired swiching noise for sable operaion. 3. The small signal componens should be placed close o IC pin as possible. DS01 Sepember 2015 4
Elecrical Characerisics (T A = 25 C unless oherwise saed, =15.0V) PARAMETER CONDITIONS SYMBOL MIN TYP MAX UNITS Supply Volage ( Pin) Sarup Curren < UVLO(ON) I STUP 12 A Operaing Curren (wih 1nF load on pin) V COMP =0V I _0V 0.55 0.65 ma V COMP =3V I _3V 2 2.5 ma Auo mode. I HD_AUTO 530 A UVLO(OFF) V UVLO(OFF) 7 8.6 9.1 V UVLO(ON) V UVLO(ON) 15 16 17 V OVP Level V OVP 27.3 28.5 29.7 V OVP pin debounce ime T DE_OVP 6 8 10 cycle Volage Feedback (COMP Pin) Shor Circui Curren V COMP =0V I COMP_0V 0.09 0.125 0.16 ma Open Loop Volage COMP pin open I COMP_OP 5.1 5.3 5.5 V Peak Mode Threshold V COMP V COMP_PK 4.1 4.2 4.3 V Peak Mode Down Threshold (Fig. 1) V COMP_DN 3.9 4.0 4.1 V Green Mode Threshold V COMP V COMP_GN 2.85 2.95 3.05 V Green Mode Down V COMP, FSW_DN Threshold V COMP_GN_DN 2.35 2.45 2.55 V Zero Duy Threshold V COMP V ZD 1.6 1.7 1.8 V Zero Duy Hyseresis V ZD_H 100 mv IOPP Threshold V COMP Duy 20% V IOPP 3.9 4 4.1 V Curren Sensing (CS Pin) Limi Volage, V CS_OFF Duy 50% V CS_OFF 0.735 0.75 0.765 V OCP Volage for Low line, V CS (Fig. 2) V CS 0.666 0.680 0.694 V OCP Volage for High line V CS 0.608 0.620 0.632 V OPP Compensaion Curren Duy 50% I OPP_50 0 5 A Duy 20% I OPP_20 552 575 598 A Leading Edge Blanking Time T LEB 200 250 300 Ns Inernal Slope Compensaion *, 0% o D MAX. (Linearly increase) V SLOP 300 mv DS01 Sepember 2015 5
PARAMETER CONDITIONS Symbol MIN TYP MAX UNITS Inpu impedance * Z IN 1 M Delay o Oupu * T D 50 100 ns OVP CS pin OVP Trip Curren Level V CS_OVP 0.276 0.3 0.324 V Debounce Cycle T DE_OVP 8 Cycle Oscillaor for Swiching Frequency Frequency, FREQ Normal mode F SW 62 65 68 khz Peak mode F SW_PK 123 130 137 khz Green Mode Frequency, FREQG Green mode F SW_GM 20 23 26 khz Swapping Frequency F SWAP ±6 % Temp. Sabiliy *, (20 C ~ 85 C) T STAB 0 5 % Volage Sabiliy *, (=11V ~ 25V) V STAB 0 1 % Frequency V CS_OCP 130kHz Peak load 0.68V 65kHz 23kHz Green mode Normal mode Burs mode 1.7V~1.8V 2.45V 2.95V 4.0V V 4.2V COMP 0.62V 20% 50% Duy % Fig. 1 V COMP vs. PWM Frequency Fig. 2 Duy vs. OCP level DS01 Sepember 2015 6
PARAMETER CONDITIONS Symbol MIN TYP MAX UNITS Gae Drive Oupu ( Pin) Oupu Low Level =15V, I O=20mA V O_L 1 V Oupu High Level =15V, I O=20mA V O_H 8 15 V Oupu High Clamp Level =20V V O_HC 13 15 17 V Rising Time Falling Time Load Capaciance=1000pF Load Capaciance=1000pF T r T f 150 250 ns 50 100 ns Source capabiliy *, Load Capaciance=33nF I O_SOURCE 300 ma Sink capabiliy *, Load Capaciance=33nF I O_SINK 500 ma Max. Duy D MAX 80 85 90 % OPP (Over Power Proecion) OPP Trip Level V COMP_OPP 4.5 4.7 4.9 V OPP Delay Time Excluding sof sar ime T D_OPP 35 40 45 ms OCP (Over Curren Proecion) OCP Delay Time T D_OCP 100 110 120 ms OSCP (Oupu Shor Circui Proecion) OSCP Trip Level V OSCP 0.735 0.75 0.765 V OSCP Delay Time Excluding sof sar ime. T D_OSCP 6 8 10 Cycle Brownou Proecion (BNO Pin) Brownou TurnOn Trip Level >12.5V V BNI 1.40 V Brownou TurnOff Trip Level V BNO 1.3 V BNO Pin Debounce Time T D_BNO 40 45 50 ms On Chip OTP (Over Temperaure) OTP Level (2) T OTP 140 C OTP Hyseresis (2) T H_OTP 30 C Sof Sar Duraion Sof Sar Duraion * T SS 7 ms Noes: 1. * : guaraneed by design 2. The hreshold emperaure for enabling he oupu again and reseing he lach afer OTP has been acivaed. DS01 Sepember 2015 7
Typical Performance Characerisics DS01 Sepember 2015 8
VCS(V) BNO (V) VBNI & VBNO (V) VCS (mv) 1 0.9 VCS_OFF VCS_OCP 0.8 0.7 0.6 0.5 40 0 40 80 120 Temperaure ( C) Fig. 9 OCP& Limi level vs.temperaure 320 315 310 305 300 295 290 285 280 40 0 40 80 120 Temperaure ( C) Fig. 12 VCS OVP Level vs.temperaure 1.7 1.65 1.6 VBNI VBNO 1.55 1.5 1.45 1.4 1.35 1.3 1.25 1.2 40 0 40 80 120 Temperaure ( C) Fig. 13 BNI & BNO vs.temperaure DS01 Sepember 2015 9
Applicaion Informaion Operaion Overview The mees he greenpower requiremen and is inended for he use in hose modern swiching power suppliers and adapors which demand higher power efficiency and powersaving. I inegraes more funcions o reduce he exernal componens couns and he size. Is major feaures are described as below. Under Volage Lockou (UVLO) An UVLO comparaor is implemened in i o deec he volage on he pin. I would assure he supply volage enough o urn on he PWM conroller and furher o drive he power MOSFET. As shown in Fig. 14, a hyseresis is buil in o preven he shudown from he volage dip during sarup. The urnon and urnoff hreshold level are se a 16.0V and 7.5V, respecively. i will enable he auxiliary winding of he ransformer o provide supply curren. Lower sarup curren requiremen on he PWM conroller will help o increase he value of R1 and hen reduce he power consumpion on R1. By using CMOS process and he special circui design, he maximum sarup curren for is only 12 A. If a higher resisance value of he R1 is chosen, i will usually spend more ime o sar up. To carefully selec he value of R1 and C1 will opimize he power consumpion and sarup ime. AC inpu EMI Filer Cbulk D1 R1 C1 UVLO(ON) UVLO(OFF) I() operaing curren (~ ma) Fig. 15 CS GND sarup curren (~ua) Fig. 14 Sarup Curren and Sarup Circui The ypical sarup circui o generae of he is shown in Fig. 15. During he sarup ransien, he is below UVLO hreshold. Before i has sufficien volage o develop pulse o drive he power MOSFET, R1 will provide he sarup curren o charge he capacior C1. Once obain enough volage o urn on he and furher o deliver he gae drive signal, Curren Sensing and Leadingedge Blanking The ypical curren mode of PWM conroller feedbacks boh curren signal and volage signal o close he conrol loop and achieve regulaion. As shown in Fig. 16, he deecs he primary MOSFET curren from he CS pin, which is no only for he peak curren mode conrol bu also for he pulsebypulse curren limi. The maximum volage hreshold of he curren sensing pin is se a 0.75V. From above, he MOSFET peak curren is concluded as below. DS01 Sepember 2015 10
I PEAK(MAX) = 0.75V R S V IN AC Line Cbulk R1 D1 C1 150ns blanking ime GND CS COMP GND CS Rs Can be removed if he negaive spike is no over spec. (0.3V). Fig. 17 Fig. 16 A 250nS leadingedge blanking (LEB) ime is included in he inpu of CS pin o preven falseriggering from he curren spike. In hose low power applicaions, if he oal pulse widh of he urnon spikes is less han 150nS and he negaive spike on he CS pin below 0.3V, he RC filer is free o eliminae. (As shown in Fig. 17). However, he oal pulse widh of he urnon spike is subjec o oupu power, circui design and PCB layou. I is srongly recommended o adop a smaller RC filer (as shown in Fig. 18) for large power applicaion o avoid he CS pin being damaged by he negaive urnon spike. CS GND RC filer is required when he negaive spike exceeds 0.3V or he oal spike widh is over 250nS LEB period. Fig. 18 Oupu Sage and Maximum DuyCycle An oupu sage of a CMOS buffer, wih ypical 500mA driving capabiliy, is incorporaed o drive a power MOSFET direcly. And he maximum duycycle of is limied o 85% o avoid he ransformer sauraion. DS01 Sepember 2015 11
Volage Feedback Loop The volage feedback signal is provided from he TL431 a he secondary side hrough he phoocoupler o he COMP pin of he. Similar o UC3842, he would carry 2 diode volage offse a he sage o feed he volage divider a he raio of RA and RB, ha is, UVLO(ON) UVLO(OFF) COMP OPP OPP Rese TOPP V PWM ( COMPARATOR RB ) (VCOMP 2VF ) RA RB A pullhigh resisor is embedded inernally and herefore no exernal one is required. 4.7V OPP Trip Level Inernal Slope Compensaion In he convenional applicaions, he problem of he sabiliy is a criical issue for curren mode conrolling, when i operaes over 50% duycycle. As UC384X, I akes slope compensaion from he ramp signal of he RT/CT pin injeced hrough a coupling capacior. I herefore requires no exra design for he since i has inegraed i already. On/Off Conrol To pull COMP below 1.6V can disable he gae oupu pin of he. The offmode can be released when he pulllow signal is removed. Over Power Proecion (OPP) Auo Recovery To proec he circui from damage in overpower shor or openloop condiion, he is implemened wih smar OPP funcion. I also feaures auo recovery funcion, see Fig. 19 for he waveform. In case of faul condiion, he feedback sysem will force he volage loop ener oward sauraion and hen pull he volage high on COMP pin (V COMP). When he V COMP ramps up o he OPP hreshold of 4.7V and coninues over OPP delay ime, he proecion will be acivaed and hen urn off he gae oupu o sop he swiching of power circui. Wih he proecion mechanism, he average inpu power will be minimized o remain he componen emperaure and sress wihin he safe operaing area. Swiching NonSwiching Swiching Fig. 19 Over Curren Proecion (OCP) Auo Recovery When he swiching curren is higher han he OCP hreshold, he inernal couner couns up. When he oal accumulaed couning ime is more han 110ms, he conroller riggers he OCP. This proecion is auo recovery funcion. OSCP (Oupu Shor Circui Proecion) Auo Recovery Even when he oupu shors o GND, here s no way o urn off he signal unless he following four condiions are me. 1. The CS is higher han limi volage. 2. The COMP volage is higher han 4.7V 3. This duraion is greaer han 8 cycles. 4. Turn on ime is lower han 1us. The ou signal could no be charged eiher, if i fails o mee he four condiions. Once he proecion is riggered, swiching is erminaed and he MOSFET remains off. DS01 Sepember 2015 12
OVP (Over Volage Proecion) on Auo Recovery The Vcc OVP funcion of is in auo recovery mode. As soon as he volage of he Vcc pin rises above OVP hreshold, he oupu gae drive circui will be shudown simulaneous o urn off he power MOSFET. Fig. 20 shows is operaion. Line Volage V BNO 1.40V 1.30V OVP Level UVLO (on) UVLO (off) Normal Range OVP UVLO(off) OVP Rese UVLO(ON) UVLO(OFF) Swiching Non Swiching Swiching NonSwiching Swiching Non Swiching Fig. 20 Fig. 21 Brownou Proecion The is programmable for he brownou proecion poin hough BNO pin. The volage across he BNO pin is proporional o he bulk capacior volage, referred as he line volage. A brownou comparaor is implemened o deec he abnormal line condiion. As soon as he condiion is deeced, i will shu down he conroller o preven he damage. Fig. 21 shows he operaion. When VBNO falls below 1.30V, he gae oupu will remain off even as achieved UVLO(ON). I herefore makes hiccup beween UVLO(ON) and UVLO(OFF). Unless he line volage is large enough o pull VBNO over 1.40V, he gae oupu will no sar swiching even when he nex UVLO(ON) is ripped. A hyseresis is implemened o preven he false rigger during urnon and urnoff. Adjusable Over Power Compensaion (CS Pin) In general, he power converer can deliver more curren wih high inpu volage han low inpu volage. To compensae his, an offse volage is added o he CS signal by an inernal curren source (I OPP) and an exernal resisor (R OPP) in series beween he sense resisor (Rs) and he CS pin, as shown in Fig. 22. Differen values of resisors in series wih he CS pin may adjus he amoun of compensaion. The value of I OPP depends on he duy cycle of pin. The equaion of I OPP is decreased as: (0.5 Duy) 1915uA(0.2 Duy 0.5) I OPP 0uA (Duy 0.5) 575uA (Duy 0.2) In ligh load, his offse is in same level of magniude as he curren sense signal, i shall be canceled. Therefore DS01 Sepember 2015 13
he compensaion curren will be fully added once he COMP volage is above 3.05V, as shown in Fig. 23. R OCP: 470 ~1.4k ; C OCP:82pF~390pF 0.75V Limi Comparaor I OPP VBIAS Duy/V COMP ESD or lighning evens. However, when ypically 8 cycles of subsequen OVP evens are deeced, he OVP circui swiches he power MOSFET off. As he proecion is auo recovery, he converer resars afer he V CC is lower han UVLO OFF level and hen recharge o UVLO ON. Delay Sample AUX LEB CS R OPP R S OVP Debouce 8 cycle 0.30V CS ROPP RS Fig. 22 Fig. 24 I OPP Duy 0.1 Ou Duy= 0.2 Duy AUX Winding Duy= 0.3 Sample 3.9V 4.2V Fig. 23 V COMP Delay Oupu Over Volage Proecion Auo Recovery An oupu overvolage proecion is implemened in he o sense he auxiliary volage via he divided resisors as shown in Fig. 24. The auxiliary winding volage is refleced o he secondary winding and herefore he fla volage on he CS pin is in proporion o he oupu volage. can sample his fla volage level afer a delay ime o perform oupu over volage proecion. This delay ime is used o ignore he volage ringing from leakage inducance of PWM ransformer. The sampling volage level is compared wih inernal hreshold volage 0.30V. If he sampling volage exceeds he OVP rip level, an inernal couner sars couning he subsequen OVP evens. The couner has been added o preven incorrec OVP deecion which migh occur during Fig. 25 Oscillaor and Swiching Frequency The is implemened wih Frequency Swapping funcion which helps he power supply designers opimize EMI performance and reduce sysem cos. The swiching frequency subsanially ceners a 130kHz, and swap beween a range of ±6%. GreenMode Operaion By using he greenmode conrol, he swiching frequency can be reduced in ligh load condiion. This feaure helps o improve he efficiency in ligh load condiions. The greenmode conrol is Leadrend Technology s own propery. DS01 Sepember 2015 14
Faul Proecion There are several criical proecions inegraed in he o preven from damage o he power supply. Those damages usually came from open or shor condiions on. In case under he condiions lised below, he gae oupu will urn off immediaely o proec he power circui. 1. CS pin floaing 2. COMP pin floaing DS01 Sepember 2015 15
Package Informaion SOT26 Symbol Dimension in Millimeers Dimensions in Inches Min Max Min Max A 2.692 3.099 0.106 0.122 B 1.397 1.803 0.055 0.071 C 1.450 0.057 D 0.300 0.500 0.012 0.020 F 0.95 TYP 0.037 TYP H 0.080 0.254 0.003 0.010 I 0.050 0.150 0.002 0.006 J 2.600 3.000 0.102 0.118 M 0.300 0.600 0.012 0.024 θ 0 10 0 10 Imporan Noice Leadrend Technology Corp. reserves he righ o make changes or correcions o is producs a any ime wihou noice. Cusomers should verify he daashees are curren and complee before placing order. DS01 Sepember 2015 16
Revision Hisory REV. Dae Change Noice 00 01/19/2015 Original Specificaion 01 Modify Typical Performance Characerisics DS01 Sepember 2015 17