AUTOMOTIVE MOSFET TO-220AB IRFZ44VZ A I DM. 230 P C = 25 C Power Dissipation 92 Linear Derating Factor V GS Gate-to-Source Voltage ± 20

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Features Advanced Process Technology Ultra Low On-Resistance 75 C Operating Temperature Fast Switching Repetitive Avalanche Allowed up to Tjmax AUTOMOTIVE MOSFET Description Specifically designed for Automotive applications, this HEXFET Power MOSFET utilizes the latest processing techniques to achieve extremely low onresistance per silicon area. Additional features of this design are a 75 C junction operating temperature, fast switching speed and improved repetitive avalanche rating. These features combine to make this design an extremely efficient and reliable device for use in Automotive applications and a wide variety of other applications. G TO-22AB IRFZ44VZ PD - 94755 HEXFET Power MOSFET D S D 2 Pak IRFZ44VZS IRFZ44VZ IRFZ44VZS IRFZ44VZL V DSS = 6V R DS(on) = 2mΩ I D = 57A TO-262 IRFZ44VZL Absolute Maximum Ratings I D @ T C = 25 C Parameter Continuous Drain Current, V GS @ V (Silicon Limited) Units I D @ T C = C Continuous Drain Current, V GS @ V 4 A I DM Pulsed Drain Current c 23 P D @T C = 25 C Power Dissipation 92 W Linear Derating Factor.6 W/ C V GS Gate-to-Source Voltage ± 2 V E AS (Thermally limited) Single Pulse Avalanche Energyd 73 mj E AS (Tested ) Single Pulse Avalanche Energy Tested Value h I AR Avalanche Currentc See Fig.2a, 2b, 5, 6 A E AR Repetitive Avalanche Energy g mj T J Operating Junction and -55 to + 75 T STG Storage Temperature Range C Soldering Temperature, for seconds 3 (.6mm from case ) lbfyin (.Nym) Mounting Torque, 6-32 or M3 screw i Thermal Resistance Parameter Typ. Max. Units R θjc Junction-to-Case.64 C/W R θcs Case-to-Sink, Flat Greased Surface i.5 R θja Junction-to-Ambient i 62 R θja Junction-to-Ambient (PCB Mount) j 4 www.irf.com Max. 57 8/25/3

IRFZ44VZS_L Electrical Characteristics @ T J = 25 C (unless otherwise specified) Parameter Min. Typ. Max. Units V (BR)DSS Drain-to-Source Breakdown Voltage 6 V Conditions V GS = V, I D = 25µA V (BR)DSS / T J Breakdown Voltage Temp. Coefficient.6 V/ C Reference to 25 C, I D = ma R DS(on) Static Drain-to-Source On-Resistance 9.6 2 mω V GS = V, I D = 34A e V GS(th) Gate Threshold Voltage 2. 4. V V DS = V GS, I D = 25µA gfs Forward Transconductance 25 V V DS = 25V, I D = 34A I DSS Drain-to-Source Leakage Current 2 µa V DS = 6V, V GS = V 25 V DS = 6V, V GS = V, T J = 25 C I GSS Gate-to-Source Forward Leakage 2 na V GS = 2V Gate-to-Source Reverse Leakage -2 V GS = -2V Q g Total Gate Charge 43 65 I D = 34A Q gs Gate-to-Source Charge nc V DS = 48V Q gd Gate-to-Drain ("Miller") Charge 8 V GS = V e t d(on) Turn-On Delay Time 4 V DD = 3V t r Rise Time 62 I D = 34A t d(off) Turn-Off Delay Time 35 ns R G = 2 Ω t f Fall Time 38 V GS = V e L D Internal Drain Inductance 4.5 Between lead, D nh 6mm (.25in.) L S Internal Source Inductance 7.5 from package G and center of die contact S C iss Input Capacitance 69 V GS = V C oss Output Capacitance 27 V DS = 25V C rss Reverse Transfer Capacitance 3 pf ƒ =.MHz C oss Output Capacitance 87 V GS = V, V DS =.V, ƒ =.MHz C oss Output Capacitance 26 V GS = V, V DS = 48V, ƒ =.MHz C oss eff. Effective Output Capacitance 5 V GS = V, V DS = V to 48V f Source-Drain Ratings and Characteristics Parameter Min. Typ. Max. Units Conditions I S Continuous Source Current 57 MOSFET symbol (Body Diode) A showing the I SM Pulsed Source Current 23 integral reverse (Body Diode)Ãc p-n junction diode. V SD Diode Forward Voltage.3 V T J = 25 C, I S = 34A, V GS = V e t rr Reverse Recovery Time 23 35 ns T J = 25 C, I F = 34A, V DD = 3V Q rr Reverse Recovery Charge 7 26 nc di/dt = A/µs e t on Forward Turn-On Time Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD) 2 www.irf.com

I D, Drain-to-Source Current (Α) I D, Drain-to-Source Current (A) I D, Drain-to-Source Current (A) IRFZ44VZS_L VGS TOP 5V V 8.V 7.V 6.V 5.5V 5.V BOTTOM 4.5V VGS TOP 5V V 8.V 7.V 6.V 5.5V 5.V BOTTOM 4.5V 4.5V 4.5V 6µs PULSE WIDTH Tj = 25 C. V DS, Drain-to-Source Voltage (V) 6µs PULSE WIDTH Tj = 75 C. V DS, Drain-to-Source Voltage (V) Fig. Typical Output Characteristics Fig 2. Typical Output Characteristics 6 T J = 75 C T J = 25 C V DS = 25V 6µs PULSE WIDTH 4. 5. 6. 7. 8. 9. V GS, Gate-to-Source Voltage (V) Gfs, Forward Transconductance (S) 5 4 3 2 T J = 75 C T J = 25 C V DS = 5V 38µs PULSE WIDTH 2 3 4 5 6 I D, Drain-to-Source Current (A) Fig 3. Typical Transfer Characteristics Fig 4. Typical Forward Transconductance Vs. Drain Current www.irf.com 3

I D, Drain-to-Source Current (A) C, Capacitance (pf) V GS, Gate-to-Source Voltage (V) IRFZ44VZS_L 3 25 2 V GS = V, f = MHZ C iss = C gs + C gd, C ds SHORTED C rss = C gd C oss = C ds + C gd Ciss 2 6 2 I D = 34A V DS = 48V VDS= 3V VDS= 2V 5 8 5 Coss Crss V DS, Drain-to-Source Voltage (V) 4 FOR TEST CIRCUIT SEE FIGURE 3 2 3 4 5 6 Q G Total Gate Charge (nc) Fig 5. Typical Capacitance Vs. Drain-to-Source Voltage Fig 6. Typical Gate Charge Vs. Gate-to-Source Voltage. OPERATION IN THIS AREA LIMITED BY R DS (on) I SD, Reverse Drain Current (A). T J = 75 C. T. J = 25 C V GS = V..2.6..4.8 V SD, Source-toDrain Voltage (V). Tc = 25 C Tj = 75 C Single Pulse µsec msec msec V DS, Drain-toSource Voltage (V) Fig 7. Typical Source-Drain Diode Forward Voltage Fig 8. Maximum Safe Operating Area 4 www.irf.com

I D, Drain Current (A) R DS(on), Drain-to-Source On Resistance (Normalized) IRFZ44VZS_L 6 5 4 2.5 2. I D = 34A V GS = V 3.5 2. 25 5 75 25 5 75 T J, Junction Temperature ( C).5-6 -4-2 2 4 6 8 2 4 6 8 T J, Junction Temperature ( C) Fig 9. Maximum Drain Current Vs. Case Temperature Fig. Normalized On-Resistance Vs. Temperature D =.5 Thermal Response ( Z thjc )....2..5.2. SINGLE PULSE ( THERMAL RESPONSE ) R R 2 R R 2 τ J τ J τ τ τ 2 τ 2 Ci= τi/ri Ci i/ri E-6 E-5.... t, Rectangular Pulse Duration (sec) Notes:. Duty Factor D = t/t2 2. Peak Tj = P dm x Zthjc + Tc Fig. Maximum Effective Transient Thermal Impedance, Junction-to-Case Ri ( C/W) τi (sec).96.44.68.585 www.irf.com 5 τ C τ

V GS(th) Gate threshold Voltage (V) E AS, Single Pulse Avalanche Energy (mj) IRFZ44VZS_L V DS L 5V DRIVER 3 25 I D TOP 3.8A 5.A BOTTOM 34A 2 R G 2V V GS tp D.U.T I AS.Ω + - V DD A 5 Fig 2a. Unclamped Inductive Test Circuit tp V (BR)DSS 5 25 5 75 25 5 75 Starting T J, Junction Temperature ( C) I AS Fig 2b. Unclamped Inductive Waveforms Q G Fig 2c. Maximum Avalanche Energy Vs. Drain Current V Q GS Q GD 4. V G Charge Fig 3a. Basic Gate Charge Waveform 3. I D = 25µA 2. K DUT L VCC. -75-5 -25 25 5 75 25 5 75 T J, Temperature ( C ) Fig 3b. Gate Charge Test Circuit Fig 4. Threshold Voltage Vs. Temperature 6 www.irf.com

E AR, Avalanche Energy (mj) Avalanche Current (A) IRFZ44VZS_L Duty Cycle = Single Pulse..5. Allowed avalanche Current vs avalanche pulsewidth, tav assuming Tj = 25 C due to avalanche losses. Note: In no case should Tj be allowed to exceed Tjmax..E-6.E-5.E-4.E-3.E-2.E- tav (sec) Fig 5. Typical Avalanche Current Vs.Pulsewidth 8 6 4 2 TOP Single Pulse BOTTOM % Duty Cycle I D = 34A 25 5 75 25 5 75 Starting T J, Junction Temperature ( C) Notes on Repetitive Avalanche Curves, Figures 5, 6: (For further info, see AN-5 at www.irf.com). Avalanche failures assumption: Purely a thermal phenomenon and failure occurs at a temperature far in excess of T jmax. This is validated for every part type. 2. Safe operation in Avalanche is allowed as long ast jmax is not exceeded. 3. Equation below based on circuit and waveforms shown in Figures 2a, 2b. 4. P D (ave) = Average power dissipation per single avalanche pulse. 5. BV = Rated breakdown voltage (.3 factor accounts for voltage increase during avalanche). 6. I av = Allowable avalanche current. 7. T = Allowable rise in junction temperature, not to exceed T jmax (assumed as 25 C in Figure 5, 6). t av = Average time in avalanche. D = Duty cycle in avalanche = t av f Z thjc (D, t av ) = Transient thermal resistance, see figure ) P D (ave) = /2 (.3 BV I av ) = DT/ Z thjc Fig 6. Maximum Avalanche Energy I av = 2DT/ [.3 BV Z th ] Vs. Temperature E AS (AR) = P D (ave) t av www.irf.com 7

IRFZ44VZS_L + - D.U.T + ƒ - Circuit Layout Considerations Low Stray Inductance Ground Plane Low Leakage Inductance Current Transformer - + Reverse Recovery Current Driver Gate Drive Period P.W. D.U.T. I SD Waveform Body Diode Forward Current di/dt D.U.T. V DS Waveform Diode Recovery dv/dt D = P.W. Period V GS =V V DD * R G dv/dt controlled by RG Driver same type as D.U.T. I SD controlled by Duty Factor "D" D.U.T. - Device Under Test V DD + - Re-Applied Voltage Inductor Curent Body Diode Forward Drop Ripple 5% I SD * V GS = 5V for Logic Level Devices Fig 7. Peak Diode Recovery dv/dt Test Circuit for N-Channel HEXFET Power MOSFETs V DS R D R G V GS D.U.T. + - V DD V Pulse Width µs Duty Factor. % Fig 8a. Switching Time Test Circuit V DS 9% % V GS t d(on) t r t d(off) t f Fig 8b. Switching Time Waveforms 8 www.irf.com

IRFZ44VZS_L TO-22AB Package Outline Dimensions are shown in millimeters (inches) 2.87 (.3) 2.62 (.3).54 (.45).29 (.45) 3.78 (.49) 3.54 (.39) - A - 4.69 (.85) 4.2 (.65) - B -.32 (.52).22 (.48) 5.24 (.6) 4.84 (.584) 4 6.47 (.255) 6. (.24) 2 3.5 (.45) MIN LEAD ASSIGNMENTS - GATE 2 - DRAIN 3 - SOURCE 4 - DRAIN 4.9 (.555) 3.47 (.53) 4.6 (.6) 3.55 (.4) 3X.4 (.55).5 (.45) 3X.93 (.37).69 (.27).36 (.4) M B A M 3X 2.92 (.5) 2.64 (.4).55 (.22).46 (.8) 2.54 (.) 2X NOTES: DIMENSIONING & TOLERANCING PER ANSI Y4.5M, 982. 3 OUTLINE CONFORMS TO JEDEC OUTLINE TO-22AB. 2 CONTROLLING DIMENSION : INCH 4 HEATSINK & LEAD MEASUREMENTS DO NOT INCLUDE BURRS. TO-22AB Part Marking Information EXAMPLE: THIS IS AN IRF LOT CODE 789 ASSEMBLED ON WW 9, 997 IN THE ASSEMBLY LINE "C" INTERNATIONAL RECTIFIER LOGO ASSEMBLY LOT CODE PART NUMBER DATE CODE YEAR 7 = 997 WEEK 9 LINE C For GB Production EXAMPLE: THIS IS AN IRF LOT CODE 789 ASSEMBLED ON WW 9, 997 IN THE ASSEMBLY LINE "C" INTERNATIONAL RECTIFIER LOGO PART NUMBER LOT CODE DATE CODE www.irf.com 9

IRFZ44VZS_L D 2 Pak Package Outline Dimensions are shown in millimeters (inches) D 2 Pak Part Marking Information THIS IS AN IRF53S WITH LOT CODE 824 ASSEMBLED ON WW 2, 2 IN THE ASSEMBLY LINE "L" For GB Production THIS IS AN IRF53S WITH LOT CODE 824 ASSEMBLED ON WW 2, 2 IN THE ASSEMBLY LINE "L" INTERNATIONAL RECTIFIER LOGO ASSEMBLY LOT CODE INTERNATIONAL RECTIFIER LOGO F53S F53S PART NUMBER DATE CODE YEAR = 2 WEEK 2 LINE L PART NUMBER LOT CODE DATE CODE www.irf.com

IRFZ44VZS_L TO-262 Package Outline Dimensions are shown in millimeters (inches) IGBT - GATE 2- COLLEC- TOR TO-262 Part Marking Information EXAMPLE: THIS IS AN IRL33L LOT CODE 789 INTERNATIONAL ASSEMBLED ON WW 9, 997 RECTIFIER IN THE ASSEMBLY LINE "C" LOGO ASSEMBLY LOT CODE PART NUMBER DATE CODE YEAR 7 = 997 WEEK 9 LINE C www.irf.com

IRFZ44VZS_L D 2 Pak Tape & Reel Information TRR.6 (.63).5 (.59) 4. (.6) 3.9 (.53).6 (.63).5 (.59).368 (.45).342 (.35) FEED DIRECTION TRL.85 (.73).65 (.65).9 (.429).7 (.42).6 (.457).4 (.449) 6. (.634) 5.9 (.626).75 (.69).25 (.49) 5.42 (.69) 5.22 (.6) 24.3 (.957) 23.9 (.94) 4.72 (.36) 4.52 (.78) FEED DIRECTION 3.5 (.532) 2.8 (.54) 27.4 (.79) 23.9 (.94) 4 33. (4.73) MAX. 6. (2.362) MIN. NOTES :. COMFORMS TO EIA-48. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION MEASURED @ HUB. 4. INCLUDES FLANGE DISTORTION @ OUTER EDGE. 26.4 (.39) 24.4 (.96) 3 3.4 (.97) MAX. 4 Notes: Repetitive rating; pulse width limited by max. junction temperature. (See fig. ). Limited by T Jmax, starting T J = 25 C, L =.2mH R G = 25Ω, I AS = 34A, V GS =V. Part not recommended for use above this value. ƒ Pulse width.ms; duty cycle 2%. C oss eff. is a fixed capacitance that gives the same charging time as C oss while V DS is rising from to 8% V DSS. TO-22AB package is not recommended for Surface Mount Application. Limited by T Jmax, see Fig.2a, 2b, 5, 6 for typical repetitive avalanche performance. This value determined from sample failure population. % tested to this value in production. This is only applied to TO-22AB pakcage. ˆ This is applied to D 2 Pak, when mounted on " square PCB (FR- 4 or G- Material). For recommended footprint and soldering techniques refer to application note #AN-994. Data and specifications subject to change without notice. This product has been designed and qualified for the Automotive [Q]market. Qualification Standards can be found on IR s Web site. IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 9245, USA Tel: (3) 252-75 TAC Fax: (3) 252-793 Visit us at www.irf.com for sales contact information. 8/3 2 www.irf.com

Note: For the most current drawings please refer to the IR website at: http://www.irf.com/package/