Specificats and Applicats Infrmat 06/22/09 Prelimary Smart Fr rce LED Driver The ERG Smart Frce Series f LED Drivers are specifically designed fr applicats which require high efficiency, wide dimmg and LCD brightness stability ver a wide put vltage range. The SFDCB3937F is designed t prvide backlight pwer fr the ERG SFR3946HF. Designed, manufactured and supprted with the USA, the SFDC features: Cnnectr Mlex 3261-0871 J1-1 (+) J1-2 (+) J1-3 J1-4 J1- J1-6 (+) J1-7 Cntrl J1-8 Wide put vltage range Cnstant LED current High efficiency External r Internal dimmg High dimmg rati Seperate enable and dimmg funct Sft start One year warranty Cnnectrs Output Cnnectr J2-1 Cathde 1 J2-2 Ande 1 J2-3 Cathde 2 J2-4 Ande 2 Mlex 3261-0471.61 [142,] Package Cnfigurat.310 [134,87].14 [3,6] Mass: 40 grams 1.10 [27,9] 1 1 Height: < 12mm.830 [21,08] Output.12 [3,18] Dia. (4x) 2.10 [3,47].14 [3,6] PCB cmpnents are shwn fr reference nly. Actual prduct may differ frm that shwn. page 1 f.
Abslute Maximum Ratgs Ratg Symbl Value Strage Vltage Range Temperature V -0.3 t +20. 0 T -40 t +8 C stg Cntrl Vltage Vltage Operatg Characteristics V Cntrl V 0 t.0 0 t Unless therwise nted = 12.00 Vlts dc and Ta = 2 C. Characteristic Symbl M Typ Max Vltage V + 10. 0 + 12. 0 + 20. 0 Cmpnent Surface ( Nte 1) T -20 - + 80 C Temperature s Current I 0.89 1.0 1.21 Adc Operatg Frequency F 1 60 69 khz LED Strg Vltage V ED Efficiency L. 0 3-4. ( Nte 2) h - 78 - % Output P Current (per strg) (Nte 3) I ut 123. 130. 0 136. marms Turn-n Threshld V thn - - 1. Turn-ff Threshld V thff 1.2 - - Cntrl P Impedance R -. 0 - kohms Full-n Threshld V - 0. 9 - fn Full-ff Threshld V fff - 4. 2 - Specificats subject t change withut ntice. Nte 1 Nte 2 Nte 3 Surface temperature must nt exceed 80 C; thermal management acts may be required. Efficiency is calculated usg a 37.7V LED strg. The put vltage t the driver must be with its peratg characteristic befre the driver is enabled, therwise the driver may nt start r may shut dwn unexpectedly. page 2 f.
Onbard PWM Unless therwise nted = 12.00 Vlts DC, Ta = 2 C and unit has been runng fr mutes. Characteristic Symbl M Typ Max Frequency f pwm - 160 - H Z Cntrl Bias Current I cbias - - 10 ua Applicat Infrmat The ERG SFDCB3937F has been designed t be cnfigured multiple ways: NO DIMMING OPERATION: The SFD driver can be cnfigured t perate withut dimmg by flatg the Cntrl P (J1-7), and the P (J1-). Ps 1 and 2 f cnnectr J1 must be cnnected t +, between 10 and 20. Ps 3 and 4 f cnnectr J1 must be cnnected t. ONBOARD PWM DIMMING OPERATION: Onbard PWM cnfigurat as shwn Figure 1 allws the user t cntrl display brightness by cntrllg the nbard PWM generatr. The user is respnsible t prvide an analg cntrl signal. A dimmg rati up t 1000:1 is pssible with this cnfigurat. DIMMING: Dimmg is accmplished by applyg an analg vltage t the Cntrl P (J1-7). Display brightness is mdulated by cntrllg the Cntrl P vltage as shwn Graph 1. ENABLE/DISABLE: The driver may be enabled r disabled (turned n and ff) by applyg a DC vltage t the P(J1-). P n and ff levels are specified the Operatg Characteristics sect f the data sheet. The driver can als be enabled by flatg the P. Ps 1 and 2 f cnnectr J1 must be cnnected t +, between 10 and 20. Ps 3 and 4 f cnnectr J1 must be cnnected t. EXTERNAL PWM DIMMING OPERATION: External PWM cnfigurat as shwn Figure 2 allws the user t cntrl display brightness with an externally generated PWM signal. The user is respnsible t prvide the PWM signal. A dimmg rati up t 20000:1 is pssible with this cnfigurat. DIMMING: Dimmg is accmplished by applyg a PWM signal t the P (J1-). PWM n and ff levels are specified the Operatg Characteristics sect f the data sheet. Display brightness is mdulated by cntrllg the PWM duty cycle as shwn Graph 2. ENABLE/DISABLE: The driver may be enabled r disabled (turned n and ff) by applyg a DC vltage t the Cntrl P (J1-7). Cntrl P n and ff levels are specified the Operatg Characteristics sect f the data sheet. The driver can als be enabled by flatg the Cntrl p. Ps 1 and 2 f cnnectr J1 must be cnnected t +, between 10 and 20. Ps 3 and 4 f cnnectr J1 must be cnnected t. page 3 f.
ONBOARD PWM DIMMING SFDCB3937F Graph 1 J1 J2 +12V 1,2 Optal Ptentimeter 3,4 Ande 1 6 Cathde 1 Analg Dimmg Vltage (0 t V) 7 8 Cntrl Ande 2 Cathde 2 +On -Off Figure 1 page 4 f.
EXTERNAL PWM DIMMING SFDCB3937F Graph 2 +12V 1,2 3,4 Ande 1 6 Cathde 1 On/Off Cntrl 0V On, V Off (r flat p t always enable) J1 7 Cntrl Ande 2 J2 V 0V Duty Cycle 0% - 100% 8 Cathde 2 Figure 2 REG UL Endictt Research Grup, ISO 9001 IRM ISTERED F A3313 Inc. Endictt Research Grup, Inc. (ERG) reserves the right t make changes circuit design and/r specificats at any time withut ntice. Accrdgly, the reader is cauted t verify that data sheets are current befre placg rders. Infrmat furnished by ERG is believed t be accurate and reliable. Hwever, n respnsibility is assumed by ERG fr its use. page f.