Sesors & rasducers, ol. 4, Special Issue, August 013, pp. 7-18 Sesors & rasducers 013 by IFSA http://www.sesorsportal.com ersatile Sigal Acquisitio System for Ultrasoud Equipmet Frequecy Domai Parameters Estimatio Lias SILAIIS, ytautas DUMBRAA, Adrius CHAZIACHMEOAS Sigal Processig Departmet, Kauas Uiversity of echology, Studetu str. 50-340, Kauas, L-51368, Lithuaia el.: +370-37-30053 E-mail: lias.svilaiis@ktu.lt Received: 15 May 013 /Accepted: 16 August 013 /Published: 30 August 013 Abstract: ersatile system for ultrasoud equipmet parameters measuremet is preseted. he system is based o sigle direct digital sythesis (DDS) geerator which is used for excitatio ad dual simultaeous samplig aalog-to-digit (ADC) coversio chaels. System is dedicated for ultrasoud equipmet frequecy domai parameters measuremet: trasductio AC respose, isertio loss AC respose, harmoic distortio, oise ad electrical impedace ca be estimated. Sice primary applicatio of the system is the ultrasoic equipmet performace evaluatio, operatig frequecies rage correspods to most commo ultrasoud frequecies. Frequecy rage 0 khz to 30 MHz was targeted. Despite beig aimed for parameters compariso ad estimatio, system is uiversal: several measuremets ca be arraged usig oe excitatio ad two receptio chaels. System structure ad setups for the aforemetioed measuremets are preseted. Modular PC104 form-factor costructio allows operatig the system i both local ad remote PC coectivity mode. Setup for most commo tasks ad examples of measuremet results obtaied are preseted. Copyright 013 IFSA. Keywords: Acquisitio system, Gai AC respose, Ultrasoud trasmissio measuremet, oise measuremet, Sie wave correlatio, Impedace measuremet, Distortio measuremet, Power delivery efficiecy. 1. Itroductio here is a eed for ultrasoic equipmet parameters estimatio, verificatio or compariso [1], while desigig or settig the ultrasoic system for experimet. Usually the variatio i frequecy domai is oe of the essetial parameters beig ivestigated []. Sometimes just sigle frequecy gai value is eough, but there is a eed to adjust that frequecy value. Parameters that are most frequetly evaluated [3] are gai or trasmissio AC respose, impedace, sigal distortio ad oise. Several ew parameters ca be rectified: iput referred oise ca be obtaied from output oise ad gai AC respose values [4]; oise figure [5]; power delivery to load efficiecy [6] ad expected oise level [7] ca be obtaied from measured ultrasoic trasducer impedace. It is useful to have the frequecy domai parameters moitorig of the device durig the desig process iteratios or while i service. herefore we idicate the eed for versatile measuremet system [1], capable to perform the most commo measuremet tasks: vector voltage, impedace, oise power spectral desity, trasmissio. We put the versatility of the system i Article umber P_SI_46 7
Sesors & rasducers, ol. 4, Special Issue, August 013, pp. 7-18 frot of accuracy ad reliability of measuremets. Ultrasoic equipmet AC parameter evaluatio is aimed. herefore frequecy rage was defied by the target: 0 khz to 30 MHz. System should be able to measure the complex trasmissio AC respose, sigal distortio, oise ad impedace of the device uder test (DU). Measuremets should be collectable o host PC for further processig ad storage. hree approaches are available here: i) Collect a set of bech top equipmet: etwork aalyzer, spectrum aalyzer, impedace aalyzer, digital storage oscilloscope; ii) Use a commercially available data acquisitio system ad desig additioal modules for impedace measuremet, high impedace iput; iii) Build a dedicated system, capable of all the aforemetioed tasks. hough i) approach seems most simple ad essetial it requires large ivestmet ad take sigificat place o a bech. Approach iii) is ot attractive sice sigificat effort ad expertise has to be put to make sure o parts are missed. Approach ii) seems the easiest oe. Such systems ca be divided ito parts: small, iexpesive uits with USB coectivity to local host or XI bus architecture or other stadard bus modular systems [8]. While modular systems are attractive (they ca be operated both remote or locally) they are expesive ad also have large footprit. We decided to use the mixture of ii) ad iii): we build a modular system with possibility for expasio, flexibility of cotrol host locatio ad advatage of small size. Istead of usig a commercially available system, we desiged our ow system, based o PC104 size ad bus. Requiremets for ADC ad DDS blocks were rectified first. Brief presetatio of material was give i [1]. Here we preset the expaded versio of research: details o device desig ad the system applicatio examples.. oltage ector Estimatio Usig Sie Wave Correlatio We assume that the frequecy respose at certai frequecy is determied by probig the system iput with a sigle frequecy cotiuous wave (CW) sigal while measurig the iput/output amplitude ratio ad phase differece. By experiece we kow that electromagetic iterferece or other sources o oise may exist i measured system due to several reasos: sesitivity usually is high; measured objects sometimes are take out of their correspodig shieldig; out-of-bad trasmissio is sometimes required; material atteuatio ca be high etc. he, presece of the oise turs the amplitude ad phase estimatio ito more difficult task. arrowbad filterig ca address the problem. It is iterestig to poit out that several advatages are obtaied if filterig is doe i software: stability of filter parameter, ability to cotrol phase respose, reduced demads for dyamic rage of the acquisitio chael. Several techiques for vector voltage estimatio exist: sie fittig usig the least squares error techiques [9], Fourier trasform, iterpolated discrete Fourier trasform, short-time Fourier rasform [10-1] or wavelet trasform [13] are used for parameter estimatio. hese techiques are used if the sie frequecy is ot kow or the samplig frequecy value is ot as accurate as would be expected. he amplitude ad phase measuremet ca be greatly simplified if excitatio frequecy is kow: oly amplitude ad phase estimatio is eeded the. We suggest the sie wave correlatio (SWC) to extract the sigal amplitude ad phase from the acquired data set [14]. he use of siefittig techiques ca largely reduce the ifluece of a oise i fial results [9]. If we use the same referece frequecy for DDS used to geerate the excitig sigal ad the acquisitio ADC, the more simple form of sie-fittig ca be used. he the wave to be fit is defied as: v t I cos ft Q sift 0, (1) where I ad Q are the i-quadrature amplitudes of the sie wave, 0 is the DC compoet ad f is the excitatio frequecy used. Fittig this fuctio to the set of samples, s 1 s, acquired at a frequecy f s at time istaces t 1 t, is accomplished by seekig the miimum of approximatio error root-mea-square (RMS) value: RMS s I cosft Q si ft 0 1 1 () he procedure is simple ad iterative, thus cosumig a lot of a computatioal time. he other approach could be to use a o-iterative procedure: closer look at the operatios performed idicate the similarity of the operatios performed to a correlatio procedure, iheret i the Fourier trasform. herefore the procedure ca be preseted i a simplified way which is more computatioal efficiet: as correlatio coefficiet of sie ad cosie with sampled versio of s widowed by some widow w ad ormalized by L1 orm W 1 of the widow: I f Q f 1 0 cos ft 1 0 W 1 si ft W s w 1, s w, (3) 8
Sesors & rasducers, ol. 4, Special Issue, August 013, pp. 7-18 0 f 1 s 0 he magitude ad phase of the measured sigal is estimated as: m f f f I Q Q f f arcta f I,.. (4) Frequecy mismatch iduced errors reductio ca be obtaied. If additive white Gaussia oise (AWG) with amplitude RMS is preset over first yquist zoe f at samplig frequecy f s the correspodig oise voltage desity is [14] SD RMS RMS. (5) f fs Applicatio of SWC o sigal array of legth will produce frequecy bi f s / wide. he stadard deviatio ( m ) of the amplitude estimated usig (3) ad (4) will be [14]. RMS m. (6) he ADC quatizatio errors ca be accouted usig ADC full scale voltage FS ad quatizatio bits umber K: FS ADCRMS K. (7) 1 he for 10 bit ADC it will correspod to 40 /Hz compared to 1.4 /Hz Johso oise voltage desity of 50 source [1]. With all oise sources accouted (6) yields 50 expaded ucertaity [1]. Experimets carried out with the developed system idicated 78 stadard deviatio. 3. System Structure o esure system uiversality, system parameters have to be chose to match the measuremet tasks plaed [1]. System (Fig. 1) is composed from cotrol part (both local ad remote PC ca be used), excitatio sigal geerator ad the sigals acquisitio uits. Modular costructio has bee chose. Idustrial stadard PC104 is used as form factors ad bus. he excitatio chael ad the receivig chaels are coected to the device uder test (DU) via alterative modules accordig to the measuremet task. I case of remote host, coectivity ad cotrol is accomplished by separate PCB i a stack, usig the Cypress Semicoductor Corporatio s EZ- USB FXLP IC CY7C68013A. It is a highly itegrated, low-power USB.0 microcotroller, icorporatig the USB.0 trasceiver, serial iterface egie, local semaphore microcotroller ad a programmable peripheral iterface (GPIF). he GPIF is programmed as a to the PC104 bus. Module alteratives DDS Excitatio Gout D.U.. Ch1 Ch ADC ADC Acquisitio Host alteratives Auto balacig Excitatio Syc. Acquisitio Local Modular PC Remote source High Z i preamp PC104 bus GPIF USB core & cotrol Host PC Fig. 1. Acquisitio system structure. 4. Sychroizatio Bus Structure System is usig the direct-digital-sythesis (DDS) based excitatio sigal geerator ad two simultaeous 10 bit aalog-to-digit coverters (ADC) for resultig waveforms collectio. he clock frequecy of the excitatio ad receptio chaels has to be derived from the same clock source i order to allow the SWC use. Acquisitio timig is implemeted for case whe several (more tha two) ADC chaels are required, or dedicated arbitrary waveform geerator is used for applicatios demadig short dwell time. Full sychroizatio structure is preseted i Fig.. Acquisitio timig is accomplished by 5 MHz system clock, which is derived from mai 100 MHz 9
Sesors & rasducers, ol. 4, Special Issue, August 013, pp. 7-18 100 ppm 5 ps jitter clock. Acquisitio is triggered by St/Sp sigal. he DDS geerator is derivig its clock by multiplicatio of the system clock by 6. 5. Excitatio Chael Structure he excitatio chael cosists of three major compoets: DDS geerator, implemeted as AD9851 from Aalog Devices [15], gai block based o AD8055 ad output atteuator (Fig. 3). he phase accumulator performs a itegratio fuctio ad geerates a liear phase ramp i proportio to the desired frequecy. he sie lookup table coverts the liear phase ramp ito a sie wave. Eve though the AD9851 cotais a 3 bit frequecy cotrol register, a 3 bit (3 memory bits) lookup table is ot required, as it oly has a 10 bit DAC [15]. he output sigal after filterig ad amplificatio ca be atteuated by smooth atteuator ad two stages of 0 db step atteuators coected i series. he DDS cotrol is accomplished by PC from PC104 bus accessible via M4A3-64/3 CPLD from USB iterface or by local host PC i PC104 form factor. 6. Receptio Chaels Structure he other most importat uit is the receivig chael (Fig. 4). It cosists of the optioal blocks (high impedace preamplifier, impedace measuremet frot-ed or iput atteuator) ad the two chaels ADC. he high speed dual chael data acquisitio cosists of the two high speeds ADCs AD914. he AD914 is a low power 10 bit moolithic samplig ADC with a o-chip trackad-hold ad referece circuits. It is operated at 100 MS/s coversio rate. System clock, 5MHz o DDS o ADC DDS clock multiplier, x6 Clock divider :=1..4 100MHz Referece clock, 100MHz PC104 bus Clock divider :4 5MHz PC104 ad cotrol C Q St/Sp D o expasio boards Fig.. Sychroizatio bus structure. DDS cotrol DDS Recostructio filter Amplifier Atteuators block PC 104 bus DDS referece clock Fig. 3. Excitatio chael structure. Ch1 i Ch i Differetial amplifier Differetial amplifier Ati-aliasig filter Ati-aliasig filter ADC ADC SRAM ad cotrol Cotrol state machie SRAM ad cotrol GPIF GPIF PC104 bus Fig. 4. Receptio chael structure. o sustai the 100 MS/s data trasfer rate the ADC coversio result is streamed to the high speed buffer SRAM IS61L5616 from Itegrated Silico Solutio, Ic. he ISSI IS61L5616 is a highspeed (address access time is 8 s), low power, 4 Mbit static RAM orgaized as 56 k words by 16 bits. All the itermediate latchig, sychroizatio ad cotrol of the fast 100 MHz clock frequecy acquisitio state machie is orgaized by M4A3-18/64 C-7 CPLDs. he CPLD also performs the PC104 fuctios. he rest of cotrol is also accomplished via a local PC104 form-factor host computer or by usig the GPIF delivered via USB iterface. 10
Sesors & rasducers, ol. 4, Special Issue, August 013, pp. 7-18 7. Applicatio Examples Acquisitio module PC-104 stack photo is preseted i Fig. 5. he top PCB is the excitatio DDS with optioal RMS detector chael. Middle PCB is the dual chael ADC card. he bottom card is the USB iterface ad PC104 board. Impedace measuremet module, icorporatig the auto balacig (ABB) circuitry is visible i the lower right corer. gai AC respose of ultrasoic preamplifier is preseted i Fig. 6 a. Ultrasoud trasmissio i liquids was ivestigated i similar way (Fig. 7). wo widebad trasducers F5C6 from Guagzhou Doppler Electroic echologies were used. rasducers were placed o opposite eds of 8 mm diameter ad 85 mm log measuremet chael filled with liquid. Water ad ethaol were used for ivestigatio. Harmoic CW excitatio sigal was applied o trasmittig trasducer. Same sigal was routed back to ADC iput 1. he opposite trasducer s output was supplied to ADC iput. his way both excitatio ad receptio voltage was recorded. he trasmissio respose was obtaied usig (3) ad (8). Obtaied magitude respose is preseted i Fig. 6 b. Fig. 5. Acquisitio system setup example for impedace measuremet. It ca be expected that the DDS output voltage is stable over the desiged frequecy rage. But due to phase roudig iheret to the DDS output, the sigal has a slight variatio i amplitude related to the output frequecy. his is oly the case at frequecies close to the half of the referece clock (100 MHz). Also the cables ad output impedace itroduce the discrepacies i the output amplitude at mismatched loads. hese ca be accouted as system isertio losses ad stored i a computer memory as compesatio coefficiet. arious measuremet tasks ca be performed usig the system developed. 7.1. Ultrasoud rasmissio Evaluatio he frequecy respose of device uder test (DU) at certai frequecy ca be determied by probig the system iput with a sigle frequecy sie sigal while measurig the iput ad the output sigal voltages ui(f) ad uout(f) the preamplifier respose is give by: G f uout f k f, ui f (8) where k(f) is used for cables ad output impedace ifluece compesatio. All the measuremets preseted below did ot use this compesatio. he Fig. 6. rasmissio AC respose for: a) ultrasoic preamplifier ad b) ultrasoud trasmissio i liquids. Ivestigatio idicates that atteuatio i ethaol is up to 30 db higher tha i water. he AC respose ripple was produced by CW sigal iterferece i measuremet chael. Measuremet results were used to predict the sigal trasmissio level i ultrasoic trasit time flow meter desig. Such measuremet useful i the ultrasoic trasducer desig phase: chages i trasmissio ca be moitored for couplig layers or backig ifluece. 11
Sesors & rasducers, ol. 4, Special Issue, August 013, pp. 7-18 rasmittig trasducer Pipe Receivig trasducer CW output rasmissio liquid ADC iput 1 Uiversal acquisitio system ADC iput USB PC Fig. 7. rasmissio AC respose measuremet a) setup ad b) chamber photo. 7.. Sigal Distortio Measuremet I case of oliear or parametric circuit presece ew frequecy compoets appear at the DU output. otal Harmoic Distortio (HD) is a most commo measure of a amplifier distortios specificatio [16]. It compares the power of harmoics to k with the total sigal power: K k k HD 10 log 10 K, (9) k k1 Widebad ultrasoic preamplifier output sigal harmoic distortio was aalyzed. Aalysis was carried out usig the Agilet 930A spectrum aalyzer (resolutio badwidth 3 khz) ad the desiged acquisitio system. CW 1MHz sigal from acquisitio system was supplied to preamplifier iput. Gai of preamplifier was set to 45 db. Amplifier output was recorded 100 times usig 100 MHz samplig ad 3 k samples record legth. I order to compare the widowig performace, rectagular widow (o widow), Hammig widow ad trucatio was used o acquired data. Every record obtaied was coverted to frequecy domai usig FF. he results were coverted to power spectrum, averaged power-wise ad coverted to RMS value. Same data was used to obtai harmoics amplitudes usig SWC ad coverted to RMS (Fig. 8). Fig. 8. Harmoics distortio measuremet results: a) 6 harmoics spa ad b) zoomed first harmoic. It ca be see that the trucated versio has the best performace i spectrum estimatio. Ufortuately, all FF-based techiques have tha spectrum aalyzer higher oise floor due to 10 bits ADC approximately. μ. Spectrum aalyzer data was approximated to fit ito limited umber of poits per frequecy rage, therefore spectral accuracy was lost. It was possible to obtai similar to SWC results o spectrum aalyzer, but oly at sigificat zoom. SWC data was used to obtai the total harmoic distortio: DH = -49 db was obtaied with rectagular widow ad -50 db with trucatio. 7.3. Ultrasoic rasducer Impedace Measuremet he circuit impedace is a importat parameter characterizig the electroic circuits, compoets, ad the materials. o fid the impedace, oe eeds to measure at least two values because of its complexity. Moder impedace measurig istrumets measure the real ad the imagiary parts 1
Sesors & rasducers, ol. 4, Special Issue, August 013, pp. 7-18 of a impedace vector ad the covert them ito the desired parameters [17]. A variety of measuremet methods for impedace measuremet exists [17]. System is usig the auto-balacig (ABB) techique for impedace measuremet. he measured impedace Z x ca be calculated usig Ohm s law from the voltage ad curret values. he ABB techique employs the ivertig topology operatioal amplifier (Fig. 9). R ref H ode L ode Z x ~ A 1 Ch Ch1 Fig. 9. Acquisitio system setup example for impedace measuremet. he curret flowig through Z x is mirrored by the resistor R ref curret. he potetial at the operatioal amplifier ivertig pi is maitaied at zero (sometimes called a virtual groud ). he the output voltage (measured by ADC Ch1, Ch1 ) of the operatioal amplifier is i direct proportio to the curret flowig i Z x. he Z x ca be obtaied as: Z x Zx, (10) I Zx Ch Rref Ch1 Results of ultrasoic trasducer impedace measuremets carried out usig our system ad precisio impedace aalyzer 6510B from Waye Kerr Electroics [18] are preseted i Fig. 10. Fig. 10 results idicate that system has acceptable performace i impedace evaluatio. haks to high SR obtaied system allows to carry out majority of impedace measuremets without the chage of the referece resistor R ref. All the results preseted have bee obtaied usig k referece resistor. A true value is the value of a ideally packaged circuit compoet. he effective value takes ito cosideratio the effects of a compoet s parasitic. he idicated value is the value obtaied with the measuremet istrumet. It icludes the istrumet s iheret losses ad iaccuracies. Idicated values always cotai errors whe compared to true or effective values. hey deped o a multitude of cosideratios. By comparig how close the idicated value agrees with the effective value allow to asses the measuremet quality. I other words, the goal of measuremet is to have the idicated value to be as close as possible to the effective value. he implemetatio of the remote measuremets requires the coectios for sigal routig [19]. Fig. 10. Ultrasoic trasducer measuremet results: a) impedace magitude ad b) imagiary part. he imperfectess of the measuremet circuit is compesated usig the software compesatio by applicatio of the additioal Ope/Short/Load measuremet results [0]: Z DU std Zo Z stdm Z xm Z s Z Z Z Z Z, (11) stdm where Z xm is the measured DU impedace; Z s ad Z o are the measured impedace values whe routig coectios are shorted ad ope accordigly; Z stdm ad Z std are the measured ad theoretical impedace values of some stadard device with a kow impedace value. alues are stored i computer memory ad later used for succeedig measuremets compesatio. Examples of ultrasoic actuator impedace moitorig applicatio are preseted i Fig. 11. Here, impedace chage with actuator load ad excitatio sigal value is preseted. I first example, the ultrasoic actuator dedicated for micro-motor applicatio was examied uder differet load coditios: i) o couplig to rotatio shaft ad ii) couplig to rotatio shaft. Experimetal results of complex impedace measuremet are s o xm 13
Sesors & rasducers, ol. 4, Special Issue, August 013, pp. 7-18 preseted i Fig. 11 a. Aother example presets the ifluece of the differet excitatio voltage levels i obtaied impedace. Excitatio geerator voltages of 40 ad 4 were applied. Experimetal results of complex impedace measuremet are preseted i Fig. 11 b. Example of air coupled trasducer evaluatio for matchig circuit ifluece is preseted i Fig. 1. Umatched trasducer was ot able to efficietly operate at 900 khz. After applicatio of iductor imagiary part of the impedace at 900 khz frequecy was reduced. wo circuits were used: with iductor coected i series ad iductor coected i parallel to trasducer cotacts. Parallel compesatig iductor value L par ca be calculated usig measured trasducer impedace Z : X R par par L par X par s, Im Z Re Z s Im Z 1 Re Z, ImZ Re Z Im 1 Re Z Z (1) Serial compesatig iductor value L par ca be calculated as: L Im Z ser. (13) s Fig. 11. Moitorig of the ultrasoic actuator impedace chage by loadig; by excitatio voltage. 7.4. Ultrasoic rasducer Impedace Measuremet for Power Delivery Estimatio Ultrasoic trasducer impedace measuremet results ca be used to estimate the trasducer excitatio efficiecy or to calculate the electrical matchig circuits [1, ]. Power delivery to load is maximized whe load impedace is equal to geerator itrisic resistace R g. I case of complex load impedace the imagiary part (Fig. 10) is reducig the efficiecy of the electrical power coversio the pressure wave. hese parameters ca be modified by applyig the electrical circuit i betwee the ultrasoic trasducer ad excitatio geerator [7, 4]. With the measured trasducer impedace available, trasducer performace ca be estimated without the eed for model derivatio. More details o ultrasoic trasducer matchig circuits ca be foud i [3]. Graphs i Fig. 1 are of little use sice there is o evidet advatage of ay matchig techique. Quatitative matchig performace evaluatio criteria have bee suggested i [4]: i) Power delivered to load at operatio frequecy; ii) -3 db badwidth; iii) Effective badwidth; iv) Power delivery to load efficiecy; v) Power factor ad vi) otal efficiecy. Here we oly cocetrate o power delivery efficiecy. Measured trasducer impedace ca be used to calculate the complex power delivered to it: S e Z g i * Rg Zi R g Zi, (14) where e g is the itrisic geerator voltage; Z i is the trasducer iput impedace (if matchig circuit is applied i betwee) ad R g is the geerator itrisic resistace. Assumig that losses i matchig circuit are egligible the real part P of the complex power S is equal to the power dissipated i trasducer. I case of optimal trasducer desig it ca be further assumed that this power is i direct proportio to the acoustic emissio of the trasducer [5]. he the power delivery to load efficiecy criteria ca be 14
Sesors & rasducers, ol. 4, Special Issue, August 013, pp. 7-18 established, which establishes the ratio of the real power coveyed to load ad the power available from geerator [4]: 4 Rg Re S e g 100% R 4 Rg Z i g Z i Rg Z i* 100% (15) Fig. 13. Ultrasoic trasducer impedace L matchig ifluece o power delivery efficiecy. Fig. 1. Ultrasoic trasducer impedace matchig: origial, after series ad parallel iductace applicatio. he results of power delivery efficiecy ivestigatio are preseted i Fig. 13. rasducer impedace was measured ad L matchig [6] circuit applicatio ifluece o impedace obtaied (Fig. 13 a). Power delivery efficiecy was calculated for two matchig circuits: with impedace matchig at 11 MHz ad at 5 MHz (Fig. 13 b). Aalysis of the power delivery efficiecy graph above idicates that same matchig techique gives differet results: i some case passbad is improved (matchig at 11 MHz) but aother coditio (differet matchig frequecy, 5 MHz) has much arrower badwidth. Availability of impedace for aalysis allows to fie tue the matchig circuit for optimum performace. 7.5 Ultrasoic rasducer ad Preamplifier Combied oise Performace Ivestigatio he preamplifier output oise desity ca be obtaied by modelig the amplifier itrisic oise usig voltage source e ad curret oise sources i+ ad i- [7]. Simplified ultrasoic preamplifier structure, realized usig operatio amplifier is preseted i Fig. 14. Measured trasducer impedace Z ca be used for total output oise estimatio: etot G Rt Z es G et Rt Z Rt Z, G Rt Z i Ge G 1 e1 e Ri Rt Z (16) 15
Sesors & rasducers, ol. 4, Special Issue, August 013, pp. 7-18 e U Z Rt 1 R e s e t i + R 1 e i - e 1 Fig. 14. Combied ultrasoic trasducer ad preamplifier oise model circuit. Fig. 15. Ultrasoic trasducer ad preamplifier combied iput-referred oise voltage desity estimatio. where e t is the oise spectral desity of the iput biasig resistace R t, e t is oise power spectral desity ad G is the amplifier gai e t 4kR t, (17) PSD Cmax 1 c1 0 f C s i k s e max. (1) with k=1.380658. 10-3 J/C - Bolzma costat, is the absolute ambiet temperature; e s is the oise compoet of the ultrasoic trasducer with complex impedace Z e 4k Re( ), (18) s Z he feedback circuit cotributes as e1 4kR1 ; 4kR e. (19) For the iput-referred oise it ca be simplified ito three mai compoets: source thermal oise e s, amplifier iput voltage source oise e ad curret source oise: s i SD e e Z. (0) he, impedace measuremet results ca be used for ultrasoic trasducer ad preamplifier combied oise estimatio [3-6, 8]. Fig. 15 is used to compare the oise estimatio usig the source impedace measuremet ad covetioal oise estimatio usig Agilet 930A spectrum aalyzer. It is worth to ote out that our acquisitio system is capable to record the sigals from the DU with sufficiet record legth (3 k or eve 56 k samples log). If DU output is passed through low oise amplifier with flat frequecy respose ad kow gai value, these measuremets ca be used oise spectral desity estimatio. Here, FF ca be used for oise power spectrum estimatio. he multiple oise power desity measuremets ca be powerwise averaged C max times to obtai the statistical oise estimate. oise level measuremet usig the Agilet 930A spectrum aalyzer ad the desiged system compariso was carried out. Record legth of 3 k samples is equivalet to 3 khz resolutio badwidth of spectrum aalyzer: such coditio was used i measuremets. Amplifier output oise was recorded C max =1000 times. Every record obtaied was coverted to frequecy domai usig Fourier trasform. Rectagular widow was used o acquired data. he results were coverted to power spectrum, averaged ad power spectral desity obtaied (Fig. 14). he, usig quite simple acquisitio system amplifier oise performace ca be estimated both usig trasducer impedace measuremet results ad both multiple records of output oise ad Fourier aalysis. 8. Coclusios Structure ad desig approach of the versatile sigals acquisitio system for ultrasoic equipmet parameters estimatio has bee preseted. he modular architecture of the system allows for both local ad remote PC coectivity. Setup ad results for system applicatio examples ad measuremet results are preseted. System allows measurig multiple frequecy domai parameters measuremet usig just two ADC chaels ad DDS geerator. haks to the iheret processig gai of the sie wave correlatio techique, large dyamic rage of vector voltage measuremet is obtaied usig just 10 bit ADC. Operatio rage is 0 khz to 30 MHz. rasfer AC respose, isertio loss, harmoic distortios, oise ad electrical impedace measuremet results idicate that system has acceptable performace. High SR ad large 16
Sesors & rasducers, ol. 4, Special Issue, August 013, pp. 7-18 dyamic rage allow performig the majority of ultrasoic trasducers impedace measuremets without the eed to chage the referece resistor. Compariso with bechtop impedace aalyzer 6510B from Waye Kerr Electroics idicates the acceptable device performace i impedace estimatio. Availability of impedace for aalysis allows to fie tue the matchig circuit for optimum performace. Ultrasoic equipmet oise estimatio ca be carried out. Amplifier oise performace ca be estimated both usig trasducer impedace measuremet results ad both multiple records of output oise ad Fourier aalysis. oise measuremet results were compared agaist results obtaied by Agilet 930A spectrum aalyzer. Compariso idicated acceptable oise estimatio performace. Ackowledgemets his research was fuded by a grat (o. MIP- 058/01) from the Research Coucil of Lithuaia. Refereces [1]. L. Svilaiis,. Dumbrava, A. Chaziachmetovas, Uiversal acquisitio system for frequecy domai parameters measuremet, i Proceedigs of 6 th IEEE Iteratioal Coferece o Itelliget Data Acquisitio ad Advaced Computig Systems (IDAACS 011), 011, pp.10-15. []. M. Garcia-Rodriguez, et al., Low cost matchig etwork for ultrasoic trasducers, Physics Procedia, ol. 3, Issue 1, Jauary 1, 010, pp. 105-1031. [3]. L. Svilaiis,. Dumbrava, A. Chaziachmetovas, Ultrasoic preamplifier performace evaluatio, i Proceedigs of IEEE Coferece o Iformatio echology Iterfaces, Jue 1-4, 010, pp. 663-668. [4]. A. uro, J. Salazar, J. A. Chavez, et al., Ultra-low oise frot-ed electroics for air-coupled ultrasoic o-destructive evaluatio, D&E Iteratioal, ol. 36, 003, pp. 93-100. [5].. Dumbrava, L. Svilaiis, oise model for ultrasoics trasducer preamplifier, Electroics ad Electrical Egieerig, ol. 66, 006, pp. 6-66. [6].. L. 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Sesors & rasducers, ol. 4, Special Issue, August 013, pp. 7-18 [7]. C. D. Motchebacher, J. A. Coelly, Low oise electroic system desig, Joh Willey & Sos Ic., 1993. [8]. W. M. Leach, oise aalysis of trasformer-coupled preamplifiers, Joural of Audio Egieerig Society, ol. 40, 199, pp. 3-11. 013 Copyright, Iteratioal Frequecy Sesor Associatio (IFSA). All rights reserved. (hwttp://www.sesorsportal.com) 18