Proceedings of the 6th European Embedded Design in Education and Research, 2014 DESIGN OF AN EMBEDDED BATTERY MANAGEMENT SYSTEM WITH PASSIVE BALANCING Kristaps Vitols Institute of Industrial Electronics and Electrical Engineering, Riga Technical University Kalku street 1, LV1050, Riga, Latvia phone: +37126407575, email: k.vitols@rtu.lv web: www.rtu.lv ABSTRACT This article documents the results of designing an embedded battery pack for an educational electric kart. The work is based on a previous project where an electric kart drive train was designed. The new lithium ion battery pack design is described and the need for a microcontroller controlled battery balancing system is based. A passive cell balancing solution is implemented as a small cell balancer board. A central control board is designed to collect cell status information, analyze the obtained data and provide information to the end user. The collected information is stored in a memory card for further battery pack performance evaluation. The paper shows an example of obtained charge/discharge data. 1. INTRODUCTION The promising growth of available electric vehicles shows that all the related technologies such as motors batteries and power converters will be much required [1][2]. Well trained engineers and professionals are required to effectively use these technologies. One of the institutions to educate young engineers is university. To increase student interest in electric vehicles a couple of years ago an electric kart was designed as part of a master thesis. It was meant to be used as a platform for further improvements developed during other students master thesis. The first version of the electric kart used two sets of lead-acid batteries, two sets of buck converters and two sets of permanent magnet DC motors [3]. This article is meant to show the progress in the development of kart energy source the batteries. The first battery pack consisted of lead-acid cells which were low cost but poor in all other performance criterions. It was decided to upgrade the battery pack to more advanced cell chemistry lithium ion. While more expensive these cells will grant a chance to improve other kart powertrain elements, for example the drive (buck converter) maximal current capability can be tripled. Just switching battery cell types is easy since most of the work is just adjusting mechanics. The more complicated part is in the fact that lithium ion battery packs need a dedicated battery management system that at bare minimum can measure each cell voltage to prevent operation outside the permissible voltage range if allowed voltage is breached then cells can be fatally damaged. Battery management system can perform other tasks: balance cells to optimize the stored and available energy quantity; measure remaining capacity; log cell voltages and temperatures; provide information regarding battery pack parameters to the user; control charging and discharging processes. For this particular project it was decided to design an embedded battery management system that consists of: passive balancing modules that are installed on each cell; central battery management controller that collects information from the balancing modules and performs voltage check and logs cell voltages to a micro SD card. 2. BATTERY PACK The new battery pack is meant to replace the old electric kart battery pack. The previous battery pack consists of six series connected lead-acid batteries with nominal voltage 12V and capacity 22Ah. It is capable to store 1.6kWh of energy and provide 72V which is the nominal voltage of the kart motor. As the batteries used lead acid technology their weight is approximately 40kg which produces energy/mass ratio of 40Wh/kg it is considered as one of the drawbacks of this pack. Nevertheless the main drawback of this leadacid battery pack is its current capability. Its max discharge current is 300A for 5 seconds and it must be noted that the available energy dramatically drops as the discharge current increases. The battery datasheet provides information that only 28% of energy is available if discharge current is 73A. One additional drawback is the low max charging current which is just 6A not sufficient for effective regenerative braking. A new battery pack was designed to improve the performance of the electric kart. LiFePO 4 (LFP) battery cells with 40Ah capacity were selected for the new pack. To ease the mechanical assembly of the battery pack it was selected to use 20 series connected cells (Fig. 1) which at nominal cell voltage 3.2V produce a nominal pack voltage of 64V which is a bit less than necessary for motor to develop the max speed but for this project the top speed is not essential. The maximum voltage of each cell is 4V. Common practice is to use 3.8V per cell for battery charging. When the pack is at the end of charging cycle its voltage is 76V. The cell minimum operating voltage is 2.8V. The total weight of the battery pack is 33kg which means that the energy/mass ratio for this pack is 78Wh/kg almost two times better if compared to the lead-acid pack. Another advantage of this pack is its current capability it 978-1-4799-6843-5/14/$31.00 2014 IEEE 142
Figure 1 Assembled battery pack with installed cell balancer modules. can be steadily discharged with 120A and for 5s long periods 800A can be drawn. It is planned to use 300A during kart acceleration which means that this pack is sufficient. The pack can be charged with current up to 120A if battery temperature is kept below 80 C this parameter can provide a lot better regenerative braking. However there is one significant drawback lithium batteries have very strict operational voltage limits. If they are breached then the cells can be permanently damaged. Lead-acid batteries are more tolerant to deep discharge and they can survive overcharge very well. If there is just one cell like in mobile phones then the problem can be solved just by measuring the cell voltage at all times. However in the situation when cells are connected in series and are being charged or discharged, due to cell differences they will each have a bit different voltage the voltage of each cell has to be monitored to prevent cell failure. 3. BALANCING MODULE This cell management system (CMS) was designed with passive resistive shunting balancing method instead of using some sort of active balancing which could be more efficient or provide more functionality. The resistive shunting was selected because of the need for fast and resource efficient development of cell balancing so that the battery pack could be used for other different projects. Developing an active balancing system would take more time because such systems require more complex control which has to be rigorously verified. The topologies of active balancing are more complex and thus they have larger layout and the component costs are higher. Because of these reasons a passive solution was selected as the primary approach. In future project stages it is planned to use some type of active balancing which could further improve the performance of the battery pack. Resistive shunting is a good start to obtain a functional battery pack as soon as possible. Resistive shunting balancing is used only during charging when a cells voltage has reached full voltage limit. At his point the cell is shunted with a resistor which discharges the cell and prevents further voltage increase. Figure 2 Cell balancing module. A layout of a balancer module per cell was selected for cell equalization. This design allows easy arrangement of battery pack and does not have problems with floating ground since each balancing module is supplied from just one cell and is electrically connected only to the same cell. For the control Texas Instruments MSP430G2153 value line microcontroller (MCU) was used. It has a 16-bit processor running at 16MHz. The microcontroller is equipped with a 10-bit ADC capable of 200kSPS which is suitable for battery voltage measurement. Several data transfer peripherals are available on the MCU. In this case the UART block is configured to perform asynchronous data transfer. The use of quad-flat no-leads (QFN) package enables saving space since only top side of the board is to be populated by parts; additionally smaller packages tend to be less expensive. If compared to some other MCUs the MSP430 can be programmed using JTAG interface which is more functional and can perform code debugging while running the code. A 10W wire wound resistor was used as the balancing resistor. [4] mentions that the shunting current should be at least 10mA for each Ah of the cell. Here the 40Ah results in 400mA shunting current which at 3.8V produces 9.5Ω for the resistor. While the selected resistor allowed more power to be dissipated, it was selected to use 2.15Ω higher balancing current leads to faster cell equalization. The balancing module is shown in Fig. 2. The full schematic of the module is shown in Fig. 3. It can be seen that the board is equipped with a JTAG connector for programming and debugging. Jumper J1 is used to disconnect the balancing module from the cell if the battery pack will not be used for long periods of time. It is necessary because the balancing module has some power draw and it can discharge the cell over time. At the heart of the balancer board is the microcontroller ADC module. The voltage of each cell is measured by the microcontroller 10bit analog-digital converter (ADC). The ADC reference voltage is set to 2.5V using the built-in reference generator. A 1% precision resistor divider is used to reduce the cell voltage to appropriate level for the ADC. Cell voltage is measured every half second. Initially 20 cell balancer modules were assembled. All modules were tested to verify the uniformity of ADC measurements. A simple test was carried out: 3.8V was applied to the cell balancer terminals and ADC output value was recorded. Obtained 143
Figure 3 The schematic of the balancing module. results showed a dispersion of 30 discreet values. It should be noted that the permissible cell voltages are from 2.8V to 3.8V. With selected resistor divider and a 10bit ADC it produces a resolution of 4mV per bit and the permissible voltage range transforms to 244 values for the ADC output. If the ADC accuracy range spans 30 values this means that the cell voltage measurement can have 12% error from one chip to another, which cannot be allowed. Since it is not reasonable to correct the error in the master board, two approaches on the cell balancer ADC calibration were tested. The first approach was to level out all cell balancers so that all ADC produced the same value at one input voltage. The lowest cell voltage limit was selected as the calibration voltage. The voltage was applied to all balancers and their ADC values were read and next the calibration values were calculated so that the end result is the same for all modules. Since the cell balancer program code is composed in assembler language it is quite easy to add calibration value to an ADC output value. Calibration value was stored in the microcontroller information memory to allow further program code modification without a risk to corrupt calibration data. Once all the cell balancers were calibrated they all were tested at three cell voltages 2.798V 3.298V and 3.705V. Results showed that at 2.798V all cell balancers were producing the same values but as the voltage increased to 3.298V and 3.705V there were measurement errors of 18mV and 32mV respectively which is too high if accurate cell balancing is to be used. After the first approach it was noticed that the ADC each have a bit different conversation output slopes varying from chip to chip. To compensate for different slopes it is necessary to multiply the measured value by some calibration constant. The previously set upper cell voltage value was used as a reference for the correct slope. Again each ADC output value was measured at 3.8V cell voltage. The upper level value was divided by the obtained measurement values. A fractional 15bit binary number was obtained as the result for each cell balancer. Each corresponding calibration constant was saved in the microcontroller information memory and later was used to compensate the measured values by the use of software multiplication. Again the same three voltage test was carried out and it revealed that there was a minor dispersion at all voltages but the error was never more than 2 discreet values which correspond to 0.8% error which was deemed to be sufficient. 4. MASTER MODULE While balancing modules can partially prevent cell overcharge by shunting there still is a need for a centralized master module. One reason for the master module is that during a pack discharge one of the cells will discharge faster and reach the lower operational voltage level at this point the discharge must be stopped. The cell balancer cannot stop the discharge process of the pack. That is why the master module analyzes all cell voltages and once one of the cells is empty, so is the whole pack. Then the master module generates a signal that disconnects the battery pack from the load. Similar action is taken during charging process. While charging each cell one at a time will reach the top operational voltage level and the cell balancer will start to balance that cell. At this point the master module has to produce a signal to decrease the charging current below the value of the balancing current otherwise the balancing circuit will not be able to stop the voltage increase on the cell. Gradually all cells will reach their full voltage limits and at this point the master module has to generate a signal that stops the charging process. As an additional feature the master module logs all the cell voltage values. The obtained information is used to evaluate the battery pack and battery management system performance. 144
Figure 4 Battery management master module. To achieve the defined functionality a master board was designed and manufactured (Fig. 4). The master board block diagram is shown in Fig. 5. The central processing element is MSP430F2274 microcontroller. Its UART communication module with hardware associated with TX is used to transfer commands to the first cell balancing module while the hardware associated with RX is connected to the last cell balancer of the string. It receives the cell data. The other microcontroller communication module is used in SPI mode to write the collected data to the micro SD card. An MMC/SD Flash memory card interfacing example [5] provided by Texas Instruments was adapted for use in this project to ease the program code development. Almost whole Port 4 is used to connect to the 4x16 character LCD display. All the control of the display is done in software. Four pins of Port 2 are used for user interface as buttons. This port was selected for its interrupt capability. One of the microcontroller timers is used to provide an alarm signal to the buzzer in situations when a cell voltage level exceeds its operational thresholds. An external 16MHz crystal is used to generate the main microcontroller clock frequency. Since the master module is intended to save the cell voltages it is necessary to obtain them at precise time intervals. These intervals are set by an additional MSP430G2221 microcontroller which operates just as a pulse generator which generates a pulse every 5 seconds. A received pulse starts data exchange phase. After data exchange phase the master controller is in idle mode and it analyzes if any of the cell voltages have reached the full or empty level. If one of these levels have been reached then an appropriate output is generated which can be used to stop the charging or discharging of the battery pack. Additionally during the idle phase master controller prints cell voltages to a four line LCD display. The user can scroll through the values to check the individual cell voltages. Figure 5 Block diagram of the master module. 5. COMMUNICATION To perform the communication between all the cell balancer modules and master board a daisy chain asynchronous serial data transfer was implemented. Each cell balancer module has a data input which is isolated with an opto-isolator. Each module data output is connected to the next module input. The last module data output is connected to master board data input. The MSP430 UART module was used in cooperation with software control to perform 16bit data exchange between all the modules. Communication operates as follows. There are two operation phases: idle phase and data exchange phase. During the idle phase each cell balancer module measures and saves cell voltage value in memory buffer. Buffer value is constantly updated as a new cell voltage measurement is made. Once every five seconds the master sends a command word to the first cell balancer this starts the data exchange phase. This exchange rate is selected for practical reasons. As the cell balancer receives any data word it stops cell voltage measurement. In the first step the cell module transmits its buffered data to the next cell module. In the second step the cell module saves the received word in the memory buffer and waits for more incoming data. If more data is received then the operations are repeated previous data are sent and the new are saved. If no more data have been received for a determined period then the cell balancer returns to the idle phase and starts to refresh the memory buffer with actual measurements of the cell voltage. As previously mentioned the data exchange phase is initiated by the master board as it sends out a specific command word. As the first balancer receives the command word it sends first cell voltage word and saves command word. As the second balancer receives the first voltage 145
Figure 6 Battery pack discharge graph. Figure 7 Battery pack discharge graph. word it sends second cell voltage word and saves first cell voltage. This pattern is repeated by all the cell balancers. The last cell balancer sends out its voltage data to the master board. Master board receives this data and since it is not the same specific command word previously sent, master controller saves this data in the cell voltage array and sends out another specific command word. The operations are repeated until master board receives back the specific command word. Once the command word has been received the master stops to send out command words and after a brief moment the idle mode is once again active. Now the master module has the cell voltage values from all cell balancer modules. 6. CONCLUSIONS An improved battery pack for an electric kart has been designed and developed. MSP430 family microcontrollers were successfully implemented to design an embedded battery management system with data acquisition function. The logged cell voltages were later processed in Matlab to obtain discharge graph shown in Fig. 6. here it can be noticed that one of the cells is weaker. Fig. 7. shows a charge graph where the one cell takes more time to fully charge. The system still lacks proper front end to control charge/discharge which will be developed in future. Some work should be done, such as in [6] to improve the balancer module energy efficiency because the current data exchange circuitry draws too much current. REFERENCES [1] Galkin, I.; Stepanov, A.; Laugis, J., "Outlook of usage of supercapacitors in uninterruptible power supplies," Baltic Electronics Conference, 2006 International, vol., no., pp.1,4, 2-4 Oct. 2006 [2] Galkin, I; Stepanov, A; Suskis, P., "Selection of power factor corrector for modular uninterruptable power supply system," Power Electronics and Motion Control Conference (EPE/PEMC), 2010 14th International, vol., no., pp.t13-17,t13-21, 6-8 Sept. 2010 [3] Vitols, K.; Galkin, I., "Analysis of electronic differential for electric kart," Power Electronics and Motion Control Conference (EPE/PEMC), 2012 15th International, vol., no., pp.ds3a.2-1,ds3a.2-5, 4-6 Sept. 2012 [4] M. Daowd, N. Omar, P. Van Den Bossche, J. Van Mierlo, Passive and active battery balancing comparison based on MATLAB simulation, Vehicle Power and Propulsion Conference (VPPC), 2011 IEEE, vol., no., pp.1-7, 6-9 Sept. 2011 [5] Application Report SLAA281B, http://www.ti.com/lit/an/slaa281b/slaa281b.pdf [6] Stepanov, A; Vorobyov, M.; Galkin, I, "Battery monitoring using high frequency impedance modulation through series power line," IECON 2012-38th Annual Conference on IEEE Industrial Electronics Society, vol., no., pp.5148,5152, 25-28 Oct. 2012 146