Data Sheet No. PD227 IRS2117/IRS211(S)PbF Features Floating channel designed for bootstrap operation Fully operational to + V Tolerant to negative transient voltage, dv/dt immune Gate drive supply range from 1 V to 2V Undervoltage lockout CMOS Schmitt-triggered inputs with pull-down Output in phase with input (IRS2117) or out of phase with input (IRS211) RoHS compliant SGLE CHANNEL DRIVER Product Summary V OFFSET V max. I O +/- 2 ma / 42 ma V OUT 1 V - 2 V t on/off (typ.) 125 ns & 15 ns Description The IRS2117/IRS211 are a high voltage, high speed power MOSFET and IGBT driver. Proprietary HVIC and latch immune CMOS technologies enable ruggedized monolithic construction. The logic input is compatible with standard CMOS outputs. The output driver features a high pulse current buffer stage designed for minimum cross-conduction. The floating channel can be used to drive an N-channel power MOSFET or IGBT in the high-side or low-side configuration which operates up to V. Typical Connection Packages -Lead PDIP IRS2117/IRS211 -Lead SOIC IRS2117S/IRS211S up to V COM V B HO V S TO LOAD IRS2117 up to V COM V B HO V S TO LOAD (Refer to Lead Assignments for correct pin configuration). These diagrams show electrical connections only. Please refer to our Application Notes and DesignTips for proper circuit board layout. IRS211 www.irf.com 1
Absolute Maximum Ratings Absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. All voltage parameters are absolute voltages referenced to COM. The thermal resistance and power dissipation ratings are measured under board mounted and still air conditions. Additional information is shown in Figs. 5 through. Symbol Definition Max. Units V B High-side floating supply voltage -.3 25 V S High-side floating supply offset voltage V B - 25 V B +.3 V HO High-side floating output voltage V S -.3 V B +.3 Logic supply voltage -.3 25 V Logic input voltage -.3 +.3 dv s /dt Allowable offset supply voltage transient (Fig. 2) 5 V/ns P D Package power dissipation @ T A +25 C Rth JA Thermal resistance, junction to ambient ( lead PDIP) 1. ( lead SOIC).25 ( lead PDIP) 125 ( lead SOIC) 2 T J Junction temperature 15 T S Storage temperature -55 15 T L Lead temperature (soldering, 1 seconds) 3 V W C/W C Recommended Operating Conditions The input/output logic timing diagram is shown in Fig. 1. For proper operation the device should be used within the recommended conditions. The V S offset rating is tested with all supplies biased at 15 V differential. Symbol Definition Max. Units V B High-side floating supply absolute voltage V S + 1 V S + 2 V S High-side floating supply offset voltage Note 1 V HO High-side floating output voltage V S V B Logic supply voltage 1 2 V V Logic input voltage T A Ambient temperature -4 125 C Note 1: Logic operational for V S of -5 V to + V. Logic state held for V S of -5 V to -V BS. (Please refer to the Design Tip DT97-3 for more details). www.irf.com 2
Dynamic Electrical Characteristics V BIAS (, V BS ) = 15 V, C L = 1 pf and T A = 25 C unless otherwise specified. The dynamic electrical characteristics are measured using the test circuit shown in Fig. 3. Symbol Definition Max. Units Test Conditions t on Turn-on propagation delay 125 2 V S = V t off Turn-off propagation delay 15 1 V S = V ns t r Turn-on rise time 75 13 t f Turn-off fall time 35 5 Static Electrical Characteristics V BIAS (, V BS ) = 15 V and T A = 25 C unless otherwise specified. The V, V TH, and I parameters are referenced to COM. The V O and I O parameters are referenced to COM and are applicable to the respective output leads: HO or LO. Symbol Definition Max. Units Test Conditions V IH Input voltage - logic 1 (IRS2117) logic (IRS211) 9.5 V IL Input voltage - logic (IRS2117) logic 1 (IRS211). V OH High level output voltage, V BIAS - V O.5.2 V OL Low level output voltage, V O.2.1 I LK Offset supply leakage current 5 V B = V S = V I QBS Quiescent V BS supply current 5 24 I QCC Quiescent Supply Current 7 34 I + I - Logic 1 input bias current Logic input bias current (IRS2117) (IRS211) (IRS2117) (IRS211) 2 4 5. V BSUV+ V BS supply undervoltage positive going threshold 7.. 9. V BSUV- V BS supply undervoltage negative going threshold 7.2.2 9.2 UV+ supply undervoltage positive going threshold 7.. 9. UV- supply undervoltage negative going threshold 7.2.2 9.2 V = V = V O = V IO+ Output high short circuit pulsed current 2 29 V = Logic 1 PW 1 µs V O = 15V I O- Output low short circuit pulsed current 42 V = Logic V µa V ma I O = 2 ma V = V or V = V PW 1 µs www.irf.com 3
Functional Block Diagram (IRS2117) Functional Block Diagram (IRS211) www.irf.com 4
IRS2117(S)/IRS211(S) Lead Definitions Symbol Description COM V B HO V S Logic and gate drive supply Logic input for gate driver output (HO), in phase with HO (IRS2117) Logic input for gate driver output (HO), out of phase with HO (IRS211) Logic ground High-side floating supply High-side gate drive output High-side floating supply return Lead Assignments 1 V B 1 V B 2 HO 7 2 HO 7 3 COM V S 3 COM V S 4 5 4 5 Lead PDIP Lead SOIC IRS2117 IRS2117S 1 V B 1 V B 2 HO 7 2 HO 7 3 COM V S 3 COM V S 4 5 4 5 Lead PDIP Lead SOIC IRS211 IRS211S www.irf.com 5
(IRS211) (IRS2117) HO IRS2117 IRS211 <5 V/ns Figure 1. Input/Output Timing Diagram Figure 2. Floating Supply Voltage Transient Test Circuit (IRS211) 5% 5% 5% 5% IRS2117 IRS211 (IRS2117) t on t r t off 9% 9% t f HO 1% 1% Figure 3. Switching Time Test Circuit Figure 4. Switching Time Waveform Definition www.irf.com
5 5 Turn-On Delay Time (ns) 4 3 2 1 Turn-On Delay Time (ns) 4 3 2 1-5 -25 25 5 75 1 125 1 12 14 1 1 2 V BIAS Figure 5A. Turn-On Time Figure 5B. Turn-On Time 5 5 Turn-Off Time (ns) 4 3 2 1 Turn-Off Time (ns) 4 3 2 1-5 -25 25 5 75 1 125 Figure A. Turn-Off Time 1 12 14 1 1 2 V BIAS Figure B. Turn-Off Time www.irf.com 7
5 5 Turn-On Rise Time (ns) 4 3 2 1-5 -25 25 5 75 1 125 Turn-On Rise Time (ns) 4 3 2 1 T yp. 1 12 14 1 1 2 V BIAS Figure 7A. Turn-On Rise Time vs.temperature Figure 7B. Turn-On Rise Time 25 25 Turn-Off Fall Time (ns) 2 15 1 5 Turn-Off Fall Time (ns) 2 15 1 5-5 -25 25 5 75 1 125 1 12 14 1 1 2 V BIAS Figure A. Turn-Off Fall Time Figure B. Turn-Off Fall Time www.irf.com
13 1 Input Voltage (V) 12 11 1 9 Input Voltage (V) 15 12 9 3-5 -25 25 5 75 1 125 1 12 14 1 1 2 V cc Figure 9A. Logic "1" (IRS211 "") Input Voltage Figure 9B. Logic "1" (IRS211 "") Input Voltage 9 15 Input Voltage (V) 7 5 Input Voltage (V) 12 9 3 4-5 -25 25 5 75 1 125 Temperatre ( o C) Figure 1A. Logic "" (IRS211 "1") Input Voltage 1 12 14 1 1 2 V cc Figure 1B. Logic "" (IRS211 "1") Input Voltage www.irf.com 9
High Level Output Voltage (V).5.4.3.2.1. Max. Ty p High Level Output Voltage (V).5.4.3.2.1 Max. Typ -5-25 25 5 75 1 125 1 12 14 1 1 2 V cc Figure 11A. High Level Output (Io = 2 ma) Figure 11B. High Level Output (Io = 2 ma) Low Level Output Voltage (V).5.4.3.2.1-5 -25 25 5 75 1 125 Low Level Output Voltage (V).5.4.3.2.1 MAX. 1 12 14 1 1 2 V cc Figure 12A. Low Level Output vs.temperature Figure 12B. Low Level Output www.irf.com 1
Offset Supply Leakage Current (µa) 5 4 3 2 1-5 -25 25 5 75 1 125 Offset Supply Leakage Current (µa) 5 4 3 2 1 1 2 3 4 5 V B Boost Voltage (V) Figure 13A. Offset Supply Leakage Current Figure 13B. Offset Supply Leakage Current vs. V B Boost Voltage 1 1 V BS Supply Current ( µa) 4 2-5 -25 25 5 75 1 125 V BS SupplyCurrent (µa) 4 2 1 12 14 1 1 2 V BS Figure 14A. V BS Supply Current Figure 14B. V BS Supply Current www.irf.com 11
1 1 V cc Supply Current (µa) 4 2 V cc Supply Current (µa) 4 2 Max. -5-25 25 5 75 1 125 1 12 14 1 1 2 V cc Figure 15A. Supply Current Figure 15B. Supply Current Logic "1" Input Current (µa) 12 1 4 2-5 -25 25 5 75 1 125 Figure 1A. Logic "1" (IRS211 Logic"") Input Current Logic "1" Input Current (µa) 12 1 4 2 1 12 14 1 1 2 Figure 1B. Logic "1" (IRS211 Logic "") Input Current www.irf.com 12
Logic "" Input Bias Current (µa) 5 Max 4 3 2 1-5 -25 25 5 75 1 125 Temperature ( C) Figure 17A. Logic "" Input Bias Current Logic "" Input Bias Current (µa) 5 Max 4 3 2 1 1 12 14 1 1 2 Figure 17B. Logic "" Input Bias Current vs. Voltage 1 1 V c c S u p p l y C u r r e n t ( µa) 14 12 1 Max. -5-25 25 5 75 1 125 V c c S u p p l y C u r r e n t (µa) 14 12 1 Max. -5-25 25 5 75 1 125 Figure 1. V cc Undervoltage Threshold (+) Figure 19. V cc Undervoltage Threshold (-) www.irf.com 13
V BS Supply Current (µa) 1 14 12 1 Max. -5-25 25 5 75 1 125 V BS SupplyCurrent (µa) 1 14 12 1-5 -25 25 5 75 1 125 Figure 2. V BS Undervoltage Threshold (+) Figure 21. V BS Undervoltage Threshold (-) Output Source Current (ma ) 5 4 3 2 1-5 -25 25 5 75 1 125 Output Source Current (ma) 5 4 3 2 1 1 12 14 1 1 2 V BIAS Figure 22A. Output Source Current Figure 22B. Output Source Current www.irf.com 14
1 1 Output Sink Current ( ) 4 2 Output Sink Current ( ) 4 2-5 -25 25 5 75 1 125 1 12 14 1 1 2 V BIAS Figure 23A. Output Sink Current vs.temperature Figure 23B. Output Sink Current vs Offset -2-4 - - -1-12 1 12 14 1 1 2 V BS Floting Figure 24. Maximum VS Negative Offset www.irf.com 15
15 32 V 14 V 15 32 V 14 V Junction 125 1 75 5 25 1 V Junction 125 1 75 5 25 1 V 1E+2 1E+3 1E+4 1E+5 1E+ Frequency (Hz) Figure 24. IRS2117/IRS211 TJ vs. Frequency (IRFBC2) R GATE = 33 Ω, = 15 V 1E+2 1E+3 1E+4 1E+5 1E+ Frequency (Hz) Figure 25. IRS2117/IRS211 TJ vs. Frequency (IRFBC3) R GATE = 22 Ω, = 15 V 15 32 V 14 V 1 V 15 32 V 14 V 1 V Junction 125 1 75 5 Junction 125 1 75 5 25 25 1E+2 1E+3 1E+4 1E+5 1E+ Frequency (Hz) Figure 2. IRS2117/IRS211 TJ vs. Frequency (IRFBC4) R GATE = 15 Ω, = 15 V 1E+2 1E+3 1E+4 1E+5 1E+ Frequency (Hz) Figure 27. IRS2117/IRS211 TJ vs. Frequency (IRFPE5) R GATE = 1 Ω, = 15 V www.irf.com 1
Case outlines -Lead PDIP 1-14 1-33 1 (MS-1AB) A E X D 5 7 5 1 2 3 4 e B H.25 [.1] A.4 [.255] 3X 1.27 [.5] FOOTPRT X.72 [.2] X 1.7 [.7] DIM C HE S MILLIMETERS M MAX M MAX A A1.532.4..9 1.35.1 1.75.25 b.13.2.33.51 c.75.9.19.25 D E e e1 H K L y.19.19.1497.1574.5 BASIC 1.27 BASIC.25 BASIC.35 BASIC.224.244.99.19.1.5 4. 5. 3. 4. 5..2.25.5.4 1.27 e1 A C y K x 45 X b A1.25 [.1] C A B.1 [.4] X L 7 X c NOTES: 1. DIMENSIONG & TOLERANCG PER ASME Y14.5M-1994. 2. CONTROLLG DIMENSION: MILLIMETER 3. DIMENSIONS ARE SHOWN MILLIMETERS [CHES]. 4. OUTLE CONFORMS TO JEDEC OUTLE MS-12AA. -Lead SOIC 5 DIMENSION DOES NOT CLUDE MOLD PROTRUSIONS. MOLD PROTRUSIONS NOT TO EXCEED.15 [.]. DIMENSION DOES NOT CLUDE MOLD PROTRUSIONS. MOLD PROTRUSIONS NOT TO EXCEED.25 [.1]. 7 DIMENSION IS THE LENGTH OF LEAD FOR SOLDERG TO A SUBSTRATE. 1-27 www.irf.com 17
Tape & Reel -Lead SOIC LOAD ED TAPE FEED DIRECTIO N B A H D F C NOTE : CONTROLLG DIMEN SION MM E G CARRIER TAPE DIMENSION FOR SOICN Metric Imperial Code Min Max Min Max A 7.9.1.311.31 B 3.9 4.1.153.11 C 1 1.7 1 2.3.4.4 4 D 5.45 5.55.214.21 E.3.5.24.255 F 5.1 5.3.2.2 G 1.5 n /a. 59 n /a H 1.5 1..59.2 F D E C B A G H REEL DIMENSIONS FO R SO ICN Metric Imperial Code Min Max Min Max A 329. 33.25 12.97 13.1 B 2.95 21.45.24.44 C 12. 13.2.53.519 D 1.95 2.45.77.9 E 9. 12. 3.5 4.15 F n/a 1.4 n/a.724 G 14.5 17.1.57.73 H 12.4 14.4.4.5 www.irf.com 1
LEADFREE PART MARKG FORMATION Part number Date code IRSxxxxx YWW? IR logo Pin 1 Identifier? MARKG CODE P Lead Free Released Non-Lead Free Released?XXXX Lot Code (Prod mode - 4 digit SPN code) Assembly site code Per SCOP 2-2 ORDER FORMATION -Lead PDIP IRS2117PbF -Lead PDIP IRS211PbF -Lead SOIC IRS2117SPbF -Lead SOIC IRS211SPbF -Lead SOIC Tape & Reel IRS2117STRPbF -Lead SOIC Tape & Reel IRS211STRPbF The SOIC- is MSL2 qualified. This product has been designed and qualified for the industrial level. Qualification standards can be found at www.irf.com IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 9245 Tel: (31) 252-715 Data and specifications subject to change without notice. 11/2/2 www.irf.com 19