Micro Power Boost Regulator Series White LED Driver

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Micro Power Boost Regulator Series White LED Driver FEATURES High Output Voltage: Up to 0V Optimized for Single Supply,.7V -.V Applications Operated Down to V High Efficiency: Greater Than 75% Low Quiescent Current: 0µA Ultra Low Shutdown Current: 0nA Single Battery Cell Operation Programmable Output Voltage Ω switch (50mV at 50mA) Miniature Package: 8 Pin DFN, 5 Pin TSOT or 5 Pin SOT- NC FB NC SW 8 Pin DFN Now Available in Lead Free Packaging APPLICATIONS White LED Driver High Voltage Bias Digital Cameras Cell Phone Battery Backup Handheld Computers 8 7 6 5 NC GND DESCRIPTION The is a micro power boost regulator that is specifically designed for powering series configuration white LED. The part utilizes fixed off time architecture and consumes only 0nA quiescent current in shutdown. Low voltage operation, down to V, fully utilizes maximal battery life. The is offered in a 8 pin DFN, 5 pin TSOT or 5 pin SOT- package and enables the construction of a complete regulator occupying < 0. in board space. TYPICAL APPLICATION CIRCUIT 0µH.7 to.v L D SW 0mA FB C. µf.7µf C GND R b 60.

ABSOLUTE MAXIMUM RATINGS... 5V SW Voltage... -0. to V FB Voltage....5V All other pins... -0. to + 0.V Current into FB... ±ma T J Max... 5 C Operating Temperature Range... -0 C to 85 C Peak Output Current < 0us SW... 500mA Storage Temperature... -65 C to +50 C Power Dissipation.... 00mW ESD Rating... kv HBM These are stress ratings only and functional operation of the device at these ratings or any other above those indicated in the operation sections of the specifications below is not implied. Exposure to absolute maximum rating conditions for extended periods of time may affect reliability. ELECTRICAL CHARACTERISTICS Specifications are at T A = 5 C, =., V =, denotes the specifications which apply over the full operating temperature range, unless otherwise specified. PARAMETER SYMBOL MIN TYP MAX UNITS CONDITIONS Input Voltage.0.5 V Supply Current I Q 0 0 µa No Switching 0.0 µa = 0V (off) Reference Voltage V FB.7..7 V FB Hysteresis HYST 8 mv V FB Input Bias Current I FB 5 80 na V FB =.V Line Regulation V o / V I 0. 0. %/V..5V Switch Off Time T OFF 50 ns V FB > V 00 ns V FB < 0.V Switch Saturation Voltage V CESAT 70 50 mv I SW = 50mA Switch Current Limit I LIM 50 50 50 ma Bias Current I 5 µa V =.V High Threshold (on) V IH 0.9 V Low Threshold (off) V IL 0.5 V Switch Leakage Current I SWLK 0.0 5 µa Switch Off, V SW = 5V

PIN DESCRIPTION PIN NUMBER PIN NAME 8 PIN DFN DESCRIPTION NC No connect. FB Feedback. NC No connect. SW Switch input to the internal power switch 5 GND Ground 6 Input Voltage. Bypass this pin with a capacitor as close to the device as possible. 7 Shutdown. Pull high (on) to enable. Pull low (off) for shutdown. 8 NC No connect. PIN NUMBER PIN NAME 5 PIN SOT- / TSOT DESCRIPTION SW Switch input to the internal power switch. GND Ground FB Feedback Shutdown. Pull high (on) to enable. Pull low (off) for shutdown. 5 Input Voltage. Bypass this pin with a capacitor as close to the device as possible. PACKAGE: PINOUTS 5 5 Pin TSOT SW GND FB 5 Pin SOT- SW GND FB NC FB NC 8 Pin DFN 8 7 6 NC SW 5 GND

FUNCTIONAL DIAGRAM 5 VIN SW R R FB Q R Q + - X DISABLE POWER SET TRANSISTOR 50ns ONE-SHOT DRIVER CLEAR X + R - 5.5mV 0.5 GND Shutdown Logic THEORY OF OPERATION General Overview: Operation can be best understood by referring to the functional diagram above and the typical application circuit on the front page. Q and Q along with R and R form a band gap reference. The input to this circuit completes a feedback path from the high voltage output through a voltage divider, and is used as the regulation control input. When the voltage at the FB pin is slightly above.v, comparator X disables most of the internal circuitry. Current is then provided by capacitor C, which slowly discharges until the voltage at the FB pin drops below the lower hysteresis point of X, about 6mV. X then enables the internal circuitry, turns on chip power, and the current in the inductor begins to ramp up. When the current through the driver transistor reaches about 50mA, comparator X clears the latch, which turns off the driver transistor for a preset 50nS. At the instant of shutoff, inductor current is diverted to the output through diode D. During this 50nS time limit, inductor current decreases while its energy charges C. At the end of the 50ns time period, driver transistor is again allowed to turn on which ramps the current back up to the 50mA level. Comparator X clears the latch, it s output turns off the driver transistor, and this allows delivery of L s stored kinetic energy to C. This switching action continues until the output capacitor voltage is charged to the point where FB is at band gap (.V). When this condition is reached, X turns off the internal circuitry and the cycle repeats. The contains circuitry to provide protection during start-up and while in short-circuit conditions. When FB pin voltage is less than approximately 00mV, the switch off time is increased to about.us and the current limit is reduced to about 70% of its normal value. While in this mode, the average inductor current is reduced and helps minimize power dissipation in the, the external inductor and diode.

PERFORMANCE CHARACTERISTICS Refer to the typical application circuit, T AMB = 5 C, unless otherwise specified. Efficiency (%) Vout = V Efficiency 90 80 70 60 50 0 0 0 60 80 00 0 0 Figure. V Output Efficiency Vout (V).0.5.0.5.0 Vout = V Load Regulation 0 0 0 60 80 00 0 0 Figure. V Output Load Regulation 90 Vout = 5V Efficiency 6.0 Vout = 5V Load Regulation Efficiency (%) 80 70 60 Vout (V) 5.5 5.0.5 50 0 0 0 0 0 50 60 70 80 90 00.0 0 0 0 0 0 50 60 70 80 90 00 Figure. 5V Output Efficiency Figure. 5V Output Load Regulation 90 Vout = 8V Efficiency 9.0 Vout = 8V Load Regulation Efficiency (%) 80 70 60 Vout (V) 8.5 8.0 7.5 50 0 0 0 0 0 50 60 70 80 7.0 0 0 0 0 0 50 60 70 80 Figure 5. 8V Output Efficiency Figure 6. 8V Output Load Regulation 5

PERFORMANCE CHARACTERISTICS Refer to the typical application circuit, T AMB = 5 C, unless otherwise specified. 90 Vout = V Efficiency.5 Vout = V Load Regulation 80.0 Efficiency (%) 70 60 Vout (V) 0.5 0.0 50 0 0 0 0 0 50 60 9.5 0 0 0 0 0 50 60 Figure 7. V Output Efficiency Figure 8. V Output Load Regulation 90 80 Vout = V Efficiency.5.0 Vout = V Load Regulation Efficiency (%) 70 60 Vout (V).5.0 50 0 5 0 5 0 5 0 5 0.5 0 5 0 5 0 5 0 5 0 Figure 9. V Output Efficiency Figure 0. V Output Load Regulation Efficiency (%) Vout = 0V Efficiency 90 80 70 60 50 0 0 5 0 5 0 5 0 Vout (V) Vout = 0V Load Regulation 0.5 0.0 9.5 9.0 8.5 0 5 0 5 0 5 0 Figure. 0V Output Efficiency Figure. 0V Output Load Regulation 6

PERFORMANCE CHARACTERISTICS Refer to the typical application circuit, T AMB = 5 C, unless otherwise specified. 5 0 Quiescent Current (ua) 0 5 0 5 Tamb=-5C Tamb=5C Tamb=85C Shutdown Pin Current (µa) 8 6 0..8..6..8 5. 0..8..6..8 5. Input Voltage (V) Input Voltage (V) Figure. Quiescent Current I Q vs. Figure. Shutdown Pin Current vs. 600 00 Ipk Current Limit (ma) 500 00 00 00 00 0..8..6..8 5. Input Voltage (V) Switch Saturation Voltage (mv) 50 00 50 00 50 00 50 0-0 -0 0 0 50 70 90 Temperature ( C) Figure 5. I PK Current Limit vs. Figure 6. Switch Saturation Voltage V CESAT vs. Temperature (I SW = 50mA).5 0 Feedback Voltage (V).... Average Output Current (ma) 6 8.0-0 -0 0 0 50 70 90 Temperature ( C) 0 0 0 0 60 80 00 PWM Duty Cycle (%) Figure 7. Feedback Voltage vs. Temperature Figure 8. Average I O vs. Duty Cycle (VIN =.V, Standard x0ma WLED Evaluation Board, PWM Frequency 00Hz) 7

PERFORMANCE CHARACTERISTICS Refer to the typical application circuit, T AMB = 5 C, unless otherwise specified. VSW V OUT I L (0.5A/DIV) I IN (0.A/DIV) V OUT (AC) Figure 9. Startup Waveform ( =.V, V OUT =5V, I OUT =0mA) Figure 0. Typical Switching Waveforms ( =V, V OUT =5V, I OUT =0mA) I OUT (0mA/DIV) V OUT (AC) I L (0.5A/DIV) Figure. Load Step Transient ( =V, V OUT =V, 5mA Load Step 8

APPLICATION INFORMATION Inductor Selection For, the internal switch will be turned off only after the inductor current reaches the typical dc current limit (I LIM =50mA). However, there is typically propagation delay of 00nS between the time when the current limit is reached and when the switch is actually turned off. During this 00nS delay, the peak inductor current will increase, exceeding the current limit by a small amount. The peak inductor current can be estimated by: I PK = I LIM + (MAX) 00nS L The larger the input voltage and the lower the inductor value, the greater the peak current. In selecting an inductor, the saturation current specified for the inductor needs to be greater than the peak current to avoid saturating the inductor, which would result in a loss in efficiency and could damage the inductor. Choosing an inductor with low DCR decreases power losses and increase efficiency. Refer to Table for some suggested low ESR inductors. Table. Suggested Low ESR inductor MANUF. PART NUMBER DCR Current (Ω) Rating (ma) MURATA LQHCN00K 0. 50 770-6-00 (0µH) TDK NLC5T-00K 0.55 500 87-80-600 (0µH) Diode Selection A schottky diode with a low forward drop and fast switching speed is ideally used here to achieve high efficiency. In selecting a Schottky diode, the current rating of the schottky diode should be larger than the peak inductor current. Moreover, the reverse breakdown voltage of the schottky diode should be larger than the output voltage. Capacitor Selection Ceramic capacitors are recommended for their inherently low ESR, which will help produce low peak to peak output ripple, and reduce high frequency spikes. For the typical application,.7µf input capacitor and.µf output capacitor are sufficient. The input and output ripple could be further reduced by increasing the value of the input and output capacitors. Place all the capacitors as close to the as possible for layout. For use as a voltage source, to reduce the output ripple, a small feedforward (7pF) across the top feedback resistor can be used to provide sufficient overdrive for the error comparator, thus reduce the output ripple. Refer to Table for some suggested low ESR capacitors. Table. Suggested Low ESR Capacitor MANUF. PART NUMBER CAP SIZE /VOLTAGE /TYPE MURATA GRMRR7E.µF 0 770-6-00 5KC0B /5V /X5R MURATA GRMCR6A.7µF 06 770-6-00 75KA0B /0V /X5R TDK C5X7RE.µF 0 87-80-600 5M /5V /X7R TDK C6X5RA.7µF 06 87-80-600 75K /0V /X5R LED Current Program In the white LEDs application, the is generally programmed as a current source. The bias resistor R b, as shown in the typical application circuit is used to set the operating current of the white LED using the equation: R b = V FB I F where V FB is the feedback pin voltage (.V), I F is the operating current of the White LEDs. In order to achieve accurate LED current, % 9

APPLICATION INFORMATION precision resistors are recommended. Table below shows the R b selection for different white LED currents. For example, to set the operating current to be 0mA, R b is selected as 60. Ω, as shown in the schematic. Table. Bias Resistor Selection I F (ma) R b (Ω) 5 0 0 5 80.6 0 60. Output Voltage Program The can be programmed as either a voltage source or a current source. To program the as voltage source, the requires feedback resistors R & R to control the output voltage. As shown in Figure. VIN C 5 L U G ND SW.V Figure. Using as Voltage Source D C R R VOUT The formula and table for the resistor selection are shown below: FB Table. Divider Resistor Selection V OUT (V) R (Ω) R (Ω) M K 5 M 88.7K 8 M 7.K M 6.9K 0 M.K Brightness Control Dimming control can be achieved by applying a PWM control signal to the pin. The brightness of the white LEDs is controlled by increasing and decreasing the duty cycle of The PWM signal. A 0% duty cycle corresponds to zero LED current and a 00% duty cycle corresponds to full load current. While the operating frequency range of the PWM control is from 60Hz to 700Hz, the recommended maximum brightness frequency range of the PWM signal is from 60Hz to 00Hz. A repetition rate of at least 60Hz is required to prevent flicker. The magnitude of the PWM signal should be higher than the minimum voltage high. Open Circuit Protection When any white LED inside the white LED module fails or the LED module is disconnected from the circuit, the output and the feedback control will be open, thus resulting in a high output voltage, which may cause the SW pin voltage to exceed it maximum rating. In this case, a zener diode can be used at the output to limit the voltage on the SW pin and protect the part. The zener voltage should be larger than the maximum forward voltage of the White LED module. R =( V OUT - ) R. 0

APPLICATION INFORMATION Layout Consideration Both the input capacitor and the output capacitor should be placed as close as possible to the IC. This can reduce the copper trace resistance which directly effects the input and output ripples. The feedback resistor network should be kept close to the FB pin to minimize copper trace connections that can inject noise into the system. The ground connection for the feedback resistor network should connect directly to the GND pin or to an analog ground plane that is tied directly to the GND pin. The inductor and the schottky diode should be placed as close as possible to the switch pin to minimize the noise coupling to the other circuits, especially the feedback network. Power Efficiency For the typical application circuit, the output efficiency of the circuit is expressed by η = V OUT I OUT I IN Where, I IN, V OUT, I OUT are the input and output voltage and current respectively. While the white LED efficiency is expressed by η = (V OUT -.) I OUT I IN This equation indicates that the white LED efficiency will be much smaller than the output efficiency of the circuit when V OUT is not very large, compared to the feedback voltage (.V). The other power is consumed by the bias resistor. To reduce this power loss, two circuits can be used, as shown in Figure and Figure. In Figure, a general-purpose diode (for example, N8) is used to bring the voltage across the bias resistor to be around 0.7V. R is used to create a loop that provides around 00µA operating current for the diode. % efficiency improvement can be achieved by using this VIN.7-.V C.7uF method. Figure. Improve Efficiency with Diode in Feedback Loop To further improve the efficiency and reduce the effects of the ambient temperature on the diode D used in method, an op amp circuit can be used as shown in Figure. The gain of the op amp circuit can be calculated by: Av = R + R R Murata LQHCN00K L 0uH 0.5A 5 U GND SW FB DS MBR050.V C.uF R 50Kohm If the voltage across the bias resistor is set to be 0.V the current through R and R to be around 00µA, R and R can be selected as K and.k respectively. LMV can be used because of its small supply current, offset voltage and minimum supply voltage. By using this method, the efficiency can be increased around Vbattery Murata LQHCN00K.7-.V L 0uH 0.5A C.7uF C.uF 5 U V S W IN 5 GND FB.V DS MBR050 R OUT.K Vbattery LMV 6 D DIODE + - White LED Module R K 0.7V Rb.8ohm White LED Module 7%. Figure. Improve Efficiency with Op Amp in Feedback Loop 0.V Rb 5.Ω

PACKAGE: 5 PIN TSOT D e N N/ + E E/ E/ E B B VIEW A-A SEE VIEW C INDEX AREA (D/ X E/) e N/ Ø b 5 Pin TSOT JEDEC MO-9 (AB) Variation SYMBOL MIN NOM MAX A - -. A 0-0. A 0.7 0.9 b 0. - 0.5 c 0.08-0. D e e E E L 0..90 BSC 0.95 BSC.90 BSC.80 BSC.60 BSC 0.5 0.6 L L ø 0º 0.60 REF 0.5 BSC º 8º ø º 0º º Seating Plane ø L L A A A VIEW C SIDE VIEW WITH PLATING b c Gauge Plane ø SEATING PLANE C Note: Dimensions in (mm) BASE METAL SectionB-B

PACKAGE: 5 PIN SOT- D e N N/ + E E/ E/ E B B SEE VIEW C VIEW A-A N/ e Ø b 5 Pin SOT- JEDEC MO-78 (AA) Variation SYMBOL MIN NOM MAX A - -.5 A 0-0.5 A 0.9.5. b 0. - 0.5 c 0.08-0. D E E e e L 0..90 BSC.80 BSC.60 BSC 0.95 BSC.90 BSC 0.5 0.6 L L Ø 0º 0.60 REF 0.5 BSC º 8º ø 5º 0º 5º Gauge Plane L Seating Plane Ø L Ø L VIEW C A A Seating Plane A SIDE VIEW b WITH PLATING c Note: Dimensions in (mm) BASE METAL SECTION B-B

PACKAGE: 8 PIN DFN D D/ A E/ E Top View A A Side View D x 8 Pin DFN JEDEC MO-9 (VCED-) VARIATION SYMBOL MIN NOM MAX A 0.8 0.9 A 0 0.0 0.05 A b 0.8 0.0 REF 0.5 0. D D.5.00 BSC.75 e - 0.5 - E E.6.00 BSC -.9 K 0. - - L 0. 0. 0.5 K L e b E Note: Dimensions in (mm) Bottom View

Part Number Topmark Temperature Range Package Type EK... PWW... -0 C to +85 C... 5 Pin TSOT EK/TR... PWW... -0 C to +85 C... 5 Pin TSOT EK... CWW... -0 C to +85 C... 5 Pin SOT- EK/TR... CWW... -0 C to +85 C... 5 Pin SOT- ER... 6690ES... -0 C to +85 C... 8 Pin DFN ER/TR... 6690ES... -0 C to +85 C... 8 Pin DFN Available in lead free packaging. To order add "-L" suffix to part number. Example: ER/TR = standard; ER-L/TR = lead free /TR = Tape and Reel Pack quantity is,500 for TSOT or SOT- and,000 for DFN. CLICK HERE TO ORDER SAMPLES ORDERING INFORMATION Corporation ANALOG EXCELLENCE Sipex Corporation Headquarters and Sales Office South Hillview Drive Milpitas, CA 9505 TEL: (08) 9-7500 FAX: (08) 95-7600 Sipex Corporation reserves the right to make changes to any products described herein. Sipex does not assume any liability arising out of the application or use of any product or circuit described herein; neither does it convey any license under its patent rights nor the rights of others. 5