December 2013 HI8421, HI8424 6Channel / 8Channel DiscretetoDigital Interface Sensing 28V / Open Signals DESCRIPTION The HI8421 is a six channel discretetodigital interface device.the HI8424 has eight channels. Mixedsignal CMOS technology is used to provide superior lowpower performance. The device inputs are configured to sense 28V / Open discrete signals. The device outputs are CMOS / TTL compatible and may be disabled (tristate) using the and pins. FEATURES 6 or 8 independent 28V / Open sensing channels 5.0V single supply operation Low power CMOS technology Industrial and Extended Temperatures The HI8421 is a dropin replacement for the DEI1054. HI8421 is a drop in replacement for DEI1054 For added functionality, the Holt HI8422 offers eight channels of Open / Ground sensing and eight channels of 28V / Ground sensing in a single device. BLOCK DIAGRAM VDD IN1 IN2 IN3 IN4 IN5 IN6 IN7 IN8 GND 3.6V Reference OUT1 OUT2 OUT3 OUT4 OUT5 OUT6 OUT7 OUT8 PIN CONFIGURATIONS IN1 1 IN2 2 IN3 3 IN4 4 IN5 5 IN6 6 7 8 HI8421PSI HI8421PST FUNCTION TABLE 16 GND 15 OUT1 14 OUT2 13 OUT3 12 OUT4 11 OUT5 10 OUT6 9 VDD 16Pin Plastic SOIC package (Narrow Body) IN1 1 IN2 2 IN3 3 IN4 4 IN5 5 IN6 6 IN7 7 8 9 VDD 10 HI8424PTI HI8424PTT 20 Pin TSSOP package 20 GND 19 OUT1 18 OUT2 17 OUT3 16 IN8 15 OUT4 14 OUT5 13 OUT6 12 OUT7 11 OUT8 Discrete Output Input Open 0 0 1 28 Volts 0 0 0 X 1 X High Z X X 1 High Z (DS8421 Rev. G) www.holtic.com 12/13
HI8421, HI8424 PIN DESCRIPTIONS PIN SYMBOL FUNCTION DESCRIPTION (HI8421) (HI8424) 1 1 IN1 Discrete Input 28 Volt / Open sensing input, channel 1 2 2 IN2 Discrete Input 28 Volt / Open sensing input, channel 2 3 3 IN3 Discrete Input 28 Volt / Open sensing input, channel 3 4 4 IN4 Discrete Input 28 Volt / Open sensing input, channel 4 5 5 IN5 Discrete Input 28 Volt / Open sensing input, channel 5 6 6 IN6 Discrete Input 28 Volt / Open sensing input, channel 6 7 IN7 Discrete Input 28 Volt / Open sensing input channel 7 7 8 Digital input Output Enable. OUT1OUT8 are highimpedance if is high 8 9 Digital input Chip Enable. OUT1OUT8 are highimpedance if is high 9 10 VDD Power Positive supply voltage 5.0 V 11 OUT8 Tristate output Logic output, channel 8 12 OUT7 Tristate output Logic output, channel 7 10 13 OUT6 Tristate output Logic output, channel 6 11 14 OUT5 Tristate output Logic output, channel 5 12 15 OUT4 Tristate output Logic output, channel 4 16 IN8 Discrete Input 28 Volt / Open sensing input, channel 8 13 17 OUT3 Tristate output Logic output, channel 3 14 18 OUT2 Tristate output Logic output, channel 2 15 19 OUT1 Tristate output Logic output, channel 1 16 20 GND Power Ground ABSOLUTE MAXIMUM RATINGS RECOMMENDED OPERATING CONDITIONS Supply voltage ( VDD) 0.3 V to 7 V Logic input voltage range 0.3 V to 5.5 V Discrete input voltage range 80 V to 80 V Power dissipation at 25 C 350 mw Solder temperature (reflow) 260 C Storage temperature 65 C to 150 C Supply Voltage VDD... 4.5 V to 5.5 V Operating Temperature Range Industrial Screening... 40 C to 85 C HiTemp Screening... 55 C to 125 C NOTE: Stresses above absolute maximum ratings or outside recommended operating conditions may cause permanent damage to the device. These are stress ratings only. Operation at the limits is not recommended. ELECTRICAL CHARACTERISTICS VDD = 5.0V ± 10%, GND = 0V, T A = Operating Temperature Range (unless otherwise specified). PARAMETER SYMBOL CONDITION MIN TYP MAX UNITS DISCRETE INPUTS Open state input voltage VSO Input voltage to give high output 5 10 V 28 V state input voltage VS28 Input voltage to give low output 14 V Open state input current ISO Maximum input current 84 to give high output 28 V state input current IS28 Minimum input current 197 to give low output Input resistance RIN 0V < V IN < 16V 71 119 K Input current at 28 V IIN28 V IN = 28 V 394 2
HI8421, HI8424 ELECTRICAL CHARACTERISTICS (Cont.) VDD = 5.0V ± 10%, GND = 0V, T A = Operating Temperature Range (unless otherwise specified). PARAMETER SYMBOL CONDITION MIN TYP MAX UNITS LOGIC INPUTS (, ) Input Voltage Input voltage HI VIH 2.0 V Input voltage LO VIL 0.8 V Input current Input sink IIH V IH = VDD 1.0 Input source IIL V IL = 0 V 1.0 OUTPUTS Logic output voltage High VOH I OH = 5 ma 2.4 V Low VOL I OL = 5 ma 0.4 V Logic output voltage (CMOS) High VOH I OH = 100 ua VDD 0.2 V Low VOL IOL = 100 ua 0.2 V Tristate output current IOZ V OUT = 0VorVDD ± 10 SUPPLY CURRENT VDD current IDD V IN = 0 V (all inputs) 5 10 ma SWITCHING CHARACTERISTICS Propagation delay IN to OUT t LH, thl 500 ns Output enable time t ZL, tzh From or 25 ns Output disable time t LZ, thz From or 25 ns TIMING DIAGRAMS or INx t ZL,tZH t ZL,tZH thl tlh OUTx OUTx Output Enable Timing Input to Output Propagation Delay ORDERING INFORMATION HI 842xxx x x Blank F LEAD FINISH Tin / Lead (Sn / Pb) Solder 100% Matte Tin (Pbfree, RoHS compliant) TEMPERATURE RANGE FLOW BURN IN I T 40 C TO 85 C 55 C TO 125 C I T NO NO 8421PS 8424PT PACKAGE DESCRIPTION 16 PIN PLASTIC NARROW BODY SOIC (16HN) 20 PIN PLASTIC TSSOP (20HT) 3
HI8421, HI8424 REVISION HISTORY P/N Rev Date Description of Change DS8421 F 08/04/10 Removed reference to lightning protection throughout datasheet and added reference to available temperature ranges. G 12/10/13 Update package information. Update solder reflow temperature in Absolute Maximum Ratings table. 4
PACKAGE DIMENSIONS 16PIN PLASTIC SMALL OUTLINE (SOIC) NB (Narrow Body) millimeters (inches) Package Type: 16HN 9.90 (0.390) BSC 0.175 ± 0.075 (0.007 ± 0.003) 6.00 Top View (0.236) BSC 3.90 (0.154) BSC 0.410 ± 0.100 (0.016 ± 0.004) See Detail A 1.25 (0.049) min 1.27 BSC (0.050) BSC = Basic Spacing between Centers is theoretical true position dimension and has no tolerance. (JEDEC Standard 95) 0 to 8 0.835 ± 0.435 (0.033 ± 0.017) Detail A 0.175 ± 0.075 (0.007 ± 0.003) 20PIN PLASTIC TSSOP millimeters(inches) Package Type: 20HS 6.500 ± 0.100 (0.256 ±.004) 0.145 ± 0.055 (0.006 ± 0.002) 6.400 ± 0.150 (0.252 ± 0.006) Pin 1 4.400 ± 0.100 (0.173 ± 0.004) See Detail A 0.220 ± 0.050 (0.0087 ± 0.002) 0.925 ± 0.125 (0.036 ± 0.005) 0.650 0 to 8 (0.026) BSC 0.600 ± 0.150 BSC = Basic Spacing between Centers (0.024 ± 0.006) is theoretical true position dimension and has no tolerance. (JEDEC Standard 95) Detail A 0.100 ± 0.050 (0.004 ± 0.002) 5