MC10H352. Quad CMOS to PECL* Translator

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Quad CMOS to PECL* Translator Description The MC10H352 is a quad translator for interfacing data between a CMOS logic section and the PECL section of digital systems when only a +5.0 Vdc power supply is available. The MC10H352 has CMOS compatible inputs and PECL complementary open emitter outputs that allow use as an inverting/non inverting translator or as a differential line driver. When the common strobe input is at a low logic level, it forces all true outputs to the PECL low logic state ( +3.2 V) and all inverting outputs to the PECL high logic state ( +4.1 V). The MC10H352 can also be used with the MC10H350 to transmit and receive CMOS information differentially via balanced twisted pair lines. Features Single +5.0 V Power Supply All V CC Pins Isolated On Chip Differentially Drive Balanced Lines t pd = 1.3 nsec Typical Pb Free Packages are Available* PDIP P SUFFIX CASE 738 MARKING DIAGRAMS* 1 10H352G AWLYYWW 1 MC10H352P AWLYYWWG 1 PLLC FN SUFFIX CASE 775 A WL YY WW G = Assembly Location = Wafer Lot = Year = Work Week = Pb Free Package *For additional marking information, refer to Application Note AND8002/D. ORDERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page 4 of this data sheet. *For additional information on our Pb Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. Semiconductor Components Industries, LLC, 06 February, 06 Rev. 7 1 Publication Order Number: MC10H352/D

1 ECL V CC B IN 7 1 2 A IN D IN C IN 8 12 14 5 4 16 17 19 C OUT COMMON STROBE 9 18 C OUT V CC (+5.0 VDC) = PINS 6, 11, 15, GND = PIN 10 Figure 1. Logic Diagram N.C. V CC B IN A IN COMMON STROBE GND 2 3 4 5 6 7 8 9 10 C OUT C OUT V CC 2 C IN N.C. Pin assignment is for Dual in Line Package. For PLCC pin assignment, see the Pin Conversion Tables on page 18 of the ON Semiconductor MECL Data Book (DL122/D). Figure 2. Pin Assignment 19 18 17 16 15 14 13 12 11 D IN CMOS V CC Table 1. MAXIMUM RATINGS Symbol Characteristic Rating Unit V CC Power Supply 0 to +7.0 Vdc V I Input Voltage (V CC = 5.0 V) 0 to V CC Vdc I out Output Current Continuous Surge T A Operating Temperature Range 0 to +75 C T stg Storage Temperature Range Plastic Ceramic 50 100 55 to +150 55 to +165 Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied, damage may occur and reliability may be affected. ma C 2

Table 2. ELECTRICAL CHARACTERISTICS (V CC = V CC1 = V CC2 = 5.0 V ± 5.0%) (Note 1) 0 25 75 Symbol Characteristic Min Max Min Max Min Max Unit ECL Power Supply 50 45 50 ma TTL Current 15 ma I R I F V (BR)in V I V OH V OL Reverse Current Pins 7, 8, 12, 14 Pin 9 Forward Current Pins 7, 8, 12, 14 Pin 9 Input Voltage Breakdown Input Clamp Voltage (I in = 18 ma) High Output Voltage (Note 2) Low Output Voltage (Note 2) 25 100 0.8 3.2 80 0.6 2.4 25 100 0.8 3.2 5.5 5.5 5.5 Vdc A ma 1.5 1.5 1.5 Vdc 3.98 4.16 4.02 4.19 4.08 4.27 Vdc 3.05 3.37 3.05 3.37 3.05 3.37 Vdc V IH High Input Voltage 3.15 3.15 3.15 Vdc V IL Low Input Voltage 1.5 1.5 1.5 Vdc *Positive Emitter Coupled Logic 1. Each MECL 10H series circuit has been designed to meet the dc specifications shown in the test table, after thermal equilibrium has been established. The circuit is in a test socket or mounted on a printed circuit board and transverse air flow greater than 500 lfpm is maintained. Outputs are terminated through a 50 resistor to V CC 2.0 Vdc. 2. With V CC at 5.0 V. V OH /V OL change 1:1 with V CC. Table 3. AC PARAMETERS 0 25 75 Symbol Characteristic Min Max Min Max Min Max Unit t pd Propagation Delay (Note 3) 0.4 1.9 0.4 2.0 0.4 2.1 ns t r Rise Time (% to 80%) 0.4 1.9 0.4 2.0 0.4 2.1 ns t f Fall Time (80% to %) 0.4 1.9 0.4 2.0 0.4 2.1 ns f max Maximum Operating Frequency 150 150 150 MHz NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit values are applied individually under normal operating conditions and not valid simultaneously. 3. Propagation delay is measured on this circuit from V CC /2 on the input waveform to the 50% point on the output waveform. 3

ORDERING INFORMATION Device Package Shipping MC10H352FN PLLC 46 Units / Rail MC10H352FNG PLLC (Pb Free) 46 Units / Rail MC10H352FNR2 PLLC 500 / Tape & Reel MC10H352FNR2G PLLC (Pb Free) 500 / Tape & Reel MC10H352P PDIP 18 Unit / Rail MC10H352PG PDIP (Pb Free) 18 Unit / Rail For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. 4

PACKAGE DIMENSIONS LEAD PLLC CASE 775 02 ISSUE E B N Y BRK U D L M Z W 1 D X G1 0.010 (0.250) S T L M S N S V VIEW D D A Z R H C G G1 0.010 (0.250) S T L M S N S E 0.004 (0.100) J T SEATING PLANE VIEW S K1 K VIEW S NOTES: 1. DIMENSIONS AND TOLERANCING PER ANSI Y14.5M, 1982. 2. DIMENSIONS IN INCHES. 3. DATUMS L, M, AND N DETERMINED WHERE TOP OF LEAD SHOULDER EXITS PLASTIC BODY AT MOLD PARTING LINE. 4. DIMENSION G1, TRUE POSITION TO BE MEASURED AT DATUM T, SEATING PLANE. 5. DIMENSIONS R AND U DO NOT INCLUDE MOLD FLASH. ALLOWABLE MOLD FLASH IS 0.010 (0.250) PER SIDE. 6. DIMENSIONS IN THE PACKAGE TOP MAY BE SMALLER THAN THE PACKAGE BOTTOM BY UP TO 0.012 (0.300). DIMENSIONS R AND U ARE DETERMINED AT THE OUTERMOST EXTREMES OF THE PLASTIC BODY EXCLUSIVE OF MOLD FLASH, TIE BAR BURRS, GATE BURRS AND INTERLEAD FLASH, BUT INCLUDING ANY MISMATCH BETWEEN THE TOP AND BOTTOM OF THE PLASTIC BODY. 7. DIMENSION H DOES NOT INCLUDE DAMBAR PROTRUSION OR INTRUSION. THE DAMBAR PROTRUSION(S) SHALL NOT CAUSE THE H DIMENSION TO BE GREATER THAN 0.037 (0.940). THE DAMBAR INTRUSION(S) SHALL NOT CAUSE THE H DIMENSION TO BE SMALLER THAN 0.025 (0.635). F INCHES MILLIMETERS DIM MIN MAX MIN MAX A 0.385 0.395 9.78 10.03 B 0.385 0.395 9.78 10.03 C 0.165 0.180 4. 4.57 E 0.090 0.110 2.29 2.79 F 0.013 0.019 0.33 0.48 G 0.050 BSC 1.27 BSC H 0.026 0.032 0.66 0.81 J 0.0 0.51 K 0.025 0.64 R 0.350 0.356 8.89 9.04 U 0.350 0.356 8.89 9.04 V 0.042 0.048 1.07 1.21 W 0.042 0.048 1.07 1.21 X 0.042 0.056 1.07 1.42 Y 0.0 0.50 Z 2 10 2 10 G1 0.310 0.330 7.88 8.38 K1 0.040 1.02 5

PACKAGE DIMENSIONS T SEATING PLANE 1 G E A F 11 10 D PL N B PDIP P SUFFIX PLASTIC DIP PACKAGE CASE 738 03 ISSUE E K C 0.25 (0.010) M T A M L M J PL 0.25 (0.010) M T B M NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. DIMENSION L TO CENTER OF LEAD WHEN FORMED PARALLEL. 4. DIMENSION B DOES NOT INCLUDE MOLD FLASH. INCHES MILLIMETERS DIM MIN MAX MIN MAX A 1.010 1.070 25.66 27.17 B 0.240 0.260 6.10 6.60 C 0.150 0.180 3.81 4.57 D 0.015 0.022 0.39 0.55 E 0.050 BSC 1.27 BSC F 0.050 0.070 1.27 1.77 G 0.100 BSC 2.54 BSC J 0.008 0.015 0.21 0.38 K 0.110 0.140 2.80 3.55 L 0.300 BSC 7.62 BSC M 0 15 0 15 N 0.0 0.040 0.51 1.01 MECL 10H is a trademark of Motorola, Inc. ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Typical parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including Typicals must be validated for each customer application by customer s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 61312, Phoenix, Arizona 85082 1312 USA Phone: 480 829 7710 or 800 344 3860 Toll Free USA/Canada Fax: 480 829 7709 or 800 344 3867 Toll Free USA/Canada Email: orderlit@onsemi.com N. American Technical Support: 800 282 9855 Toll Free USA/Canada Japan: ON Semiconductor, Japan Customer Focus Center 2 9 1 Kamimeguro, Meguro ku, Tokyo, Japan 153 0051 Phone: 81 3 5773 3850 6 ON Semiconductor Website: Order Literature: http://www.onsemi.com/litorder For additional information, please contact your local Sales Representative. MC10H352/D