Reserch Letters in Electronics Volume 29, Article ID 53589, 4 pges doi:1.1155/29/53589 Reserch Letter Investigtion of CMOS Vrctors for High-GHz-Rnge Applictions Ming Li, Rony E. Amy, Roert G. Hrrison, nd N. Grry Trr Deprtment of Electronics, Crleton University, Ottw, ON, Cnd K1S 5B6 Correspondence should e ddressed to Ming Li, mli@doe.crleton.c Received 19 Jnury 29; Accepted 2 June 29 Recommended y João Antonio Mrtino This pper explores vriety of different CMOS vrctor structures for RF nd MMICs. A typicl.18 μm CMOS foundry process ws used s the study pltform. The vrctors cpcitnce-voltge chrcteristics nd cutoff frequencies hve een exmined up to. The primry im of this work is to design vrctors tht cn improve nonliner-trnsmission-line (NLTL) pulsecompression circuits. The results should lso e vlule for other pplictions up to millimeter wvelengths. Copyright 29 Ming Li et l. This is n open ccess rticle distriuted under the Cretive Commons Attriution License, which permits unrestricted use, distriution, nd reproduction in ny medium, provided the originl work is properly cited. 1. Introduction Fst-developing CMOS technologies, with cutoff frequencies over 2 GHz [1], hve mde millimeter-wve silicon RF nd MMICs relity [2, 3]. These devices help fill the demnd for low-cost, low-power, nd compct wireless communiction products. CMOS vrctors, s key components in mny RFICs, hve received much ttention [2 5]. In [6] we discussed six different CMOS vrctor structures. They were divided into two groups: one group with monotonic, the other with nonmonotonic C(V)s. Two of the structures were mnufctured in.18-μm CMOS foundry technologyndweretestedupto26ghz.thecpcitncevoltge chrcteristics C(V)s nd cutoff frequencies of ll six structures were investigted nd compred for pulsecompression pplictions. We developed strtegy to generte CMOS vrctors with nonliner cpcitnces tht re suitle for either single-edge or doule-edge pulse compression. Very few pulictions hve discussed the ehvior of CMOS vrctors ove 5 GHz [2, 3]. Pper [4] givesvery good overview of CMOS vrctor structures ut covers only up to 5 GHz. Pper [5] hs good discussion of CMOS vrctors, ut the nlysis is sed on stndrd foundry-supplied models, which do not normlly extend ove 2 GHz rnge. Here we extend our vrctor study to, nd we focus on four of the six vrctor structures. Figure 1 shows n AMOS (ccumultion-mode MOS) vrctor, nd Figure 1 n IMOS (inversion-mode MOS) vrctor. Both hve monotonic C(V) chrcteristics. Figure 1 depicts stndrd NMOS vrctor in which the source-drin is connecting to the ulk nd producing nonmonotonic C(V). The structure in Figure 1 hs differently doped source nd drin; we cll this device n SnDp (N-type source, P-type drin). Its C(V) is lso nonmonotonic. As pointed out in [6], monotonic C(V) is eneficil for single-edge pulse compression while nonmonotonic C(V) is more suited for doule-edge pulse compression. We present the C(V) ndcutoff frequency curves of the four kinds of fricted CMOS vrctors t 1 MHz, 5 GHz, 2 GHz, nd. Simultions nd testing results re compred. The results should e most useful for NLTL pulsecompression pplictions where high hrmonic genertion is criticl, ut lso of generl vlue in the development of CMOS MMIC technology. 2. Vrctor Friction nd Mesurement Thefourvrctorstructureswerefrictedincommercil.18-μm CMOSprocess.TheIMOSndNMOSvrctors (structures 2 nd 3) were stndrd components in the process. The AMOS vrctor (structure 1) ws not supported y this process. The SnDp vrctor (structure 4) could only e relized with the stndrd CMOS process y violting the design rules [7]. Both structures required extr lyout work.
2 Reserch Letters in Electronics DS L DS N well G L G R G R DS C prsitic R prsitic DS G C dep R dep P-sustrte P-sustrte Intrinsic model R B C ox P-sustrte P-sustrte Figure 1: Four different CMOS Vrctor Structures: (1) AMOS, (2) IMOS, (3) NMOS, nd (4) SnDp types. The fricted structures were tested using n HP 428A 1 MHz cpcitnce meter for low-frequency ehvior. For GHz-rnge mesurements, we used n Agilent N525A Performnce Network Anlyzer (PNA) with uilt-in is tees, Krl Suss PA 2 proe sttion, nd progrmmle heds with Picoproe GSG-67A-1 proes. On-wfer mesurements were extrcted up to 67 GHz ut for ccurcy, postmesurement clcultions were crried only to. A CS-5 clirtion kit ws used to set the mesurement reference plne to the tip of the proes. Koolen s Open nd Short technique [8]ws used to deemed the extrinsic prmeters due to use of pds, interconnects. A simplified model of the extrcted vrctor is shown in Figure 2. The prsitic L s nd R s re deemedded from ll three terminls: DS (drin nd source), G (gte), nd B (ulk). This yields the intrinsic model shown in the ox (Figure 2). The input dmittnce Y in looking into terminl G in Figure 3 cn e extrcted s [ ] Cox C dep Y in = jw + C prsitic + G dep + G prsitic. (1) C ox + C dep 3. CMOS Vrctor Behvior We simulted the four CMOS vrctor types up to, using the Medici process-oriented device simultor [9]. Figure 3 shows the results for the AMOS vrctor. The left column contins the simulted dt, the right column the mesured dt. The top row shows the C(V) curves, the ottom row the cutoff frequencies. Similrly, Figure 4 shows the results for the IMOS vrctor, Figure 5 for the NMOS vrctor, nd Figure 6 for the SnDp vrctor. In order to evlute the loss nd Q vlues, Figure 7 shows the series resistnces for AMOS, SDF, nd SDB vrctors t 5 GHz. On the chip, the gte of ech vrctor hs length of.5 μm, width of 5.μm, nd totl of 12 fingers. P+.4.3.2.1 2 15 1 L B Figure 2: CMOS intrinsic vrctor model. 2 GHz 5 2 GHz.4.3.2.1 25 2 15 1 2 GHz 5 2 GHz Figure 3: Simulted nd mesured dt for the AMOS vrctor. In the simultion setup, the gte length ws.5 μm, the width 1. μm (Medici s defult vlue), the thickness of the gte oxide 2.5 nm, the two-step uniform well dopings 8 1 17 cm 3,nd2 1 17 cm 3,respectively[1]. Therefore, the simulted cpcitnce ws multiplied y 6 to mtch the mesured dt. 4. Discussion The AMOS nd IMOS vrctors hve monotonic C(V)chrcteristics. The AMOS vrctor dt of Figure 3 show tht on the verge, the simulted C mx /C min rtios re 3.8 while mesured vlues re 3.4. The simulted cutoff frequencies re 135 GHz while mesured vlues re 13 GHz. The IMOS vrctor dt of Figure 5 show tht on the verge oth the simulted nd mesured C mx /C min rtios re 3. The cutoff frequencies re oth 1 GHz.
Reserch Letters in Electronics 3.5.4.3.2.1.5.4.3.2.1.4.3.2.1.4.3.2.1 2 15 1 5 2 GHz 2 GHz 2 15 1 5 2 GHz 2 GHz Figure 4: Simulted nd mesured dt for the IMOS vrctor. 25 2 15 1 2 GHz 5 2 GHz 25 2 15 1 5 2 GHz 2 GHz Figure 6: Simulted nd mesured dt for the SnDp vrctor..5.4.3.2.1 2 15 1 5 2 GHz 2 GHz.5.4.3.2.1 2 GHz 16 14 12 1 8 6 4 2 GHz Figure 5: Simulted nd mesured dt for the NMOS vrctor. Of prticulr interest is the frequency-dependence of the C(V) curves. For the AMOS vrctor, see Figure 3, the simulted C(V)s vry little from 1 MHz to. For the IMOS dt of Figure 4, the simulted nd mesured C(V) curves oth show decresed nonlinerity s the frequency increses. The reson for this degenertion is tht the IMOS vrctor hs lrger chnnel resistnce thn AMOS vrctor (shown in Figure 7), since in the IMOS structure the well mkes no contriution to the chnnel conductivity. The NMOS nd SnDp vrctors hve nonmonotonic C(V) chrcteristics. Figure 5 shows tht on the verge, the NMOS vrctor simultions predict C mx /C min rtios of 3.6 compred with mesured rtios 3.4. However oth simulted nd mesured C(V) curves degenerte towrd monotonicity s frequency increses. The simulted verge cutoff frequencies re 1 GHz while the mesured vlues re 95 GHz. Figure 6, for the SnDp vrctor, shows tht t lower frequencies, the verge simulted C mx /C min rtios re 3. nd the mesured rtios 2.7. Both simulted nd mesured SnDp C(V) curves re flttened in the 2-to- rnge, with C mx /C min rtios dropping drmticlly. In Figure 6, the verge cutoff frequencies re ll 1 GHz. The reltively poor high-frequency response of the SnDp structure is due to the need for crriers to trvel the full length of the chnnel from the S or D region. In the other structures, crriers need only to trvel hlf the length of the chnnel. To test this contention, we lso simulted NMOS nd SnDp vrctor structures t with gte lengths shortened to.2 μm. Figure 8 compres the results with those otined for the sme devices with.5 μm gtes.all cpcitnces re normlized to the sme gte re. Figure 8 shows tht with short-gte length, the SnDp vrctor
4 Reserch Letters in Electronics Resistnce (Ohms) 7 6 5 4 3 2 1 2 1.5 1.5.5 1 1.5 2 AMOS SDF SDB Figure 7: Series resistnces of AMOS, SDF, nd SDB vrctors t. 1 2 25 2 15 1 5 1 2 12 1 8 6 4 2 Long-gte Short-gte.4.3.2.1 1 2 6 5 4 3 2 1 Long-gte Short-gte Figure 8: SnDp vrctor versus NMOS vrctor t (shortgte =.2 μm, long-gte =.5 μm). hs reduced C(V) degenertion nd much higher cutoff frequency thn the NMOS vrctor. compression. However, the high-frequency degenertion restricts their use to much lower GHz rnge. Using short-gte SnDp vrctor cn reduce its high-frequency degenertion nd improve its performnce, s indicted in Figure 8. Our reserch lso shows tht ecuse of the lck of degenertion of its C(V) chrcteristicthighfrequencies nd no resistnce pek ner the depletion region, the AMOS vrctor should e good cndidte for high-ghz-rnge pplictions. Acknowledgment The uthors thnk the wireless group of the Communictions Reserch Centre (Cnd), led y Dr. Vlek Szwrc, for providing us with very useful testing equipment. References [1] J. S. Dunn, D. C. Ahlgren, D. D. Coolugh, et l., Foundtion of RF CMOS nd SiGe BiCMOS technologies, IBM Reserch nd Development, vol. 47, no. 2-3, pp. 11 138, 23. [2] B. Rzvi, A 6-GHz CMOS receiver front-end, IEEE Journl of Solid-Stte Circuits, vol. 41, no. 1, pp. 17 22, 26. [3] C. Co nd K. O. Kenneth, Millimeter-wve voltgecontrolled oscilltors in.13-μm CMOS technology, IEEE Solid-Stte Circuits, vol. 41, no. 6, pp. 1297 134, 26. [4] S.K.Bnerjee,Y.Du,R.Thom,ndA.C.Duvllet, Simultion nd enchmrking of MOS vrctors for CMOS9 RF process, in Motorol S3 Symposium, 23. [5] P. Smeni, C. Siu, S. Mirsi, et l., Modeling nd chrcteriztion of VCOs with MOS vrctors for RF trnsceivers, EURASIP Journl on Wireless Communictions nd Networking, vol. 26, Article ID 93712, 12 pges, 26. [6] M. Li, R. G. Hrrison, R. E. Amy, J.-M. Duchmp, P. Ferrri, nd N. G. Trr, CMOS vrctors in NLTL pulse-compression pplictions, in Proceedings of the 37th Europen Microwve Conference (EUMC 7), pp. 145 148, Munich, Germny, Octoer 27. [7] J. D. Plummer, M. D. Del, nd P. B. Griffin, Silicon VLSL Technology, chpter 3, Prentice-Hll, Englewood Cliffs, NJ, USA, 2. [8] M.C.A.M.Koolen,J.A.M.Geelen,ndM.P.J.G.Versleijen, An improved de-emedding technique for on-wfer highfrequency chrcteriztion, in Proceedings of the IEEE Bipolr Circuits nd Technology Meeting, pp. 188 191, August 1991. [9] Medici 25.1, https://secure.eloqu.com/. [1] S. Thompson, P. Pckn, nd M. Bohr, MOS scling: trnsistor chllenges for the 21st century, Intel Technology Journl, Q3, 1998. 5. Conclusion Both AMOS nd IMOS vrctors re good for single-edge pulse compression due to their higher C mx /C min rtios nd cutoff frequencies. However, the AMOS vrctor hs n dvntge over the IMOS vrctor ecuse its C(V) curve does not degenerte t higher GHz frequencies, s shown in Figure 3, nd it hs lower series resistnce; see Figure 7.Both NMOS nd SnDp vrctors re good for doule-edge pulse
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