Electronics II Physics 3620 / 6620

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Electronics II Physics 3620 / 6620 Feb 09, 2009 Part 1 Analog-to-Digital Converters (ADC) 2/8/2009 1

Why ADC? Digital Signal Processing is more popular Easy to implement, modify, Low cost Data from real world are typically Analog Needs conversion system from raw measurements to digital data Consists of Amplifier, Filters Sample and Hold Circuit, Multiplexer ADC 2/8/2009 2

Basic I/O Relationship ADC is Rationing System x = Analog input / Reference Fraction: 0 ~ 1 ADC Essentials n bits ADC Number of discrete output level : 2 n Quantum LSB size Q = LSB = FS / 2 n Quantization Error ±1/2 LSB Reduced by increasing n 2/8/2009 3

Converter Errors 2/8/2009 Offset Error Integral Linearity Error Gain Error Differential Linearity Error Can be eliminated by initial adjustments Nonlinear Error Hard to remove 4

Terminologies Converter Resolution The smallest change required in the analog input of an ADC to change its output code by one level Converter Accuracy The difference between the actual input voltage and the full-scale weighted equivalent of the binary output code Maximum sum of all converter errors including quantization error Conversion Time Required time (tc) before the converter can provide valid output data Converter Throughput Rate The number of times the input signal can be sampled maintaining full accuracy Inverse of the total time required for one successful conversion Inverse of Conversion time if No S/H(Sample and Hold) circuit is used 2/8/2009 5

More on Conversion Time Input voltage change during the conversion process introduces an undesirable uncertainty Full conversion accuracy is realized only if this uncertainty is kept low below the converter s resolution Rate of Change x tc resolution dv ( ) max dt FS t 2 n c Example 8-bit ADC Conversion Time: 100µsec Sinusoidal input vi = Asin(2 π ft) Rate of change dv i = 2π facos(2 π ft) 2π fa dt Let FS = 2A 2A 2π fa n 2 t f 1 = 12.4Hz n 2 πt Limited to Low frequency of 12.4 Hz Few Applications c c 2/8/2009 6

S/H increase Performance S/H (Sample and Hold) Analog circuits that quickly samples the input signal on command and then holds it relatively constant while the ADC performs conversion Aperture time (ta) Time delay occurs in S/H circuits between the time the hold command is received and the instant the actual transition to the hold mode takes place Typically, few nsec Example 20 nsec aperture time f 1 = 62.17KHz πt 2 n a Reasonably good for 100µsec converter 2/8/2009 7

Analog Input Signal Typically, Differential or Single-ended input signal of a single polarity Typical Input Range 0 ~ 10V and 0 ~ 5V If Actual input signal does not span Full Input range Some of the converter output code never used Waste of converter dynamic range Greater relative effects of the converter errors on output Matching input signal and input range Prescaling input signal using OP Amp In a final stage of preconditioning circuit By proportionally scaling down the reference signal If reference signal is adjustable 2/8/2009 8

Converting bipolar to unipolar Using unipolar converter when input signal is bipolar Scaling down the input Adding an offset Bipolar Converter If polarity information in output is desired Bipolar input range Typically, 0 ~ ±5V Bipolar Output 2 s Complement Offset Binary Sign Magnitude Input signal is scaled and an offset is added scaled Add offset 2/8/2009 9

Outputs and Analog Reference Signal I/O of typical ADC ADC output Number of bits 8 and 12 bits are typical 10, 14, 16 bits also available Typically natural binary BCD (3½ BCD) For digital panel meter, and digital multimeter Errors in reference signal From Initial Adjustment Drift with time and temperature Cause Gain error in Transfer characteristics To realize full accuracy of ADC Precise and stable reference is crucial Typically, precision IC voltage reference is used 5ppm/ C ~ 100ppm/ C 2/8/2009 10

Control Signals Start From CPU Initiate the conversion process BUSY / EOC To CPU Conversion is in progress 0=Busy: In progress 1=EOC: End of Conversion HBE / LBE From CPU To read Output word after EOC HBE LBE High Byte Enable Low Byte Enable 2/8/2009 11

A/D Conversion Techniques Counter or Tracking ADC Successive Approximation ADC Most Commonly Used Dual Slop Integrating ADC Voltage to Frequency ADC Parallel or Flash ADC Fast Conversion Software Implementation Shaft Encoder 2/8/2009 12

Counter Type ADC Block diagram Waveform Operation Reset and Start Counter DAC convert Digital output of Counter to Analog signal Compare Analog input and Output of DAC Vi < V DAC Continue counting Vi = V DAC Stop counting Digital Output = Output of Counter Disadvantage Conversion time is varied 2 n Clock Period for Full Scale input 2/8/2009 13

Tracking Type ADC Tracking or Servo Type Using Up/Down Counter to track input signal continuously For slow varying input Can be used as S/H circuit By stopping desired instant Digital Output Long Hold Time Disabling UP (Down) control, Converter generate Minimum (Maximum) value reached by input signal over a given period 2/8/2009 14

Successive Approximation ADC Most Commonly used in medium to high speed Converters Based on approximating the input signal with binary code and then successively revising this approximation until best approximation is achieved SAR(Successive Approximation Register) holds the current binary value Block Diagram 2/8/2009 15

Successive Approximation ADC Circuit waveform Conversion Time n clock for n-bit ADC Fixed conversion time Serial Output is easily generated Bit decision are made in serial order Logic Flow 2/8/2009 16

Operation Integrate Applications Dual Slope Integrating ADC Reset and integrate Thus Tv T 1 vdt i 0 t2 1 i( AVG) 2 v i( AVG) DPM(Digital Panel Meter), DMM(Digital Multimeter), 0 = tvr t2 = Vr T 1 Vdt r Excellent Noise Rejection High frequency noise cancelled out by integration Proper T 1 eliminates line noise Easy to obtain good resolution Low Speed If T 1 = 60Hz, converter throughput rate < 30 samples/s 2/8/2009 17

Voltage to Frequency ADC VFC (Voltage to Frequency Converter) Convert analog input voltage to train of pulses Counter Generates Digital output by counting pulses over a fixed interval of time Low Speed Good Noise Immunity High resolution For slow varying signal With long conversion time Applicable to remote data sensing in noisy environments Digital transmission over a long distance 2/8/2009 18

Parallel or Flash ADC Very High speed conversion Up to 100MHz for 8 bit resolution Video, Radar, Digital Oscilloscope Single Step Conversion 2 n 1 comparator Precision Resistive Network Encoder Resolution is limited Large number of comparator in IC 2/8/2009 19