Power Amplifier Linearization using RF Pre-Distortion JUNE, 2012 1
PA Linearization Overview General principles Overview/Block Diagram of DPD and RFPD RFPAL System architecture & Implementation
Predistortion Principle No predistorion With predistorion 5-10 x BW expansion 3
Digital Pre-Distortion (DPD) Wanted Signal Wanted Signal + Predistortion = ~ 5 x Wanted Signal Wanted Signal + Predistortion = ~ 5 x Wanted Signal Wanted Signal f f f 0 0 LO LO f DUC CFR 1.5W DPD 0.3W DAC DAC 0.8W Up- Converter Driver & PA Filter / Duplexor Clock Generator 0.4W DSP 0.6W 5x CLK ADC ADC 0.8W 0.8W LO Down- Converter Pwr Det 0.1W Pwr Det 0.1W Without PA/DUC/CFR : Power consumption ~5.4W 4
RFPAL (RF PA Linearization) Wanted Signal Wanted Signal Wanted Signal + Predistortion = ~5 x Wanted Signal Wanted Signal f f f f 0 LO LO LO Clock Generator 0.1W DUC CFR 1x CLK 0.1W 0.8W 0.4W DAC DAC Up- Converter LO Optional digital link to BB Scintera RFPAL Driver & PA Filter / Duplexor Without PA/DUC/CFR Power consumption ~1.4W 5
RFPAL System Architecture & Implementation
RFPAL Application 7
RFPAL System Architecture CORRECTION PROCESSOR RF PA Linearizer RFIN QPS 0 o 90 o I Q RF VGA RFOUT Correction Signal PDET AGC Q I VGA POWER DETECTOR VOLTERRA SERIES VGA Volterra Series Generator DAC DAC Coefficient DACs Voltage & Timing references, LO Generation, etc. Memory Digital Controller Optional Digital Interface MONITOR RFFB Feedback Signal ADC ADC Input Monitor Path Feedback Monitor Path DIGITAL SIGNAL PROCESSOR (DSP) FFT, error metric, etc. 8
Scintera Advantages Single chip CMOS linearization solution Easy to evaluate and design in Simplifies TX chain High system efficiency Very low power consumption Low system cost Small footprint Future proof In-system & in-field reprogrammable RFin/RFout supports stand-alone PAs Waveform & modulation independent Power Amp Independent Linearize even lowest power PAs Robust & field-proven solution 2.54 cm 2.54 cm 9
More Complete Information on Theory of Operation and Datasheets Available on Line at www.scintera.com or Richardson RFPD website Please Visit Us at Booth # 208
Additional Slides
Analog Volterra Series Delay 2= τ 2 Delay 4= τ 4 Delay 3= τ 3 V in (t) Delay 1= τ 1 Coefficient DAC s X 2 X 4 C 1,2 C 1,4 V out (t) X 6 C 1,6 X 8 C 1,8 X 10 C 1,10 VIN (t) = r 2 (t) V 4 5 2.m OUT (t) = ~ cp,2.mr (t -τ p ) p= 1 m= 1 12
RFPAL Key Architectural Attributes Analog (RF & BB), Digital (high & low-speed) and SW partitioning minimize power & area Computation of correction terms in digital (software and hardware) domain Application of correction in the analog domain RF and most of baseband analog circuitry is unclocked enables robustness and flexibility for various modulation schemes & carrier frequencies. Flexible Work Function Synthesizes wide range of PA AM/AM and AM/PM compensation and memory compensation (1ns - 300ns) Enables robust adaptation (orthogonal basis terms of work function) Robust performance with process, voltage, aging and temperature variations Extensive digital/analog compensation loops for analog cells, with process/temp sensing, calibration routines, etc. Optimized calibration algorithms using a low-power, on-chip spectral estimator. Software-driven analog circuit design that can be conveniently tuned /optimized. Software-driven correction enables flexibility With respect to waveforms, PA, power consumption (duty-cycle), etc. Allows customization of solutions by application and customer 13
RFPAL Reference PCB Output coupler RFOUT Ceramic resonator 25 mm RFPAL Linearizer SoC 9 x 9 x 0.9 mm standard QFN package Input coupler Other: Decoupling + matching networks RFIN RFFB 14