GCSE Electronics 44301

Similar documents
GCSE Electronics Mark scheme June Version 1.1: Final mark scheme

ELECTRONICS ELEC1. Mark scheme June 2016 INTRODUCTORY ELECTRONICS. Version: 1.0 Final

A-LEVEL Electronics. ELEC5 Communications Systems Mark scheme June Version: 1.0 Final

Electronics (JUN ) General Certificate of Secondary Education June Time allowed 2 hours TOTAL

GCSE DESIGN AND TECHNOLOGY SYSTEMS AND CONTROL TECHNOLOGY

GCSE (9-1) WJEC Eduqas GCSE (9-1) in ELECTRONICS ACCREDITED BY OFQUAL DESIGNATED BY QUALIFICATIONS WALES SAMPLE ASSESSMENT MATERIALS

GCSE DESIGN AND TECHNOLOGY ELECTRONIC PRODUCTS

Monday 13 June 2016 Afternoon Time allowed: 2 hours

PHYSICS B: PHYSICS IN CONTEXT

Electronics (JUN ) General Certificate of Secondary Education June Thursday 5 June pm to 3.30 pm. Time allowed 2 hours

abc Unit 1: Written Paper Final Mark Scheme Design and Technology Electronic Products June 2011 General Certificate of Secondary Education

GCSE Electronics. Scheme of Work

GCE AS. WJEC Eduqas GCE AS in ELECTRONICS ACCREDITED BY OFQUAL DESIGNATED BY QUALIFICATIONS WALES SAMPLE ASSESSMENT MATERIALS

UNIT E1 (Paper version of on-screen assessment) A.M. WEDNESDAY, 8 June hour

GCSE Physics. PH3HP Final Mark Scheme June Version/Stage: v1.0

GCE. Electronics. Mark Scheme for June Advanced GCE Unit F615: Communications Systems. Oxford Cambridge and RSA Examinations

LEVEL 3 TECHNICAL LEVEL ENGINEERING Mathematics for Engineers Mark scheme

hij Teacher Resource Bank GCE Electronics Exemplar Examination Questions ELEC2 Further Electronics

A.M. WEDNESDAY, 19 May minutes

ELEC2 (JUN15ELEC201) General Certificate of Education Advanced Subsidiary Examination June Further Electronics TOTAL. Time allowed 1 hour

ELECTRONICS ADVANCED SUPPLEMENTARY LEVEL

A-LEVEL Physics PHA5/2B Medical Physics Mark scheme

Free-Standing Mathematics Qualification Mathematics

HIGH LOW Astable multivibrators HIGH LOW 1:1

GCSE DESIGN AND TECHNOLOGY SHORT COURSE

GCSE Engineering Mark scheme June Version: 1.0 Final

GOVERNMENT OF KARNATAKA KARNATAKA STATE PRE-UNIVERSITY EDUCATION EXAMINATION BOARD II YEAR PUC EXAMINATION MARCH-2013 SCHEME OF VALUATION

Draw in the space below a possible arrangement for the resistor and capacitor. encapsulated components

Exam Booklet. Pulse Circuits

GCSE (9-1) WJEC Eduqas GCSE (9-1) in ELECTRONICS ACCREDITED BY OFQUAL DESIGNATED BY QUALIFICATIONS WALES GUIDANCE FOR TEACHING

SPECIMEN. Candidate Number

GCSE Mathematics (Linear)

ELE1. ELECTRONICS Unit 1 Foundation Electronics. General Certificate of Education June 2004 Advanced Subsidiary Examination

= V IN. and V CE. = the supply voltage 0.7 V, the transistor is on, V BE. = 0.7 V and V CE. until saturation is reached.

GCSE Mathematics (Linear)

ELEXBO A-Car-Engineering

Final. Mark Scheme. Design and Technology: Graphic Products. (Specification 4550) Unit 1: Written Paper

GCSE Design and Technology Short Course

LM555 and LM556 Timer Circuits

OCR ADVANCED SUBSIDIARY GCE IN ELECTRONICS (3826) OCR ADVANCED GCE IN ELECTRONICS (7826) Specimen Question Papers and Mark Schemes

GCE Electronics Exemplar Exam Questions ELEC5: Communication Systems

A-LEVEL Media Studies

ENGINEERING TRIPOS PART II A ELECTRICAL AND INFORMATION ENGINEERING TEACHING LABORATORY EXPERIMENT 3B2-B DIGITAL INTEGRATED CIRCUITS

Friday 17 June 2016 Morning

Process Components. Process component

Using Circuits, Signals and Instruments

Cambridge National Engineering. Mark Scheme for June Unit R113: Electronic principles

GCSE Electronics Practical Electronics System Synthesis Report on the Examination June Version: 1.0

SCHEMATIC OF GRAYMARK 808 POWERED BREADBOARD

Lab 2 Revisited Exercise

A2 Electronics Project: DARPS: A Digital Audio Recorder and Playback System. Name: Andrew Cottrell Year: 2011

NJM4151 V-F / F-V CONVERTOR

AQA Qualifications. GCSE Mathematics. Unit H Mark scheme H June Version 1: Final mark scheme

Low Voltage, High Current Time Delay Circuit

High Current MOSFET Toggle Switch with Debounced Push Button

AS Drama and Theatre Studies

ANALOG TO DIGITAL CONVERTER

LS7362 BRUSHLESS DC MOTOR COMMUTATOR / CONTROLLER

GCSE Mathematics (Linear)

ECE U401/U211-Introduction to Electrical Engineering Lab. Lab 4

Lab 12: Timing sequencer (Version 1.3)

Voltage Current V I. Resistors are colour-coded: the number of Ohms resistance is indicated by a series of coloured bands on the resistor.

Autonomous Robot Control Circuit

AC LAB ECE-D ecestudy.wordpress.com

Chapter 6: Transistors and Gain

National Quali cations Date of birth Scottish candidate number

Circuit Components Lesson 4 From: Emergency Management Ontario

Summer 2015 Examination

Home Map Projects Construction Soldering Study Components 555 Symbols FAQ Links

GCSE Mathematics H Applications of Mathematics Unit 2: Higher Tier Mark scheme 93702H. November Version 1.0 Final

Wednesday 7 June 2017 Afternoon Time allowed: 1 hour 30 minutes

B.E. SEMESTER III (ELECTRICAL) SUBJECT CODE: X30902 Subject Name: Analog & Digital Electronics

ENGR4300 Test 3A Fall 2002

UNIVERSITY OF NORTH CAROLINA AT CHARLOTTE Department of Electrical and Computer Engineering

University of North Carolina, Charlotte Department of Electrical and Computer Engineering ECGR 3157 EE Design II Fall 2009

GOVERNMENT OF KARNATAKA KARNATAKA STATE PRE-UNIVERSITY EDUCATION EXAMINATION BOARD II YEAR PUC EXAMINATION JULY-2012 SCHEME OF VALUATION

Long Loopstick Antenna

Practical 2P12 Semiconductor Devices

Version 3.0. Genera June Engin. (Spec. Final

Government Polytechnic Muzaffarpur Name of the Lab: Applied Electronics Lab

GCE Electronics. Mark Scheme for June Unit F612: Signal Processors. Advanced Subsidiary GCE. Oxford Cambridge and RSA Examinations

). The THRESHOLD works in exactly the opposite way; whenever the THRESHOLD input is above 2/3V CC

Calculate the maximum amount of energy this battery can deliver.

Final Exam: Electronics 323 December 14, 2010

Electronic Concepts and Troubleshooting 101. Experiment 1

GOVERNMENT OF KARNATAKA KARNATAKA STATE PRE-UNIVERSITY EDUCATION EXAMINATION BOARD II YEAR PUC EXAMINATION MARCH-2012 SCHEME OF VALUATION

Additional Programs for the Electronics Module Part No

V-LAB COMPUTER INTERFACED TRAINING SET

GCE SYSTEMS AND CONTROL TECHNOLOGY

abc Mark Scheme Mathematics 4301 Specification A General Certificate of Secondary Education Paper 2 Foundation 2008 examination - November series

DEPARTMENT OF ELECTRICAL ENGINEERING LAB WORK EE301 ELECTRONIC CIRCUITS

The Norwegian University of Science and Technology ENGLISH. EXAM IN TFY 4185 Measurement Technique/Måleteknikk. 1 Dec 2014 Time: 09:00-13:00

070 ELECTRONICS WORKS EXAMINATION STRUCTURE

LABORATORY EXPERIMENT. Infrared Transmitter/Receiver

Creating an Audio Integrator

Entry Level Assessment Blueprint Electronics

Design and Technology: Electronic Products

Experiment No. 9 DESIGN AND CHARACTERISTICS OF COMMON BASE AND COMMON COLLECTOR AMPLIFIERS

Surname Other Names. Centre Number Candidate Number Candidate Signature

AND ITS APPLICATIONS M.C.SHARMA

Transcription:

GCSE Electronics 4401 Unit 1 Written Paper Mark scheme June 2017 Version: 1.0 Final

Mark schemes are prepared by the Lead Assessment Writer and considered, together with the relevant questions, by a panel of subject teachers. This mark scheme includes any amendments made at the standardisation events which all associates participate in and is the scheme which was used by them in this examination. The standardisation process ensures that the mark scheme covers the students responses to questions and that every associate understands and applies it in the same correct way. As preparation for standardisation each associate analyses a number of students scripts. Alternative answers not already covered by the mark scheme are discussed and legislated for. If, after the standardisation process, associates encounter unusual answers which have not been raised they are required to refer these to the Lead Assessment Writer. It must be stressed that a mark scheme is a working document, in many cases further developed and expanded on the basis of students reactions to a particular paper. Assumptions about future mark schemes on the basis of one year s document should be avoided; whilst the guiding principles of assessment remain constant, details will change, depending on the content of a particular examination paper. Further copies of this mark scheme are available from aqa.org.uk Copyright 2017 AQA and its licensors. All rights reserved. AQA retains the copyright on all its publications. However, registered schools/colleges for AQA are permitted to copy material from this booklet for their own internal use, with the following important exception: AQA cannot give permission to schools/colleges to photocopy any material that is acknowledged to a third party even for internal use within the centre.

Sub-part 1 (a) Live Neutral Earth Spelling recognisable as neutral. Accept ground for earth. 1 (b) The (metal) case 1 1 (c) Multimeter/Resistance meter/continuity tester 1 1 (d) Overheating/fire/melting flex/damage to components 1 1 (e) Blow/melt - easily/even if there is no fault/immediately/as soon as switched on 1 1 (f) 4 khz 1 1 (g) (LED) flashing, growing brighter and dimmer 1 1 (h) Oscilloscope / stopwatch 1

Name Symbol AND NAND 2 (a) NOR 5 NOT OR 5 marks input and output connections missing for 1 gate then set minus 1 input and output connections for more than 1 gate missing minus 2 4

Answer Mark Comments/ to OR gate OR to output 2 (b) (i) output to NOT gate output to another gate 4 Or 5

Answer Mark Comments/ m 2 (b) (ii) D R Q 6

2 (b) (iii) Q 1 Function of subsystem Name of subsystem Logic OR gate Data latch (any order) (a) Output Siren 7 Input Door sensor / light beam sensor (any order) Analogue to digital converter Comparator Driver Transistor switch (b) (i) Door sensor 1 (b) (ii) Data latch 1 (b) (iii) Comparator 1 (b) (iv) Light beam sensor 1 7

4 (a) Formula, substitution, correct solution, 9 x 18/(6+18) = V Correct formula Correct substitution Correct answer value 4 (b) (i) 17.5 k 18 k 1 Allow ± 0.5 k 4 (b) (ii) 0 2 lux 1 4 (c) (Formula & substitution), correct answer: R = 15 k 2 = 7.5 k 2 4 (d) 4 (e) (i) 4 (e) (ii) Analogue signal, continuously varying voltage, voltage can have any value between two limits. Digital signal can only have two states (on or off only). Correctly drawn npn bipolar transistor Correct orientation within circuit Correctly labelled: Emitter, Base & Collector Diode in parallel with the relay coil Correct orientation of diode, including recognisable diode symbol 2 5 2 8

5 (a) 4 5 (b) decision either diamond shaped box input either detect box or scans box loop either upward arrow output issue ticket / display insert fee process store or calculate box 5 9

boxes correct shape two boxes for raise barrier and check space is clear decision box no loop to above check space yes to lower barrier and end boxes Raise barrier 5 (c) Camera system checks space is clear 5 Is space clear? N Lower barrier Y End 10

6 (a) 12 k resistor from pin 7 to +9 V 0 k resistor from pin 7 to link between pins 2 & 6 Link from pin 1 to 0 V 0.1 F capacitor from pin 2 & 6 link to 0 V Link from pin 8 to +9 V 5 6 (b) Formula, substitution, correct answer with unit. T = (R 1 + 2R 2 )C 1.44 = 0.005 s 5.0 ms 6 (c) (i) +9 V to Ammeter +ve and Ammeter ve to +9 V on circuit 0 V on supply to 0 V on circuit Voltmeter +ve to +9 V on circuit (or to +9V on supply) 0 V on Voltmeter to 0 V on circuit/power supply 4 Accept Ammeter in 0 V line if correctly connected. 6 (c) (ii) Formula P = IV, calculation with unit P = 0.045 Watts, ma handled correctly 6 (d) Ammeter connections have been reversed 1 6 (e) (i) (.0) ms 1 6 (e) (ii) 2(.0) ms 1 11

7 (a) (i) Fuse 1 7 (a) (ii) Each diode correctly orientated with acceptable circuit symbols 7 (b) Formula & Calculation 12 x 2 = 17 V 2 7 (c) 7 (d) (i) 7 (d) (ii) Step down to a low (safe) voltage Isolation separation from direct contact to mains LED and resistor in series across dc output Correct orientation of LED and symbol Voltage across resistor = 17 2 = 15 V Formula R = V/I = 15/0.0 = 500 Or Voltage across resistor = 17 2 x 0.7 2 = 1.6 V Formula R = V/I = 1.6/0.0 = 45 4 2 7 (d) (iii) 510 (470 )/560 Ω if tolerance issue explained 1 ECF from (ii) 12

8 (a) Aerial/Antenna (Audio) Amplifier 2 8 (b) (i) 8 (b) (ii) 8 (c) 8 (d) 8 (e) Sensitivity: The ability to produce a large amplitude output from a small signal from the aerial so the radio can respond to weak signals. Selectivity: The ability to separate the desired signal from those transmitted at frequencies close to required signal so there is no interference from other channels. Demodulator separates the message signal from the rf signal ie removes the rf to leave only the audio signal. AM signal with an envelope following the audio signal AM signal showing the carrier component FM signal showing varying frequency in response to audio signal FM signal with constant amplitude Less prone to noise 2 2 2 4 1 1

9 (a) Sensor 1 Sensor 2 Sensor P Q R Output 0 0 0 0 0 0 0 0 0 1 0 1 0 0 0 1 0 0 1 0 0 0 1 1 1 1 0 1 1 0 0 0 0 0 0 1 0 1 0 1 1 1 1 1 0 0 1 1 1 1 1 1 1 1 1 1 4 9 (b) (i) Cannot provide enough current 1 9 (b) (ii) Transistor (any type) 1 9 (c) (i) 100 x = 00 ma 2 9 (c) (ii) 12 ( x 2.2) = 5.4 V 2 9 (c) (iii) P = V x I = 5.4 x 0.1 = 0.54 (W) Total power = x 0.54 = 1.62 W 14

9 (d) (i) 1 0 1 0 1 0 0 1 2 9 (d) (ii) Two pairs of gates Two inputs to 1 pair Third input NANDed with output of first pair 15

Level Marks Descriptor 9 (e) 4-5 2 2-1 0-1 -an answer will be expected to meet most of the criteria in the level descriptor - answer is full and detailed and is supported by an appropriate range of relevant points such as those given below - argument is well structured with minimal repetition or irrelevant points - accurate and clear expression of ideas with only minor errors in the use of technical terms, spelling, punctuation and grammar - answer has some omissions but is generally supported by some of the relevant points below - the argument shows some attempt at structure - the ideas are expressed with reasonable clarity but with a few errors in the use of technical terms spelling, punctuation and grammar - answer is largely incomplete, it may contain some valid points which are not clearly linked to an argument structure - unstructured answer - errors in the use of technical terms, spelling, punctuation and grammar or lack of fluency 5 An example of the type of answer that may be produced would be: Point X should be connected to the input to the gates and 0 V should be connected to the zero volt line of the logic subsystem. With the skittle in place point X is connected to 0 V so its voltage is low. When the skittle is removed the voltage at X goes high because R is a pull up resistor/connects X to +V S (or explanation involving I and Ohm s Law ) 16

10 (a) 10 (b) 10 (c) (i) On (the +ve edge of) each clock pulse the counter changes each output High in turn. And returns the previous input back to Low. On the 6 th pulse Q 6 goes High and resets to counter to restart the sequence. Timing resistor & capacitor connected in series Resistor to +Vs and capacitor to 0V Link from RC connection to Threshold pin And to Discharge pin Rearrange monostable formula R = T (1.1 C) Substitution Obtains correct value of R = 826 k 4 10 (c) (ii) (Grey & Red) Yellow, Gold 10 (d) The counter produces a +ve pulse when Q 6 goes high to reset. A 555 monostable requires a ve pulse to trigger. The NOT gate inverts the reset pulse from the counter to trigger the monostable. 17