R. W. Erickson. Department of Electrical, Computer, and Energy Engineering University of Colorado, Boulder

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R. W. Erickson Department o Electrical, Computer, and Energy Engineering University o Colorado, Boulder

Computation ohase! T 60 db 40 db 20 db 0 db 20 db 40 db T T 1 Crossover requency c 1 Hz 10 Hz 100 Hz 1 khz 10 khz 100 khz 1+ s!z m 9 T 18 27 Exact expression or phase:! \T (j!) = tan 1!! z 2 1! tan 1 Q 6 4! 1! p1 2! p1 Expression or phase asymptote over requency range as illustrated near c :!! \T (j!) (+45 /dec) log 10! z /10 180 3 7 5 T (s) =T 0 1+ s! 2 s + Q! p1! p1 Evaluate one o the above to ind T(jω c ), then compute phase margin:! ϕ m = 18 + T(jω c )!! 28!!

9.4.2. The relation between phase margin and closed-loop damping actor How much phase margin is required? A small positive phase margin leads to a stable closed-loop system having complex poles near the crossover requency with high Q. The transient response exhibits overshoot and ringing. Increasing the phase margin reduces the Q. Obtaining real poles, with no overshoot and ringing, requires a large phase margin. The relation between phase margin and closed-loop Q is quantiied in this section. 28

A simple second-order system Consider the case where T(s) can be wellapproximated in the vicinity o the crossover requency as T(s) = 1 s 0 1+ s 2 40 db T 0 T T 20 db 0 db 20 db 40 db 20 db/decade T 9 0 2 /10 2 m 2 0 2 2 40 db/decade 10 2 9 18 27 29

Closed-loop response I Then or, T(s) = 1 s 0 1+ s 2 T(s) 1+T(s) = 1 1+ 1 T(s) T(s) 1+T(s) = 1 1+ s Q c + = 1 1+ s 0 + s2 0 2 s c 2 where c = 0 2 =2 c Q = 0 c = 0 2 30

Low-Q case Q = 0 c = 40 db 20 db 0 db 20 db 0 2 low-q approximation: Q c = c 0 Q = 2 T 20 db/decade T 1+T 0 0 c = 0 2 Q = 0 / c 2 40 db 0 2 2 40 db/decade 31

High-Q case c = 0 2 =2 c Q = 0 c = 0 2 60 db 40 db T 20 db/decade 0 20 db 2 0 db 20 db 40 db T 1+T c = 0 2 0 2 2 0 Q = 0 / c 40 db/decade 32

Q vs. ϕ m Solve or exact crossover requency, evaluate phase margin, express as unction o ϕ m. Result is: Q = cos m sin m m = tan -1 1+ 1+4Q 4 2Q 4 33

Q vs. ϕ m Q 20 db 15 db 10 db 5 db 0 db 5 db Q = 1 0 db m = 52 Q = 0.5 6 db 10 db m = 76 15 db 20 db 0 10 20 30 40 50 60 70 80 90 m 34

9.4.3. Transient response vs. damping actor Unit-step response o second-order system T(s)/(1+T(s)) v(t)=1+ 2Qe- c t/2q 4Q 2 1 sin 4Q 2 1 2Q c t + tan -1 4Q 2 1 Q > 0.5 v(t)=1 2 2 e 1 t 1 1 1 e 2 t 2 Q < 0.5 1, 2 = c 2Q 1 ± 1 4Q2 For Q > 0.5, the peak value is peak v(t)=1+e / 4Q2 1 35

Transient response vs. damping actor v(t) 2 1.5 Q = 50 Q = 10 Q = 4 Q = 2 1 0.5 0 Q = 1 Q = 0.75 Q = 0.5 Q = 0.3 Q = 0.2 Q = 0.1 Q = 0.05 Q = 0.01 0 5 10 15 c t, radians 36

9.5. Regulator design Typical speciications: Eect o load current variations on output voltage regulation This is a limit on the maximum allowable output impedance Eect o input voltage variations on the output voltage regulation This limits the maximum allowable line-to-output transer unction Transient response time This requires a suiciently high crossover requency Overshoot and ringing An adequate phase margin must be obtained The regulator design problem: add compensator network G c (s) to modiy T(s) such that all speciications are met. 37

9.5.1. Lead (PD) compensator G c (s)=g c0 1+ s z 1+ s p G c G c0 G c0 max Improves phase margin + 45 /decade /10 = /10 10 45 /decade G c 38

Lead compensator: maximum phase lead Maximum phase lead 9 75 max = 6 45 G c ( max ) = tan -1 2 3 15 1 10 100 1000 = 1+sin 1 sin / 39

Lead compensator design To optimally obtain a compensator phase lead o θ at requency c, the pole and zero requencies should be chosen as ollows: = c 1 sin 1+sin G c G c0 G c0 = c 1+sin 1 sin I it is desired that the magnitude o the compensator gain at c be unity, then G c0 should be chosen as G c0 = z G c + 45 /decade /10 /10 max = 10 45 /decade 40

Example: lead compensation 60 db 40 db T T 0 G c0 Original gain T T 20 db T 0 Compensated gain 0 0 db c 20 db 40 db T Compensated phase asymptotes Original phase asymptotes 9 m 18 27 41

9.5.2. Lag (PI) compensation G c (s)=g c 1+ L s G c 20 db /decade G c Improves lowrequency loop gain and regulation L 10 L G c 9 L /10 + 45 /decade 42

Example: lag compensation original (uncompensated) loop gain is T u (s)= T u0 1+ s 0 compensator: G c (s)=g c 1+ L s Design strategy: choose G c to obtain desired crossover requency ω L suiciently low to maintain adequate phase margin 40 db 20 db 0 db 20 db 40 db T u T u T T T u0 L 0 0 G c T u0 10 L 10 0 1 Hz 10 Hz 100 Hz 1 khz 10 khz 100 khz c m 9 9 18 43

Example, continued Construction o 1/(1+T), lag compensator example: 40 db T 20 db L 0 G c T u0 0 db c 20 db 40 db 1 1+T L 0 1 G c T u0 1 Hz 10 Hz 100 Hz 1 khz 10 khz 100 khz 44

9.5.3. Combined (PID) compensator 40 db 20 db 0 db G c (s)=g cm 1+ L s 1+ s z 1+ s p1 1+ s p2 G c G G c c G cm L c 1 2 20 db 45 /decade 10 L 10 2 /10 9 40 db G c 9 L /10 /10 1 /10 9/decade 9/decade 101 9 18 45

9.5.4. Design example L 50 µh + i load v g (t) 28 V + Transistor gate driver Pulse-width modulator C 500 µf s = 100 khz V M = 4 V v c G c (s) v(t) Compensator Error signal v e R 3 + v re 5 V Hv H(s) Sensor gain 46

Quiescent operating point Input voltage V g = 28V Output V = 15V, I load = 5A, R = 3Ω Quiescent duty cycle D = 15/28 = 0.536 Reerence voltage V re = 5V Quiescent value o control voltage V c = DV M = 2.14V Gain H(s) H = V re /V = 5/15 = 1/3 47

Small-signal model V D 2 d + 1 : D L + v g (s) + V R d C v(s) R i load (s) v re (= 0) + Error signal v e (s) G c (s) v c (s) Compensator 1 V M V M = 4 V d(s) T(s) H(s) v(s) H(s) H = 1 3 48

Open-loop control-to-output transer unction G vd (s) G vd (s)= V D standard orm: 1 1+s L R + s2 LC G vd (s)=g 1 d0 1+ s + Q 0 s 0 0 salient eatures: 2 60 dbv G vd G vd 40 dbv 20 dbv 0 dbv 20 dbv 40 dbv G vd G vd G d0 = 28 V 29 dbv 0 10 1/2Q 0 0 = 900 Hz 10 1/2Q 0 0 = 1.1 khz Q 0 = 9.5 19.5 db 9 18 27 G d0 = V D = 28V 0 = 0 2 = 1 2 LC = 1kHz Q 0 = R C = 9.5 19.5dB L 1 Hz 10 Hz 100 Hz 1 khz 10 khz 100 khz 49

Open-loop line-to-output transer unction and output impedance G vg (s)=d 1 1+s L R + s2 LC same poles as control-to-output transer unction standard orm: G vg (s)=g 1 g0 1+ s + Q 0 s 0 0 Output impedance: Z out (s)=r 1 sc sl = 2 sl 1+s L R + s2 LC 50

System block diagram T(s)=G c (s) 1 VM G vd (s) H(s) T(s)= G c(s) H(s) V 1 V M D 1+ s + Q 0 s 0 0 2 v g (s) ac line variation G vg (s) i load (s) Z out (s) Load current variation v re (=0) + v e (s) G c (s) T(s) v c (s) V M = 4 V 1 V M H = 1 3 d(s) Duty cycle variation + G vd (s) + Converter power stage v(s) H(s) 51

Uncompensated loop gain (with G c = 1) 40 db T u T u 20 db T u T u0 2.33 7.4 db Q 0 = 9.5 19.5 db 0 db 0 1 khz With G c = 1, the loop gain is T u (s)=t 1 u0 1+ s + Q 0 s 0 0 T u0 = HV DV M = 2.33 7.4dB 20 db 40 db 2 T u 10 1 2Q 0 = 900 Hz c = 1.8 khz, ϕ m = 5 10 1 2Q 0 = 1.1 khz 40 db/decade 1 Hz 10 Hz 100 Hz 1 khz 10 khz 100 khz 9 18 27 52

Lead compensator design Obtain a crossover requency o 5 khz, with phase margin o 52 T u has phase o approximately 18 at 5 khz, hence lead (PD) compensator is needed to increase phase margin. Lead compensator should have phase o + 52 at 5 khz T u has magnitude o 20.6 db at 5 khz Lead compensator gain should have magnitude o + 20.6 db at 5 khz Lead compensator pole and zero requencies should be = (5kHz) = (5kHz) 1 sin (52 ) 1+sin (52 ) = 1.7kHz 1+sin (52 ) 1 sin (52 ) = 14.5kHz Compensator dc gain should be G c0 = c 0 2 1 T u0 = 3.7 11.3dB 53

Q vs. ϕ m Q 20 db 15 db 10 db 5 db 0 db 5 db Q = 1 0 db m = 52 Q = 0.5 6 db 10 db m = 76 15 db 20 db 0 10 20 30 40 50 60 70 80 90 m 34

9.5.1. Lead (PD) compensator G c (s)=g c0 1+ s z 1+ s p G c G c0 G c0 max Improves phase margin + 45 /decade /10 = /10 10 45 /decade G c 38

Lead compensator: maximum phase lead Maximum phase lead 9 75 max = 6 45 G c ( max ) = tan -1 2 3 15 1 10 100 1000 = 1+sin 1 sin / 39

Lead compensator design To optimally obtain a compensator phase lead o θ at requency c, the pole and zero requencies should be chosen as ollows: = c 1 sin 1+sin G c G c0 G c0 = c 1+sin 1 sin I it is desired that the magnitude o the compensator gain at c be unity, then G c0 should be chosen as G c0 = z G c + 45 /decade /10 /10 max = 10 45 /decade 40

Lead compensator Bode plot 40 db G c G G c c0 G c z p 20 db 0 db G c0 z c = 20 db 40 db /10 /10 10 9 G c 9 18 1 Hz 10 Hz 100 Hz 1 khz 10 khz 100 khz 54

Loop gain, with lead compensator 40 db 20 db T(s)=T u0 G c0 1+ s p 1+ 1+ s z s Q 0 0 + s 0 T T T T 0 = 8.6 18.7 db Q 0 = 9.5 19.5 db 2 0 db 20 db 40 db T 170 Hz 0 1 khz 1.7 khz c 5 khz 900 Hz 14 khz 1.4 khz 17 khz 9 1.1 khz m =52 18 27 1 Hz 10 Hz 100 Hz 1 khz 10 khz 100 khz 55

1/(1+T), with lead compensator 40 db 20 db T T 0 = 8.6 18.7 db 0 Q 0 = 9.5 19.5 db need more low-requency loop gain 0 db 20 db 1 1+T 1/T 0 = 0.12 18.7 db Q 0 c hence, add inverted zero (PID controller) 40 db 1 Hz 10 Hz 100 Hz 1 khz 10 khz 100 khz 56

Improved compensator (PID) 1+ s 1+ L z s G c (s)=g cm 40 db 20 db 0 db 20 db 40 db 1+ s p G c G c G c G cm c L 45 /decade G c 9 /10 9/decade /10 L /10 10 9 L 10 45 /dec 9 18 1 Hz 10 Hz 100 Hz 1 khz 10 khz 100 khz add inverted zero to PD compensator, without changing dc gain or corner requencies choose L to be c /10, so that phase margin is unchanged 57

T(s) and 1/(1+T(s)), with PID compensator 60 db 40 db T 20 db Q 0 0 db L 0 z c 20 db 40 db 1 1+T Q 0 60 db 80 db 1 Hz 10 Hz 100 Hz 1 khz 10 khz 100 khz 58

Open-loop line-to-output transer unction and output impedance G vg (s)=d 1 1+s L R + s2 LC same poles as control-to-output transer unction standard orm: G vg (s)=g 1 g0 1+ s + Q 0 s 0 0 Output impedance: Z out (s)=r 1 sc sl = 2 sl 1+s L R + s2 LC 50

Line-to-output transer unction v v g 20 db 0 db G vg (0) = D Q 0 20 db 40 db 60 db Open-loop G vg 20 db/decade D T u0 G cm L 0 c 80 db Closed-loop G vg 1+T 40 db/decade 100 db 1 Hz 10 Hz 100 Hz 1 khz 10 khz 100 khz 59