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60V N-Channel MOSFET QFET TM General Description These N-Channel enhancement mode power field effect transistors are produced using Fairchild s proprietary, planar stripe, DMOS technology. This advanced technology has been especially tailored to minimize on-state resistance, provide superior switching performance, and withstand high energy pulse in the avalanche and commutation mode. These devices are well suited for low voltage applications such as automotive, DC/ DC converters, and high efficiency switching for power management in portable and battery operated products. Features 50A, 60V, R DS(on) = 0.022Ω @ = 10 V Low gate charge ( typical 31 nc) Low Crss ( typical 65 pf) Fast switching 100% avalanche tested Improved dv/dt capability 175 C maximum junction temperature rating D! G D S TO-220 FQP Series G "! " "! "! S Absolute Maximum Ratings T C = 25 C unless otherwise noted Symbol Parameter Units S Drain-Source Voltage 60 V I D Drain Current - Continuous (T C = 25 C) 50 A - Continuous (T C = 100 C) 35.4 A I DM Drain Current - Pulsed (Note 1) 200 A S Gate-Source Voltage ± 25 V E AS Single Pulsed Avalanche Energy (Note 2) 490 mj I AR Avalanche Current (Note 1) 50 A E AR Repetitive Avalanche Energy (Note 1) 12 mj dv/dt Peak Diode Recovery dv/dt (Note 3) 7.0 V/ns P D Power Dissipation (T C = 25 C) 120 W - Derate above 25 C 0.8 W/ C T J, T STG Operating and Storage Temperature Range -55 to +175 C T L Maximum lead temperature for soldering purposes, 1/8" from case for 5 seconds 300 C Thermal Characteristics Symbol Parameter Typ Max Units R θjc Thermal Resistance, Junction-to-Case -- 1.24 C/W R θcs Thermal Resistance, Case-to-Sink 0.5 -- C/W R θja Thermal Resistance, Junction-to-Ambient -- 62.5 C/W 2003 Fairchild Semiconductor Corporation Rev. A2, March 2003
Electrical Characteristics T C = 25 C unless otherwise noted Symbol Parameter Test Conditions Min Typ Max Units Off Characteristics BS Drain-Source Breakdown Voltage = 0 V, I D = 250 µa 60 -- -- V BS Breakdown Voltage Temperature / T J Coefficient I D = 250 µa, Referenced to 25 C -- 0.06 -- V/ C I DSS = 60 V, = 0 V -- -- 1 µa Zero Gate Voltage Drain Current = 48 V, T C = 150 C -- -- 10 µa I GSSF Gate-Body Leakage Current, Forward = 25 V, = 0 V -- -- 100 na I GSSR Gate-Body Leakage Current, Reverse = -25 V, = 0 V -- -- -100 na On Characteristics (th) Gate Threshold Voltage =, I D = 250 µa 2.0 -- 4.0 V R DS(on) Static Drain-Source V On-Resistance GS = 10 V, I D = 25 A -- 0.018 0.022 Ω g FS Forward Transconductance = 25 V, I D = 25 A (Note 4) -- 22 -- S Dynamic Characteristics C iss Input Capacitance = 25 V, = 0 V, -- 1180 1540 pf C oss Output Capacitance f = 1.0 MHz -- 440 580 pf C rss Reverse Transfer Capacitance -- 65 90 pf Switching Characteristics t d(on) Turn-On Delay Time -- 15 40 ns V DD = 30 V, I D = 25 A, t r Turn-On Rise Time R G = 25 Ω -- 105 220 ns t d(off) Turn-Off Delay Time -- 60 130 ns t f Turn-Off Fall Time (Note 4, 5) -- 65 140 ns Q g Total Gate Charge = 48 V, I D = 50 A, -- 31 41 nc Q gs Gate-Source Charge = 10 V -- 8 -- nc Q gd Gate-Drain Charge (Note 4, 5) -- 13 -- nc Drain-Source Diode Characteristics and Maximum Ratings I S Maximum Continuous Drain-Source Diode Forward Current -- -- 50 A I SM Maximum Pulsed Drain-Source Diode Forward Current -- -- 200 A V SD Drain-Source Diode Forward Voltage = 0 V, I S = 50 A -- -- 1.5 V t rr Reverse Recovery Time = 0 V, I S = 50 A, -- 52 -- ns Q rr Reverse Recovery Charge di F / dt = 100 A/µs (Note 4) -- 75 -- nc Notes: 1. Repetitive Rating : Pulse width limited by maximum junction temperature 2. L = 230µH, I AS = 50A, V DD = 25V, R G = 25 Ω, Starting T J = 25 C 3. I SD 50A, di/dt 300A/µs, V DD BS, Starting T J = 25 C 4. Pulse Test : Pulse width 300µs, Duty cycle 2% 5. Essentially independent of operating temperature 2003 Fairchild Semiconductor Corporation Rev. A2, March 2003
Typical Characteristics I D, Drain Current [A] 10 2 10 1 10 0 Top : 15.0 V 10.0 V 8.0 V 7.0 V 6.0 V 5.5 V 5.0 V Bottom : 4.5 V Note : 1. 250μ s Pulse Test 2. T C = 25 10-1 10 0 10 1, Drain-Source Voltage [V] I D, Drain Current [A] 10 2 10 1 175 25-55 10 0 2 4 6 8 10, Gate-Source Voltage [V] 1. = 30V 2. 250μ s Pulse Test Figure 1. On-Region Characteristics Figure 2. Transfer Characteristics 0.05 R DS(ON) [Ω ], Drain-Source On-Resistance 0.04 0.03 0.02 0.01 = 10V = 20V Note : T J = 25 0.00 0 50 100 150 200 I D, Drain Current [A] Figure 3. On-Resistance Variation vs. Drain Current and Gate Voltage I DR, Reverse Drain Current [A] 10 2 10 1 175 25 1. = 0V 2. 250μ s Pulse Test 10 0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 V SD, Source-Drain voltage [V] Figure 4. Body Diode Forward Voltage Variation vs. Source Current and Temperature 3000 2500 C iss = C gs + C gd (C ds = shorted) C oss = C ds + C gd C rss = C gd 12 10 = 30V Capacitance [pf] 2000 1500 1000 500 C oss C iss C rss 1. = 0 V 2. f = 1 MHz, Gate-Source Voltage [V] 8 6 4 2 = 48V Note : I D = 50A 0 10-1 10 0 10 1, Drain-Source Voltage [V] Figure 5. Capacitance Characteristics 0 0 5 10 15 20 25 30 35 Q G, Total Gate Charge [nc] Figure 6. Gate Charge Characteristics 2003 Fairchild Semiconductor Corporation Rev. A2, March 2003
Typical Characteristics (Continued) 1.2 2.5 BS, (Normalized) Drain-Source Breakdown Voltage 1.1 1.0 0.9 1. = 0 V 2. I D = 250 μ A R DS(ON), (Normalized) Drain-Source On-Resistance 2.0 1.5 1.0 0.5 1. = 10 V 2. I D = 25 A 0.8-100 -50 0 50 100 150 200 T J, Junction Temperature [ o C] Figure 7. Breakdown Voltage Variation vs. Temperature 0.0-100 -50 0 50 100 150 200 T J, Junction Temperature [ o C] Figure 8. On-Resistance Variation vs. Temperature 10 3 Operation in This Area is Limited by R DS(on) 60 50 I D, Drain Current [A] 10 2 10 1 10 0 1. T C = 25 o C 2. T J = 175 o C 3. Single Pulse 10-1 10 0 10 1 10 2 DC 10 ms 1 ms 100μ s I D, Drain Current [A] 40 30 20 10 0 25 50 75 100 125 150 175, Drain-Source Voltage [V] T C, Case Temperature [ ] Figure 9. Maximum Safe Operating Area Figure 10. Maximum Drain Current vs. Case Temperature Z θ JC (t), Therm al Response 10 0 10-1 D=0.5 0.2 0.1 0.05 0.02 0.01 sing le p ulse 1. Z θ JC (t) = 1.24 /W M ax. 2. D u t y Fa c t o r, D = t 1 /t 2 3. T JM - T C = P DM * Z θ JC (t) P DM t 1 t 2 10-2 10-5 10-4 10-3 10-2 10-1 10 0 10 1 t 1, Square W ave Pulse Duration [sec] Figure 11. Transient Thermal Response Curve 2003 Fairchild Semiconductor Corporation Rev. A2, March 2003
Gate Charge Test Circuit & Waveform 12V 200nF 50KΩ 300nF Same Type as DUT 10V Q g Q gs Q gd 3mA DUT Charge Resistive Switching Test Circuit & Waveforms R L 90% R G V DD 10V DUT 10% t d(on) t r t d(off) tf t on t off Unclamped Inductive Switching Test Circuit & Waveforms L 1 E AS = ---- LI 2 2 AS BS -------------------- BS -V DD I D BS I AS R G V DD I D (t) 10V DUT V DD (t) t p t p Time 2003 Fairchild Semiconductor Corporation Rev. A2, March 2003
Peak Diode Recovery dv/dt Test Circuit & Waveforms DUT + _ I SD L Driver R G Same Type as DUT V DD dv/dt controlled by RG I SD controlled by pulse period ( Driver ) Gate Pulse Width D = -------------------------- Gate Pulse Period 10V I FM, Body Diode Forward Current I SD ( DUT ) di/dt I RM Body Diode Reverse Current ( DUT ) Body Diode Recovery dv/dt V SD V DD Body Diode Forward Voltage Drop 2003 Fairchild Semiconductor Corporation Rev. A2, March 2003
Package Dimensions TO-220 9.90 ±0.20 4.50 ±0.20 (1.70) 1.30 ±0.10 (8.70) ø3.60 ±0.10 2.80 ±0.10 1.30 +0.10 0.05 9.20 ±0.20 13.08 ±0.20 (1.46) (1.00) 1.27 ±0.10 (45 ) (3.00) (3.70) 1.52 ±0.10 15.90 ±0.20 10.08 ±0.30 18.95MAX. 2.54TYP [2.54 ±0.20] 0.80 ±0.10 2.54TYP [2.54 ±0.20] 0.50 +0.10 0.05 2.40 ±0.20 10.00 ±0.20 Dimensions in Millimeters 2003 Fairchild Semiconductor Corporation Rev. A2, March 2003
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