QFET TM FQP13N06L. Features G D. TO-220 FQP Series

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60V LOGIC N-Channel MOSFET May 2001 QFET TM General Description These N-Channel enhancement mode power field effect transistors are produced using Fairchild s proprietary, planar stripe, DMOS technology. This advanced technology has been especially tailored to minimize on-state resistance, provide superior switching performance, and withstand high energy pulse in the avalanche and commutation mode. These devices are well suited for low voltage applications such as automotive, DC/ DC converters, and high efficiency switching for power management in portable and battery operated products. Features 13.6A, 60V, R DS(on) = 0.11Ω @ = 10 V Low gate charge ( typical 4.8 nc) Low Crss ( typical 17 pf) Fast switching 100% avalanche tested Improved dv/dt capability 175 C maximum junction temperature rating D! G D S TO-220 FQP Series G "! " "! "! S Absolute Maximum Ratings T C = 25 C unless otherwise noted Symbol Parameter Units S Drain-Source Voltage 60 V I D Drain Current - Continuous (T C = 25 C) 13.6 A - Continuous (T C = 100 C) 9.6 A I DM Drain Current - Pulsed (Note 1) 54.4 A S Gate-Source Voltage ± 20 V E AS Single Pulsed Avalanche Energy (Note 2) 90 mj I AR Avalanche Current (Note 1) 13.6 A E AR Repetitive Avalanche Energy (Note 1) 4.5 mj dv/dt Peak Diode Recovery dv/dt (Note 3) 7.0 V/ns P D Power Dissipation (T C = 25 C) 45 W - Derate above 25 C 0.3 W/ C T J, T STG Operating and Storage Temperature Range -55 to +175 C T L Maximum lead temperature for soldering purposes, 1/8" from case for 5 seconds 300 C Thermal Characteristics Symbol Parameter Typ Max Units R θjc Thermal Resistance, Junction-to-Case -- 3.35 C/W R θcs Thermal Resistance, Case-to-Sink 0.5 -- C/W R θja Thermal Resistance, Junction-to-Ambient -- 62.5 C/W

Electrical Characteristics T C = 25 C unless otherwise noted Symbol Parameter Test Conditions Min Typ Max Units Off Characteristics BS Drain-Source Breakdown Voltage = 0 V, I D = 250 µa 60 -- -- V BS Breakdown Voltage Temperature / T J Coefficient I D = 250 µa, Referenced to 25 C -- 0.05 -- V/ C I DSS = 60 V, = 0 V -- -- 1 µa Zero Gate Voltage Drain Current = 48 V, T C = 150 C -- -- 10 µa I GSSF Gate-Body Leakage Current, Forward = 20 V, = 0 V -- -- 100 na I GSSR Gate-Body Leakage Current, Reverse = -20 V, = 0 V -- -- -100 na On Characteristics (th) Gate Threshold Voltage =, I D = 250 µa 1.0 -- 2.5 V R DS(on) Static Drain-Source On-Resistance Notes: 1. Repetitive Rating : Pulse width limited by maximum junction temperature 2. L = 570µH, I AS = 13.6A, = 25V, R G = 25 Ω, Starting T J = 25 C 3. I SD 13.6A, di/dt 300A/µs, BS, Starting T J = 25 C 4. Pulse Test : Pulse width 300µs, Duty cycle 2% 5. Essentially independent of operating temperature = 10 V, I D = 6.8 A = 5 V, I D = 6.8 A -- -- 0.088 0.110 g FS Forward Transconductance = 25 V, I D = 6.8 A (Note 4) -- 7 -- S Dynamic Characteristics C iss Input Capacitance = 25 V, = 0 V, -- 270 350 pf C oss Output Capacitance f = 1.0 MHz -- 95 125 pf C rss Reverse Transfer Capacitance -- 17 23 pf Switching Characteristics t d(on) Turn-On Delay Time -- 8 25 ns = 30 V, I D = 6.8 A, t r Turn-On Rise Time R G = 25 Ω -- 90 190 ns t d(off) Turn-Off Delay Time -- 20 50 ns t f Turn-Off Fall Time (Note 4, 5) -- 40 90 ns Q g Total Gate Charge = 48 V, I D = 13.6 A, -- 4.8 6.4 nc Q gs Gate-Source Charge = 5 V -- 1.6 -- nc Q gd Gate-Drain Charge (Note 4, 5) -- 2.7 -- nc Drain-Source Diode Characteristics and Maximum Ratings I S Maximum Continuous Drain-Source Diode Forward Current -- -- 13.6 A I SM Maximum Pulsed Drain-Source Diode Forward Current -- -- 54.4 A V SD Drain-Source Diode Forward Voltage = 0 V, I S = 13.6 A -- -- 1.5 V t rr Reverse Recovery Time = 0 V, I S = 13.6 A, -- 45 -- ns Q rr Reverse Recovery Charge di F / dt = 100 A/µs (Note 4) -- 45 -- nc 0.11 0.14 Ω 2001 Fairchild Semiconductor Corporation Rev. A1. May 2001

Typical Characteristics I D, Drain Current [A] 10 1 Top : 10.0 V 8.0 V 6.0 V 5.0 V 4.5 V 4.0 V 3.5 V Bottom : 3.0 V I D, Drain Current [A] 10 1 175 1. 250μ s Pulse Test 2. T C = 25 10-1 10 1, Drain-Source Voltage [V] Figure 1. On-Region Characteristics 25-55 10-1 0 2 4 6 8 10, Gate-Source Voltage [V] 1. = 25V 2. 250μ s Pulse Test Figure 2. Transfer Characteristics 250 200 R DS(ON) [mω ], Drain-Source On-Resistance 150 100 50 = 5V = 10V Note : T J = 25 0 0 10 20 30 40 I D, Drain Current [A] Figure 3. On-Resistance Variation vs. Drain Current and Gate Voltage I DR, Reverse Drain Current [A] 10 1 175 25 1. = 0V 2. 250μ s Pulse Test 10-1 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 V SD, Source-Drain voltage [V] Figure 4. Body Diode Forward Voltage Variation vs. Source Current and Temperature Capacitance [pf] 800 600 400 200 C oss C iss C rss C iss = C gs + C gd (C ds = shorted) C oss = C ds + C gd C rss = C gd 1. = 0 V 2. f = 1 MHz, Gate-Source Voltage [V] 12 10 8 6 4 2 = 30V = 48V Note : I D = 13.6A 0 10-1 10 1, Drain-Source Voltage [V] Figure 5. Capacitance Characteristics 0 0 2 4 6 8 10 Q G, Total Gate Charge [nc] Figure 6. Gate Charge Characteristics

Typical Characteristics (Continued) 1.2 2.5 BS, (Normalized) Drain-Source Breakdown Voltage 1.1 1.0 0.9 1. = 0 V 2. I D = 250 μ A R DS(ON), (Normalized) Drain-Source On-Resistance 2.0 1.5 1.0 0.5 1. = 10 V 2. I D = 6.8 A 0.8-100 -50 0 50 100 150 200 T J, Junction Temperature [ o C] Figure 7. Breakdown Voltage Variation vs. Temperature 0.0-100 -50 0 50 100 150 200 T J, Junction Temperature [ o C] Figure 8. On-Resistance Variation vs. Temperature 15 10 2 Operation in This Area is Limited by R DS(on) 100 µs 12 I D, Drain Current [A] 10 1 10-1 1. T C = 25 o C 2. T J = 175 o C 3. Single Pulse 10-1 10 1 10 2 DC 10 ms 1 ms I D, Drain Current [A] 9 6 3 0 25 50 75 100 125 150 175, Drain-Source Voltage [V] T C, Case Temperature [ ] Figure 9. Maximum Safe Operating Area Figure 10. Maximum Drain Current vs. Case Temperature Z θ JC (t), Therm al Response 10-1 D=0.5 0.2 0.1 0.05 0.02 0.01 sing le p ulse 1. Z θ JC (t) = 3.35 /W M ax. 2. D u t y Fa c t o r, D = t 1 /t 2 3. T JM - T C = P DM * Z θ JC (t) P DM t 1 t 2 10-2 10-5 10-4 10-3 10-2 10-1 10 1 t 1, Square W ave Pulse Duration [sec] Figure 11. Transient Thermal Response Curve

Gate Charge Test Circuit & Waveform 12V 200nF 50KΩ 300nF Same Type as DUT 5V Q g Q gs Q gd 3mA DUT Charge Resistive Switching Test Circuit & Waveforms R L 90% R G 5V DUT 10% t d(on) t r t d(off) tf t on t off Unclamped Inductive Switching Test Circuit & Waveforms L 1 E AS = ---- LI 2 2 AS BS -------------------- BS - I D BS I AS R G I D (t) 10V DUT (t) t p t p Time

Peak Diode Recovery dv/dt Test Circuit & Waveforms DUT + _ I SD L Driver R G Same Type as DUT dv/dt controlled by RG I SD controlled by pulse period ( Driver ) Gate Pulse Width D = -------------------------- Gate Pulse Period 10V I FM, Body Diode Forward Current I SD ( DUT ) di/dt I RM Body Diode Reverse Current ( DUT ) Body Diode Recovery dv/dt V SD Body Diode Forward Voltage Drop

Package Dimensions TO-220 9.90 ±0.20 4.50 ±0.20 (1.70) 1.30 ±0.10 (8.70) ø3.60 ±0.10 2.80 ±0.10 1.30 +0.10 0.05 9.20 ±0.20 13.08 ±0.20 (1.46) (1.00) 1.27 ±0.10 (45 ) (3.00) (3.70) 1.52 ±0.10 15.90 ±0.20 10.08 ±0.30 18.95MAX. 2.54TYP [2.54 ±0.20] 0.80 ±0.10 2.54TYP [2.54 ±0.20] 0.50 +0.10 0.05 2.40 ±0.20 10.00 ±0.20

TRADEMARKS The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks. ACEx Bottomless CoolFET CROSSVOLT DenseTrench DOME EcoSPARK E 2 CMOS EnSigna FACT FACT Quiet Series DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. LIFE SUPPORT POLICY FAST FASTr FRFET GlobalOptoisolator GTO HiSeC ISOPLANAR LittleFET MicroFET MICROWIRE OPTOLOGIC FAIRCHILD S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, or (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in significant injury to the user. OPTOPLANAR PACMAN POP PowerTrench QFET QS QT Optoelectronics Quiet Series SLIENT SWITCHER SMART START Stealth SuperSOT -3 SuperSOT -6 SuperSOT -8 SyncFET TinyLogic UHC UltraFET VCX 2. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Product Status Definition Advance Information Formative or In Design This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. Preliminary First Production This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. No Identification Needed Full Production This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. Obsolete Not In Production This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only. 2001 Fairchild Semiconductor Corporation Rev. H2

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