HA MHz, High Slew Rate, High Output Current Buffer. Description. Features. Applications. Ordering Information. Pinouts.

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Transcription:

SEMICONDUCTOR HA-2 November 99 Features Voltage Gain...............................99 High Input Impedance.................... kω Low Output Impedance....................... Ω Very High Slew Rate.................... V/µs Very Wide Bandwidth.................... MHz High Output Current..................... ±2mA Pulsed Output Current.................... ma Monolithic Construction Applications Line Driver Data Acquisition MHz Buffer High Power Current Booster High Power Current Source Sample and Holds Radar Cable Driver Video Products Description MHz, High Slew Rate, High Output Current Buffer The HA-2 is a monolithic, wideband, high slew rate, high output current, buffer amplifier. Utilizing the advantages of the Harris D.I. technologies, the HA-2 current buffer offers V/µs slew rate with MHz of bandwidth. The ±2mA output current capability is enhanced by a Ω output impedance. The monolithic HA-2 will replace the hybrid LH2 with corresponding performance increases. These characteristics range from the kω input impedance to the increased output voltage swing. Monolithic design technologies have allowed a more precise buffer to be developed with more than an order of magnitude smaller gain error. The HA-2 will provide many present hybrid users with a higher degree of reliability and at the same time increase overall circuit performance. For the military grade product, refer to the HA-2/ datasheet. Ordering Information PART NUMBER (BRAND) TEMP. RANGE ( o C) PACKAGE PKG. NO. HA2-2-2 - to 2 Pin Metal Can T.C HA2-2- to Pin Metal Can T.C HA-2- to Ld PDIP E. HAP2- to 2 Ld PLCC N2. HA-2-2 - to 2 Ld CERDIP F.A HA-2- to Ld CERDIP F.A HA9P2- to Ld SOIC M. (H2) HA9P2-9 (H29) - to Ld SOIC M. Pinouts HA-2 (PDIP, CERDIP, SOIC) TOP VIEW HA-2 (PLCC) TOP VIEW HA-2 (METAL CAN) TOP VIEW 2 2 2 9 9 2 2 (CASE) CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures. Copyright Harris Corporation 99-29 File Number 292.2

HA-2 Absolute Maximum Ratings Voltage Between V+ and V- Terminals.................... V Input Voltage................................... to Output Current (Continuous)....................... ±2mA Output Current (ms On, s Off)................... ±ma Operating Conditions Temperature Range HA-2-2............................... - o C to 2 o C HA-2-................................. o C to o C HA-2-9................................ - o C to o C Thermal Information Thermal Resistance (Typical, Note 2) θ JA ( o C/W) θ JC ( o C/W) CERDIP Package 2 PDIP Package 92 N/A Metal Can Package PLCC Package N/A SOIC Package N/A Maximum Junction Temperature (Hermetic Packages, Note )... o C Maximum Junction Temperature (Plastic Packages, Note )..... o C Maximum Storage Temperature Range......... - o C to o C Maximum Lead Temperature (Soldering s)............. o C (PLCC and SOIC - Lead Tips Only) CAUTION: Stresses above those listed in Absolute Maximum Ratings may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. NOTES:. Maximum power dissipation, including load conditions, must be designed to maintain the maximum junction temperature below o C for the ceramic and can packages, and below o C for the plastic packages. 2. θ JA is measured with the component mounted on an evaluation PC board in free air. Electrical Specifications V SUPPLY = ±2V to ±V, R S = Ω, R L = kω, C L = pf, Unless Otherwise Specified TEST TEMP HA-2-2 HA-2-, -9 PARAMETER CONDITIONS ( o C) M TYP MAX M TYP MAX UNITS PUT CHARACTERISTICS Offset Voltage 2-2 - 2 mv Full - - mv Average Offset Voltage Drift Full - - - - µv/ ο C Bias Current 2-2 - 2 µa Full -. - 2. µa Input Resistance Full. -. - MΩ Input Noise Voltage Hz-MHz 2 - - - - µv P-P TRANSFER CHARACTERISTICS Voltage Gain R L = Ω 2 -.9 - -.9 - V/V (V = ±V) R L = Ω 2 -.9 - -.9 - V/V R L = kω 2 -.99 - -.99 - V/V R L = kω Full.9 - -.9 - - V/V -db Bandwidth V = V P-P 2 - - - - MHz AC Current Gain 2 - - - - A/mA PUT CHARACTERISTICS Output Voltage Swing R L = Ω 2 ± ±. - ± ±.2 - V R L = kω, Full ± ±. - ± ±.9 - V R L = kω, V S = ±2V Full ± ±. - ± ±. - V Output Current V = ±V, R L = Ω 2-22 - - 22 - ma Output Resistance Full - - Ω Harmonic Distortion V = V RMS, f = khz 2 - <. - - <. - % TRANSIENT RESPONSE Full Power Bandwidth (Note ) 2-2. - - 2. - MHz Rise Time 2 -. - -. - ns Propagation Delay 2-2 - - 2 - ns Overshoot 2 - - - - % Slew Rate 2.. -.. - V/ns Settling Time To.% 2 - - - - ns Differential Gain R L = Ω 2 -. - -. - % Differential Phase R L = Ω 2 -.22 - -.22 - Degrees -29

HA-2 Electrical Specifications V SUPPLY = ±2V to ±V, R S = Ω, R L = kω, C L = pf, Unless Otherwise Specified (Continued) TEST TEMP HA-2-2 HA-2-, -9 PARAMETER CONDITIONS ( o C) M TYP MAX M TYP MAX UNITS POWER REQUIREMENTS Supply Current 2 -. - -. - ma Full - - - - ma Power Supply Rejection Ratio A V = V Full - - db NOTE:. FPBW = Slew Rate -------------------------- ;V. 2πV P = V PEAK Test Circuit and Waveforms R S +V -V R L FIGURE. LARGE AND SMALL SIGNAL RESPONSE V V V V R S = Ω, R L = Ω SMALL SIGNAL WAVEFORMS R S = Ω, R L = kω SMALL SIGNAL WAVEFORMS V V V V R S = Ω, R L = Ω LARGE SIGNAL WAVEFORMS R S = Ω, R L = kω LARGE SIGNAL WAVEFORMS -299

Q Q 2 HA-2 Schematic Diagram R 9 R R N Q 9 R R R Q 2 Q 2 Q 2 Q Q Q 2 Q 9 Q 2 Q Q Q R Q Q R Q 2 R N2 Q Q Q 22 Q 2 Q Q 2 R Q Q Q Q R R 2 R R 2 R N Application Information Layout Considerations The wide bandwidth of the HA-2 necessitates that high frequency circuit layout procedures be followed. Failure to follow these guidelines can result in marginal performance. Probably the most crucial of the RF/video layout rules is the use of a ground plane. A ground plane provides isolation and minimizes distributed circuit capacitance and inductance which will degrade high frequency performance. Other considerations are proper power supply bypassing and keeping the input and output connections as short as possible which minimizes distributed capacitance and reduces board space. Power Supply Decoupling For optimal device performance, it is recommended that the positive and negative power supplies be bypassed with capacitors to ground. Ceramic capacitors ranging in value from. to.µf will minimize high frequency variations in supply voltage, while low frequency bypassing requires larger valued capacitors since the impedance of the capacitor is dependent on frequency. It is also recommended that the bypass capacitors be connected close to the HA-2 (preferably directly to the supply pins). Operation at Reduced Supply Levels The HA-2 can operate at supply voltage levels as low as ±V and lower. Output swing is directly affected as well as slight reductions in slew rate and bandwidth. Short Circuit Protection The output current can be limited by using the following circuit: V+ R LIM = ------------------------- = I MAX V- ------------------------- I MAX V+ R LIM R LIM I MAX = 2mA (CONTUOUS) V- Capacitive Loading The HA-2 will drive large capacitive loads without oscillation but peak current limits should not be exceeded. Following the formula I = Cdv/dt implies that the slew rate or the capacitive load must be controlled to keep peak current below the maximum or use the current limiting approach as shown. The HA-2 can become unstable with small capacitive loads (pf) if certain precautions are not taken. Stability is enhanced by any one of the following: a source resistance in series with the input of Ω to kω; increasing capacitive load to pf or greater; decreasing C LOAD to 2pF or less; adding an output resistor of Ω to Ω; or adding feedback capacitance of pf or greater. Adding source resistance generally yields the best results. -

HA-2. MAXIMUM POWER DISSIPATION (W)...2.....2 CAN SOIC PLCC CERDIP PDIP QUIESCENT POWER DISSIPATION AT ±V SUPPLIES. 2 2 T JMAX T A P DMAX = ------------------------------------------- θ JC + θ CS + θ SA Where: T JMAX = Maximum Junction Temperature of the Device T A = Ambient θ JC = Junction to Case Thermal Resistance θ CS = Case to Heat Sink Thermal Resistance θ SA = Heat Sink to Ambient Thermal Resistance T JMAX T A Graph is based on: P DMAX = ------------------------------- θ JA FIGURE 2. FREE AIR POWER DISSIPATION Typical Application +2V R S R M RG - V V Ω -2V Ω V R L Ω V Typical Performance Curves FIGURE. COAXIAL CABLE DRIVER - Ω SYSTEM 9, R S = Ω 9, R S = Ω VOLTAGE GA (db) - - -9-2 - GA PHASE o o 9 o o PHASE SHIFT VOLTAGE GA (db) - - -9-2 - GA PHASE o o 9 o o PHASE SHIFT - FREQUEY (MHz) o - FREQUEY (MHz) o FIGURE. GA/PHASE vs FREQUEY (R L = kω) FIGURE. GA/PHASE vs FREQUEY (R L = Ω) -

HA-2 Typical Performance Curves (Continued) VOLTAGE GA (V/V).99.992.99.9.9.9.92.9 V = -V TO +V VOLTAGE GA (V/V).99.99.99.99.99.99 V = TO +V V = TO -V.9.9.9 - - -2 2 2.992.99 - - -2 2 2 FIGURE. VOLTAGE GA vs TEMPERATURE (R L = Ω) FIGURE. VOLTAGE GA vs TEMPERATURE (R L = kω) OFFSET VOLTAGE (mv) 2 - -2 - - - - - - -9 - - - - -2 2 2 BIAS CURRENT (µa) 2 - - -2 2 2 FIGURE. OFFSET VOLTAGE vs TEMPERATURE FIGURE 9. BIAS CURRENT vs TEMPERATURE, R LOAD = Ω 9, I = ma PUT VOLTAGE (V) 2 +V -V SUPPLY CURRENT (ma) - - -2 2 2 - - -2 2 2 FIGURE. MAXIMUM PUT VOLTAGE vs TEMPERATURE FIGURE. SUPPLY CURRENT vs TEMPERATURE -2

HA-2 Typical Performance Curves (Continued) SUPPLY CURRENT (ma) 2 I = ma 2 o C, 2 o C - o C IMPEDAE (Ω) K K Z Z 2 2 SUPPLY VOLTAGE (±V) FIGURE 2. SUPPLY CURRENT vs SUPPLY VOLTAGE K M M M FREQUEY (Hz) FIGURE. PUT/PUT IMPEDAE vs FREQUEY V MAX, V P-P AT khz 2 22 2 2 9 2 9 T A = 2 o C, T A = - o C T A = 2 o C R LOAD = Ω 2 SUPPLY VOLTAGE (±V) PSRR (db) 2 K K M M FREQUEY (Hz) M FIGURE. V MAXIMUM vs V SUPPLY FIGURE. PSRR vs FREQUEY R L = T A = 2 o C SLEW RATE (V/µs) 2 V - V (mv) - R L = K - R L = 9 2 SUPPLY VOLTAGE (±V) - - - - - -2 2 PUT VOLTAGE (VOLTS) FIGURE. SLEW RATE vs SUPPLY VOLTAGE FIGURE. GA ERROR vs PUT VOLTAGE -

HA-2 Die Characteristics DIE DIMENSIONS: mils x mils x 9 mils 2µm x 2µm x µm METALLIZATION: Type: Al, % Cu Thickness: 2kÅ ±2kÅ PASSIVATION: SUBSTRATE POTENTIAL (Powered Up): V- TRANSISTOR COUNT: 2 PROCESS: Bipolar Dielectric Isolation Type: Nitride Thickness: kå ±.kå Metallization Mask Layout HA-2 (ALT) (ALT) -