Order code V T Jmax R DS(on) max. I D

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Transcription:

Datasheet N-channel 600 V, 0.340 Ω typ., 11 A MDmesh M2 EP Power MOSFET in a TO-220 package Features TAB Order code V DS @ T Jmax R DS(on) max. I D STP15N60M2-EP 650 V 0.378 Ω 11 A TO-220 D(2, TAB) 1 2 3 Extremely low gate charge Excellent output capacitance (C OSS ) profile Very low turn-off switching losses 100% avalanche tested Zener-protected Applications G(1) Switching applications Tailored for very high frequency converters (f > 150 khz) S(3) AM01475V1 Description This device is an N-channel Power MOSFET developed using MDmesh M2 enhanced performance (EP) technology. Thanks to its strip layout and an improved vertical structure, the device exhibits low on-resistance, optimized switching characteristics with very low turn-off switching losses, rendering it suitable for the most demanding very high frequency converters. Product status STP15N60M2-EP Product summary Order code Marking Package Packing STP15N60M2-EP 15N60M2EP TO-220 Tube DS10778 - Rev 4 - June 2018 For further information contact your local STMicroelectronics sales office. www.st.com

Electrical ratings 1 Electrical ratings Table 1. Absolute maximum ratings Symbol Parameter Value Unit V GS Gate-source voltage ±25 V I D Drain current (continuous) at T C = 25 C 11 A I D Drain current (continuous) at T C = 100 C 7 A I (1) DM Drain current (pulsed) 44 A P TOT Total dissipation at T C = 25 C 110 W dv/dt (2) Peak diode recovery voltage slope 15 V/ns dv/dt (3) MOSFET dv/dt ruggedness 50 V/ns T stg T j Storage temperature range Operating junction temperature range -55 to 150 C 1. Pulse width limited by safe operating area. 2. I SD 11 A, di/dt 400 A/µs, V DS peak < V (BR)DSS, V DD = 400 V 3. V DS 480 V Table 2. Thermal data Symbol Parameter Value Unit R thj-case Thermal resistance junction-case 1.14 C/W R thj-amb Thermal resistance junction-ambient 62.5 C/W Table 3. Avalanche characteristics Symbol Parameter Value Unit I AR Avalanche current, repetitive or not repetitive (pulse width limited by T jmax ) 2.8 A E AS Single pulse avalanche energy (starting T j = 25 C, I D = I AR, V DD = 50 V) 125 mj DS10778 - Rev 4 page 2/14

Electrical characteristics 2 Electrical characteristics T C = 25 C unless otherwise specified Table 4. On/off states Symbol Parameter Test conditions Min. Typ. Max. Unit V (BR)DSS Drain-source breakdown voltage V GS = 0 V, I D = 1 ma 600 V V GS = 0 V, V DS = 600 V 1 µa I DSS Zero gate voltage drain current V GS = 0 V, V DS = 600 V, T C = 125 C (1) 100 µa I GSS Gate-body leakage current V DS = 0 V, V GS = ±25 V ±10 µa V GS(th) Gate threshold voltage V DS = V GS, I D = 250 µa 3.25 4 4.75 V R DS(on) Static drain-source on-resistance V GS = 10 V, I D = 5.5 A 0.340 0.378 Ω 1. Defined by design, not subject to production test. Table 5. Dynamic Symbol Parameter Test conditions Min. Typ. Max. Unit C iss Input capacitance - 590 - pf C oss Output capacitance V DS = 100 V, f = 1 MHz, V GS = 0 V - 30 - pf C rss Reverse transfer capacitance - 1.1 - pf C oss eq. (1) Equivalent output capacitance V DS = 0 to 480 V, V GS = 0 V - 148 - pf R G Intrinsic gate resistance f = 1 MHz, I D = 0 A - 7 - Ω Q g Total gate charge V DD = 480 V, I D = 11 A, - 17 - nc Q gs Gate-source charge V GS = 0 to 10 V - 3.1 - nc (see Figure 15. Test circuit for gate Q gd Gate-drain charge charge behavior) - 7.3 - nc 1. C oss eq. is defined as a constant equivalent capacitance giving the same charging time as C oss when V DS increases from 0 to 80% V DSS. Table 6. Switching energy Symbol Parameter Test conditions Min. Typ. Max. Unit E (off) Turn-off energy (from 90% V GS to 0% I D ) V DD = 400 V, I D = 1.5 A, R G = 4.7 Ω, V GS = 10 V V DD = 400 V, I D = 3.5 A, R G = 4.7 Ω, V GS = 10 V - 4.7 - µj - 5.2 - µj DS10778 - Rev 4 page 3/14

Electrical characteristics Table 7. Switching times Symbol Parameter Test conditions Min. Typ. Max. Unit t d(on) Turn-on delay time V DD = 300 V, I D = 5.5 A, - 11 - ns t r Rise time R G = 4.7 Ω, V GS = 10 V - 10 - ns t d(off) Turn-off delay time (see Figure 14. Test circuit for resistive load switching times and - 40 - ns t f Fall time Figure 19. Switching time waveform) - 15 - ns Table 8. Source drain diode Symbol Parameter Test conditions Min. Typ. Max. Unit I SD Source-drain current - 11 A I (1) SDM Source-drain current (pulsed) - 44 A V (2) SD Forward on voltage V GS = 0 V, I SD = 11 A - 1.6 V t rr Reverse recovery time I SD = 11 A, di/dt = 100 A/µs, - 280 ns Q rr Reverse recovery charge V DD = 60 V - 2.7 µc I RRM Reverse recovery current (see Figure 16. Test circuit for inductive load switching and diode - 19.5 A recovery times) t rr Reverse recovery time I SD = 11 A, di/dt = 100 A/µs, - 400 ns Q rr Reverse recovery charge V DD = 60 V, T j = 150 C - 3.8 µc I RRM Reverse recovery current (see Figure 16. Test circuit for inductive load switching and diode recovery times) - 19 A 1. Pulse width is limited by safe operating area. 2. Pulsed: pulse duration = 300 µs, duty cycle 1.5% DS10778 - Rev 4 page 4/14

Electrical characteristics (curves) 2.1 Electrical characteristics (curves) Figure 1. Safe operating area Figure 2. Thermal impedance ID (A) GIPG121220141404MT 10 1 Operation in this area is Limited by max R DS(on) 10µs 100µs 1ms 10ms Tj=150 C Tc=25 C Single pulse 0.1 0.1 1 10 100 VDS(V) Figure 3. Output characteristics Figure 4. Transfer characteristics I D (A) 24 GIPG280220181135OCH V GS = 8, 9, 10 V I D (A) 24 V DS = 17 V GIPG280220181135TCH 20 V GS =7 V 20 16 V GS =6 V 16 12 12 8 8 4 V GS =5 V 4 0 0 4 8 12 16 V DS (V) 0 3 4 5 6 7 V GS (V) Figure 5. Normalized gate threshold voltage vs temperature Figure 6. Normalized V (BR)DSS vs temperature V GS(th) (norm.) 1.1 I D = 250 µa GIPG090220181018VTH V (BR)DSS (norm.) 1.10 I D = 1 ma GIPG090220181020BDV 1.0 1.05 0.9 1.00 0.8 0.95 0.7 0.90 0.6-75 -25 25 75 125 T j ( C) 0.85-75 -25 25 75 125 T j ( C) DS10778 - Rev 4 page 5/14

Electrical characteristics (curves) Figure 7. Static drain-source on-resistance Figure 8. Normalized on-resistance vs temperature RDS(on) (Ω) 0.360 VGS=10V GIPG121220141431MT R DS(on) (norm.) 2.5 V GS = 10 V GIPG090220181019RON 0.350 2.0 1.5 0.340 1.0 0.330 0.5 0.320 0 2 4 6 8 10 ID(A) 0.0-75 -25 25 75 125 T j ( C) Figure 9. Gate charge vs gate-source voltage Figure 10. Capacitance variations V GS (V) 12 10 V DS V DD = 480 V I D = 11 A GIPG280220181136QVG V DS (V) 600 500 C (pf) 10 3 GIPG280220181136CVR C ISS 8 400 10 2 6 300 10 1 C OSS 4 200 f = 1 MHz 2 100 10 0 C RSS 0 0 4 8 12 16 20 0 Q g (nc) 10-1 10-1 10 0 10 1 10 2 V DS (V) Figure 11. Turn-off switching energy vs drain current Figure 12. Source-drain diode forward characteristic Eoff (µj) 5.4 5.2 V DD =400V, R G =4,7Ω,V GS =10V GIPG121220141453MT VSD (V) 1.1 1 GIPG161220141014MT TJ=-50 C 5 0.9 0.8 TJ=25 C 4.8 0.7 TJ=150 C 4.6 0.6 4.4 0.5 1 1.5 2 2.5 3 3.5 ID(A) 0.5 0 2 4 6 8 10 ISD(A) DS10778 - Rev 4 page 6/14

Electrical characteristics (curves) Figure 13. Output capacitance stored energy E OSS (µj) GIPG010320180839EOS 4.8 4 3.2 2.4 1.6 0.8 0 0 100 200 300 400 500 600 V DS (V) DS10778 - Rev 4 page 7/14

Test circuits 3 Test circuits Figure 14. Test circuit for resistive load switching times Figure 15. Test circuit for gate charge behavior VDD VD RL + 2200 μf 3.3 μf VDD VGS 12 V IG= CONST 47 kω 100 Ω 100 nf D.U.T. 1 kω VGS pulse width RG D.U.T. pulse width 2200 μf + 2.7 kω 47 kω VG 1 kω AM01468v1 AM01469v1 Figure 16. Test circuit for inductive load switching and diode recovery times Figure 17. Unclamped inductive load test circuit G 25 Ω A D D.U.T. S B A fast diode B A B G 100 µh 3.3 1000 D µf + µf VDD D.U.T. VD ID L + 2200 µf 3.3 µf VDD + _ RG S Vi pulse width D.U.T. AM01471v1 AM01470v1 Figure 18. Unclamped inductive waveform Figure 19. Switching time waveform V(BR)DSS ton toff VD td(on) tr td(off) tf IDM 90% 10% 90% ID 0 10% VDS VDD VDD VGS 90% 0 10% AM01472v1 AM01473v1 DS10778 - Rev 4 page 8/14

Package information 4 Package mechanical data In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK packages, depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product status are available at: www.st.com. ECOPACK is an ST trademark. DS10778 - Rev 4 page 9/14

TO-220 type A package information 4.1 TO-220 type A package information Figure 20. TO-220 type A package outline 0015988_typeA_Rev_21 DS10778 - Rev 4 page 10/14

TO-220 type A package information Table 9. TO-220 type A package mechanical data Dim. mm Min. Typ. Max. A 4.40 4.60 b 0.61 0.88 b1 1.14 1.55 c 0.48 0.70 D 15.25 15.75 D1 1.27 E 10.00 10.40 e 2.40 2.70 e1 4.95 5.15 F 1.23 1.32 H1 6.20 6.60 J1 2.40 2.72 L 13.00 14.00 L1 3.50 3.93 L20 16.40 L30 28.90 øp 3.75 3.85 Q 2.65 2.95 DS10778 - Rev 4 page 11/14

Revision history Table 10. Document revision history Date Revision Changes 15-Dec-2014 1 First release. 18-Dec-2014 2 12-Mar-2018 3 05-Jun-2018 4 Document status promoted from preliminary data to production data. Updated Table 6: "Dynamic". Minor text changes. Removed maturity status indication from cover page. Updated Section 1 Electrical ratings, Section 2 Electrical characteristics and Section 2.1 Electrical characteristics (curves). Minor text changes. Updated Table 1. Absolute maximum ratings, Table 5. Dynamic, Table 6. Switching energy and Table 8. Source drain diode. Updated Figure 1. Safe operating area and Figure 11. Turn-off switching energy vs drain current. Minor text changes DS10778 - Rev 4 page 12/14

Contents Contents 1 Electrical ratings...2 2 Electrical characteristics...3 2.1 Electrical characteristics (curves)... 5 3 Test circuits...8 4 Package mechanical data...9 4.1 TO-220 type A package information...9 Revision history...12 DS10778 - Rev 4 page 13/14

IMPORTANT NOTICE PLEASE READ CAREFULLY STMicroelectronics NV and its subsidiaries ( ST ) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST s terms and conditions of sale in place at the time of order acknowledgement. Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of Purchasers products. No license, express or implied, to any intellectual property right is granted by ST herein. Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product. ST and the ST logo are trademarks of ST. All other product or service names are the property of their respective owners. Information in this document supersedes and replaces information previously supplied in any prior versions of this document. 2018 STMicroelectronics All rights reserved DS10778 - Rev 4 page 14/14