SLLSB OCTOBER 9 REVISED MAY 995 Meets or Exceeds the Requirements of ANSI Standards EIA/TIA-3-B and -3-E and ITU Recommendations V. and V. Output Slew Rate Control Output Short-Circuit-Current Limiting Wide Supply Voltage Range -Pin Package Designed to Be Interchangeable With National DS9636A W-S A A GND D OR P PACKAGE (TOP VIEW) 3 7 6 5 V CC+ Y Y V CC description The ua9636ac is a dual, single-ended line driver designed to meet ANSI Standards EIA/TIA-3-B and EIA/TIA-3-E and ITU Recommendations V. and V.. The slew rates of both amplifiers are controlled by a single external resistor, R (WS), connected between the wave-shape-control (W-S) terminal and GND. Output current limiting is provided. Inputs are compatible with TTL and CMOS and are diode protected against negative transients. This device operates from ± V and is supplied in an -pin package. The ua9636ac is characterized for operation from C to 7 C. logic symbol logic diagram W-S A A 3 [Slew-Rate] 7 6 Y Y A W-S A 3 7 Y 6 Y This symbol is in accordance with ANSI/IEEE Std 9-9 and IEC Publication 67-. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright 995, Texas Instruments Incorporated POST OFFICE BOX 65533 DALLAS, TEXAS 7565
SLLSB OCTOBER 9 REVISED MAY 995 schematics of inputs and outputs EQUIVALENT OF EACH INPUT TYPICAL OF ALL OUTPUTS VCC + VCC + Current Source Current Source Input Output VCC ± VCC ± absolute maximum ratings over operating free-air temperature range (unless otherwise noted) Positive supply voltage range, V CC+ (see Note )...................................... V CC to 5 V Negative supply voltage range, V CC................................................5 V to 5 V Output voltage, V O........................................................................ ±5 V Output current, I O...................................................................... ±5 ma Continuous total power dissipation..................................... See Dissipation Rating Table Operating free-air temperature range, T A.............................................. C to 7 C Storage temperature range, T stg................................................... 65 C to 5 C Lead temperature,6 mm (/6 inch) from case for seconds............................... 6 C Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTE : All voltage values are with respect to the network ground terminal. PACKAGE recommended operating conditions DISSIPATION RATING TABLE TA 5 C DERATING FACTOR TA = 7 C POWER RATING ABOVE TA = 5 C POWER RATING D 75 mw 5. mw/ C 6 mw P mw. mw/ C 6 mw MIN NOM MAX UNIT Positive supply voltage, VCC+. 3. V Negative supply voltage, VCC. 3. V High-level input voltage, VIH V Low-level input voltage, VIL. V Wave-shaping resistor, R(WS) kω Operating free-air temperature, TA 7 C POST OFFICE BOX 65533 DALLAS, TEXAS 7565
SLLSB OCTOBER 9 REVISED MAY 995 electrical characteristics over recommended ranges of free-air temperature, supply voltage, and wave-shaping resistance (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT VIK Input clamp voltage II = 5 ma..5 V RL = 5 5.6 6 VOH High-level output voltage VI =. V RL = 3 kω to GND 5 5.6 6 V RL = 5 Ω to GND 5. 6 RL = 6 5.7 5 VOL Low-level output voltage VI = V RL = 3 kω to GND 6 5.6 5 V IIH High-level input current RL = 5 Ω to GND 6 5. VI =. V VI = 5.5 V IIL Low-level input current VI =. V µa IO Output current (power off) VCC ± =, VO = ± 6 V ± µa IOS Short-circut output current VI = V 5 5 5 VI = 5 5 ro Output resistance RL = 5 Ω 5 5 Ω VCC = ± V, VI =, ICC + Positive supply current I R(WS) = kω, Output open ICC Negative supply current VCC = ± V, VI I =, R(WS) = kω, Output open µa ma 3 ma 3 ma All typical values are at VCC = ± V, TA = 5 C. The algebraic convention, in which the less-positive (more-negative) limit is designated as minimum, is used in this data sheet for logic voltage levels, e.g., when 5 V is the maximum, the minimum is a more-negative voltage. Not more than one output should be shorted to ground at a time. switching characteristics, V CC± = ± V, T A = 5 C (see Figure ) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT ttlh Transition time, low- to high-level output RL = 5 kω, CL = 3 pf tthl Transition time, high- to low-level level output RL = 5 kω, CL = 3 pf R(WS) = kω... R(WS) = kω R(WS) = 5 kω 55 7 R(WS) = MΩ R(WS) = kω... R(WS) = kω R(WS) = 5 kω 55 7 R(WS) = MΩ µs µs POST OFFICE BOX 65533 DALLAS, TEXAS 7565 3
SLLSB OCTOBER 9 REVISED MAY 995 PARAMETER MEASUREMENT INFORMATION VCC + Input (see Note B) 3 V Input Output V 5 Ω R(WS) RL CL = 3 pf (see Note A) 9% 9% VOH Output % % VOL VCC ± tthl ttlh TEST CIRCUIT VOLTAGE WAVEFORMS NOTES: A. CL includes probe and jig capacitance. B. The input pulse is supplied by a generator having the following characteristics: tr ns, tf ns, ZO = 5 Ω, PRR khz, duty cycle = 5%. Figure. Test Circuit and Voltage Waveforms TYPICAL CHARACTERISTICS VO ÁÁVO Output Voltage V 6 6 VCC ± = ± V R(WS) = kω RL = 5 Ω OUTPUT VOLTAGE vs INPUT VOLTAGE TA = 7 C TA = 5 C TA = C II Input Current µ 5 5 5 5 5 VCC ± = ± V R(WS) = kω INPUT CURRENT vs INPUT VOLTAGE TA = C TA = 5 C TA = 7 C TA = C TA = 5 C TA = 7 C....6 VI Input Voltage V 5 3 5 VI Input Voltage V 6 7 Figure Figure 3 POST OFFICE BOX 65533 DALLAS, TEXAS 7565
TYPICAL CHARACTERISTICS SLLSB OCTOBER 9 REVISED MAY 995 5 3 VCC ± = ± V R(WS) = kω TA = 5 C OUTPUT CURRENT vs OUTPUT VOLTAGE (POWER ON) 6 VCC = VI = TA = 5 C OUTPUT CURRENT vs OUTPUT VOLTAGE (POWER OFF) IO Output Current ma 3 VI = V VI = µa IO Output Current 6 5 6 6 6 6 VO Output Voltage V VO Output Voltage V Figure Figure 5 t TLH, t TLH Transition Time µ s 7 7 7. TRANSITION TIME vs WAVE-SHAPING RESISTANCE TA = C TA = 7 C... R(WS) Wave-Shaping Resistance MΩ Figure 6 POST OFFICE BOX 65533 DALLAS, TEXAS 7565 5
SLLSB OCTOBER 9 REVISED MAY 995 APPLICATION INFORMATION V ua9636a Twisted Pair or Flat Cable 5 V ua9637a R(WS) V Figure 7. EIA/TIA-3-B System Application 6 POST OFFICE BOX 65533 DALLAS, TEXAS 7565
PACKAGE OPTION ADDENDUM www.ti.com -Jul-6 PACKAGING INFORMATION Orderable Device Status () Package Type Package Drawing Pins Package Qty UA9636ACD ACTIVE SOIC D 75 Green (RoHS & no Sb/Br) UA9636ACDE ACTIVE SOIC D 75 Green (RoHS & no Sb/Br) UA9636ACDR ACTIVE SOIC D 5 Green (RoHS & no Sb/Br) UA9636ACDRE ACTIVE SOIC D 5 Green (RoHS & no Sb/Br) Eco Plan () Lead/Ball Finish MSL Peak Temp (3) UA9636ACJG OBSOLETE CDIP JG TBD Call TI Call TI UA9636ACP ACTIVE PDIP P 5 Pb-Free (RoHS) UA9636ACPE ACTIVE PDIP P 5 Pb-Free (RoHS) Level--6C-YEAR Level--6C-YEAR Level--6C-YEAR Level--6C-YEAR N / A for Pkg Type N / A for Pkg Type () The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. () Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed.% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either ) lead-based flip-chip solder bumps used between the die and package, or ) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed.% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page
MECHANICAL DATA MCERA JANUARY 995 REVISED JANUARY 997 JG (R-GDIP-T) CERAMIC DUAL-IN-LINE. (,6).355 (9,) 5. (7,).5 (6,).65 (,65).5 (,).63 (,6).5 (,3). (,5) MIN.3 (7,7).9 (7,37). (5,) MAX Seating Plane.3 (3,3) MIN. (,5).3 (,5).5 (,3). (,36). (,) 5 7/C /96 NOTES: A. All linear dimensions are in inches (millimeters). B. This drawing is subject to change without notice. C. This package can be hermetically sealed with a ceramic lid using glass frit. D. Index point is provided on cap for terminal identification. E. Falls within MIL STD 35 GDIP-T POST OFFICE BOX 65533 DALLAS, TEXAS 7565
MECHANICAL DATA MPDIA JANUARY 995 REVISED JUNE 999 P (R-PDIP-T) PLASTIC DUAL-IN-LINE. (,6).355 (9,) 5.6 (6,6). (6,).7 (,7) MAX. (,5) MIN.35 (,6).3 (7,6).5 (,3). (5,) MAX Gage Plane Seating Plane.5 (3,) MIN. (,5) NOM. (,53).5 (,3). (,5). (,5) M.3 (,9) MAX /D 5/9 NOTES: A. All linear dimensions are in inches (millimeters). B. This drawing is subject to change without notice. C. Falls within JEDEC MS- For the latest package information, go to http://www.ti.com/sc/docs/package/pkg_info.htm POST OFFICE BOX 65533 DALLAS, TEXAS 7565
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