SMPS MOSFET. V DSS R DS(on) max I D

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Benefits l Ultra-Low Gate Impedance SMPS MOSFET Applications l High Frequency DC-DC Isolated Converters with Synchronous Rectification for Telecom and Industrial Use l High Frequency Buck Converters for Computer Processor Power PD - 93936C IRF3706 IRF3706S IRF3706L HEXFET Power MOSFET V DSS R DS(on) max I D 20V 8.5mΩ 77A l Very Low R DS(on) at 4.5V V GS l Fully Characterized Avalanche Voltage and Current TO-220AB IRF3706 D 2 Pak IRF3706S TO-262 IRF3706L Absolute Maximum Ratings Parameter Max. Units V DS Drain-Source Voltage 20 V V GS Gate-to-Source Voltage ± 12 V I D @ T C = 25 C Continuous Drain Current, V GS @ 10V 77h I D @ T C = 100 C Continuous Drain Current, V GS @ 10V 54 A I DM Pulsed Drain Current c 280 P D @T C = 25 C Maximum Power Dissipatione 88 W P D @T C = 100 C Maximum Power Dissipatione 44 W Linear Derating Factor 0.59 W/ C T J,T STG Junction and Storage Temperature Range -55 to 175 C Thermal Resistance Parameter Typ. Max. Units R θjc Junction-to-Casei 1.7 R θcs Case-to-Sink, Flat, Greased Surface f 0.50 C/W R θja Junction-to-Ambient fi 62 R θja Junction-to-Ambient( PCB mount)gi 40 Notes through are on page 11 www.irf.com 1 12/9/04

Static @ T J = 25 C (unless otherwise specified) Parameter Min. Typ. Max. Units Conditions V (BR)DSS Drain-to-Source Breakdown Voltag 20 V V GS = 0V, I D = 250µA V (BR)DSS / T J Breakdown Voltage Temp. Coeffici 0.021 V/ C Reference to 25 C, I D = 1mA 6.0 8.5 V GS = 10V, I D = 15Ae R DS(on) Static Drain-to-Source On-Resistan 7.3 10.5 mω V GS = 4.5V, I D = 12Ae 11 22 V GS = 2.8V, I D = 7.5A e V GS(th) Gate Threshold Voltage 0.6 2 V V DS = V GS, I D = 250µA I DSS Drain-to-Source Leakage Current 20 µa V DS = 16V, V GS = 0V 100 V DS = 16V, V GS = 0V, T J = 125 C I GSS Gate-to-Source Forward Leakage 200 na V GS = 12V Gate-to-Source Reverse Leakage -200 V GS = -12V Dynamic @ T J = 25 C (unless otherwise specified) Parameter Min. Typ. Max. Units Conditions gfs Forward Transconductance 53 S V DS = 16V, I D = 57A Rg Gate Resistance 1.8 Ω Q g Total Gate Charge 23 35 I D = 28A Q gs Gate-to-Source Charge 8.0 12 nc V DS = 10V Q gd Gate-to-Drain ("Miller") Charge 5.5 8.3 V GS = 4.5V e Q oss Output Gate Charge 16 24 V GS = 0V, V DS =10V t d(on) Turn-On Delay Time 6.8 V DD = 10V t r Rise Time 87 I D = 28A t d(off) Turn-Off Delay Time 17 ns R G = 1.8Ω t f Fall Time 4.8 V GS = 4.5V e C iss Input Capacitance 2410 V GS = 0V C oss Output Capacitance 1070 pf V DS = 10V C rss Reverse Transfer Capacitance 140 ƒ = 1.0MHz Avalanche Characteristics Parameter Typ. Max. Units E AS Single Pulse Avalanche Energyd 220 mj I AR Avalanche Currentc 28 A Diode Characteristics Parameter Min. Typ. Max. Units Conditions I S Continuous Source Current 77h MOSFET symbol (Body Diode) A showing the I SM Pulsed Source Current 280 integral reverse (Body Diode)c p-n junction diode. V SD Diode Forward Voltage 0.88 1.3 0.82 V T J = 25 C, I S = 36A, V GS = 0V e T J = 125 C, I S = 36A, V GS = 0V e t rr Reverse Recovery Time 45 68 ns T J = 25 C, I F = 36A, V R =20V Q rr Reverse Recovery Charge 65 98 nc di/dt = 100A/µse t rr Reverse Recovery Time 49 74 ns T J = 125 C, I F = 36A, V R =20V Q rr Reverse Recovery Charge 78 120 nc di/dt = 100A/µse 2 www.irf.com

Fig 1. Typical Output Characteristics Fig 2. Typical Output Characteristics Fig 3. Typical Transfer Characteristics Fig 4. Normalized On-Resistance Vs. Temperature www.irf.com 3

Fig 5. Typical Capacitance Vs. Drain-to-Source Voltage Fig 6. Typical Gate Charge Vs. Gate-to-Source Voltage Fig 7. Typical Source-Drain Diode Forward Voltage Fig 8. Maximum Safe Operating Area 4 www.irf.com

V DS R D R G V GS D.U.T. - V DD 10V Pulse Width 1 µs Duty Factor 0.1 % Fig 10a. Switching Time Test Circuit V DS 90% 10% V GS t d(on) t r t d(off) t f Fig 9. Maximum Drain Current Vs. Case Temperature Fig 10b. Switching Time Waveforms Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case www.irf.com 5

15V V DS L DRIVER R G 20V V GS tp D.U.T IAS 0.01Ω - V DD A Fig 12a. Unclamped Inductive Test Circuit tp V (BR)DSS Fig 12c. Maximum Avalanche Energy Vs. Drain Current I AS Fig 12b. Unclamped Inductive Waveforms Current Regulator Same Type as D.U.T. 50KΩ Q G 12V.2µF.3µF V GS Q GS Q GD D.U.T. V - DS V GS V G 3mA Charge Fig 13a. Basic Gate Charge Waveform I G I D Current Sampling Resistors Fig 13b. Gate Charge Test Circuit 6 www.irf.com

Peak Diode Recovery dv/dt Test Circuit D.U.T* ƒ - Circuit Layout Considerations Low Stray Inductance Ground Plane Low Leakage Inductance Current Transformer - - V GS R G dv/dt controlled by R G I SD controlled by Duty Factor "D" D.U.T. - Device Under Test - V DD * Reverse Polarity of D.U.T for P-Channel Driver Gate Drive Period P.W. D = P.W. Period [ V GS =10V ] *** D.U.T. I SD Waveform Reverse Recovery Current Re-Applied Voltage Body Diode Forward Current di/dt D.U.T. V DS Waveform Diode Recovery dv/dt Inductor Curent Body Diode Ripple 5% Forward Drop [ V DD ] [ ] I SD *** V GS = 5.0V for Logic Level and 3V Drive Devices Fig 14. For N-channel HEXFET power MOSFETs www.irf.com 7

TO-220AB Package Outline Dimensions are shown in millimeters (inches) TO-220AB Part Marking Information EXAMPLE: T HIS IS AN IRF1010 LOT CODE 1789 ASS EMBLED ON WW 19, 1997 IN THE ASSEMBLY LINE "C" Note: "P" in assembly line position indicates "Lead-Free" INT E RNAT IONAL RECTIFIER LOGO AS S E MB L Y LOT CODE PART NUMBER DAT E CODE YEAR 7 = 1997 WEE K 19 LINE C 8 www.irf.com

D 2 Pak Package Outline Dimensions are shown in millimeters (inches) D 2 Pak Part Marking Information THIS IS AN IRF530S WIT H LOT CODE 8024 ASSEMBLED ON WW 02, 2000 IN THE ASSEMBLY LINE "L" Note: "P" in ass embly line position indicates "Lead-Free" OR INTERNATIONAL RECTIFIER LOGO ASSEMBLY LOT CODE F530S PART NUMBER DATE CODE YEAR 0 = 2000 WEEK 02 LINE L INTERNATIONAL RECTIFIER LOGO AS S E MBL Y LOT CODE F530S PART NUMBER DATE CODE P = DESIGNAT ES LEAD-FREE PRODUCT (OPTIONAL) YEAR 0 = 2000 WEEK 02 A = ASSEMBLY SITE CODE www.irf.com 9

TO-262 Package Outline Dimensions are shown in millimeters (inches) TO-262 Part Marking Information EXAMPLE: THIS IS AN IRL3103L LOT CODE 1789 ASSEMBLED ON WW 19, 1997 IN THE ASSEMBLY LINE "C" Note: "P" in assembly line position indicates "Lead-Free" OR INTERNATIONAL RECT IFIER LOGO ASSEMBLY LOT CODE PART NUMBER DATE CODE YEAR 7 = 1997 WEEK 19 LINE C INTERNATIONAL RECTIFIER LOGO ASSEMBLY LOT CODE PART NUMBER DATE CODE P = DESIGNATES LEAD-FREE PRODUCT (OPTIONAL) YEAR 7 = 1997 WEEK 19 A = ASSEMBLY SITE CODE 10 www.irf.com

D 2 Pak Tape & Reel Information Dimensions are shown in millimeters (inches) TRR 1.60 (.063) 1.50 (.059) 4.10 (.161) 3.90 (.153) 1.60 (.063) 1.50 (.059) 0.368 (.0145) 0.342 (.0135) FEED DIRECTION TRL 1.85 (.073) 1.65 (.065) 10.90 (.429) 10.70 (.421) 11.60 (.457) 11.40 (.449) 16.10 (.634) 15.90 (.626) 1.75 (.069) 1.25 (.049) 15.42 (.609) 15.22 (.601) 24.30 (.957) 23.90 (.941) 4.72 (.136) 4.52 (.178) FEED DIRECTION 13.50 (.532) 12.80 (.504) 27.40 (1.079) 23.90 (.941) 4 330.00 (14.173) MAX. 60.00 (2.362) MIN. NOTES : 1. COMFORMS TO EIA-418. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION MEASURED @ HUB. 4. INCLUDES FLANGE DISTORTION @ OUTER EDGE. 26.40 (1.039) 24.40 (.961) 3 30.40 (1.197) MAX. 4 Notes: Repetitive rating; pulse width limited by max. junction temperature. Starting T J = 25 C, L = 0.54mH, R G = 25Ω, I AS = 28A. ƒ Pulse width 400µs; duty cycle 2%. This is only applied to TO-220AB pakcage. This is applied to D 2 Pak, when mounted on 1" square PCB (FR- 4 or G-10 Material). For recommended footprint and soldering techniques refer to application note #AN-994. Calculated continuous current based on maximum allowable junction temperature. Package limitation current is 75A. R θ is measured at T J approximately 90 C Data and specifications subject to change without notice. This product has been designed and qualified for the Industrial market. Qualification Standards can be found on IR s Web site. IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105 TAC Fax: (310) 252-7903 Visit us at www.irf.com for sales contact information. 12/04 www.irf.com 11

Note: For the most current drawings please refer to the IR website at: http://www.irf.com/package/