SYNC separator IC with AFC The contains a video synchronization separation circuit, a vertical video synchronization separation circuit, a horizontal oscillation circuit, and a phase comparator. It separates and outputs the horizontal and vertical synchronization signals (HD and VD), and the composite synchronization signal (Sync-out) from input video or composite synchronization signals. The phase difference between HD and VD is guaranteed for both the rising and falling edges of VD. Applications TVs, VCRs and camcorders Features ) Built in AFC circuit. ) HD and VD phase difference guaranteed. ) Wide supply voltage range (V to V). 4) Horizontal free-run frequency does not require adjustment. 5) Low external parts count. ) SOP -pin package. Absolute maximum ratings (Ta = 5 C) Parameter Symbol Limits Unit Power supply voltage.0 V Power dissipation Pd 50 mw Operating Topr 0 ~ 5 C Storage Tstg 55 ~ 5 C Reduced by.5mw for each increase in Ta of C over 5 C. Recommended operating conditions (Ta = 5 C) Parameter Symbol Min. Typ. Max. Unit Power supply voltage.5.5 V
Block diagram VIN SYNC SEPA Sync - OUT HD - OUT Vsepa VD - OUT GND V CC PD - OUT PD 4 VCO 5 COMP HOSC - R Pin descriptions Pin No. Pin name VIN HD - OUT GND 4 PD - OUT 5 HOSC - R VD - OUT Sync - OUT Function Video input HD output GND Phase comparator output Horizontal oscillator resistor Power supply () VD output Synchronization signal output
Input / output circuits VIN HOSC - R HD - OUT pin 5pin pin VD - OUT PD - OUT Sync - OUT pin 4pin pin Electrical characteristics (unless otherwise noted Ta = 5 C and = 5.0V) Parameter Symbol Min. Typ. Max. Unit Conditions Quiescent current Minimum SYNC separation level Pulse voltage low Pulse voltage high (Horizontal) free-running frequency Capture range Lock-in phase HD, VD phase deviation HD, VD phase deviation HD pulse width VD pulse width VIN, VD phase difference IQ.0 5.. ma pin open Vsyn-min 0.0 0.5 Vp-L 0. 0. Vp-H 4. 5.0 fh.o fcap THPH THVD THVD THD TVD TINVD.5 5... 0.. 9.0 4.0 9.0 4.0 9.0 0.0 49 54 4.0 4.0 VP-P pin terminated with 5Ω resistor V pins, V pins,.9 khz No input signal khz. µs pin pin 9.0 µs pin pin (FLD) 9.0 µs pin pin (FLD).0 59 55.0 µs µs µs pin pin pin pin
Measurement circuit (application example) VIDEO IN µf C SYNC SEPA 0kΩ R4 SYNC OUT HD OUT Vsepa VD OUT 0.4µF C4 C5 0.0µF 0.4µ R = V, 0kΩ = 5V, kω PD 4 VCO 5 COMP 0.4µ C 00pF 0kΩ R R 00kΩ When SYNC SEPA output only is used. HD and VD unused. VIDEO IN µf C SYNC SEPA 0kΩ R4 SYNC OUT Vsepa 0.4µF C4 C5 0.0µF PD 4 VCO 5 COMP R 00kΩ () Connect a 00kΩ resistor between pin 5 and ground. Leave pins, 4 and open. () SYNC OUT (pin ) has positive output. () The SYNC OUT (pin ) output rise delay times in relation to the VIDEO IN (pin ) input signal Sync fall are as follws: 0 ns (reference value),when = 5V 0 ns (reference value),when = V Fig. (4) The SYNC OUT (pin ) output fall delay times in relation to the VIDEO IN (pin ) input signal Sync rise are as follws: 4 50 ns (reference value),when = 5V 0 ns (reference value),when = V
Circuit operation () Synchronization separation circuit Detects the charging current to a externally-connected capacitor, and performs synchronization separation. () Horizontal oscillation circuit When a video signal is input, it is synchronized with Hsync by the PLL. The horizontal free-running frequency is determined by external resistor R. fh O =.5E R [khz] () Vertical synchronization separation circuit When a video signal is input, synchronization signal separation is done over the vertical synchronization pulse interval. (4) VIN, HD, and VD timing charts Vertical synchronization pulse interval / H signal Odd field (IN) signal Even field (IN) VIN, VD phase difference VD (OUT) HD, VD phase difference HD, VD phase difference HD Odd field (OUT) HD Even field (OUT). The rise and fall positions for VD are basically the same for both odd and even fields.. HD shifts by / H during the odd and even field interval.. Only the odd field is given for the specification. Fig. Attached components Resistor R should have a tolerance of ± %, and a coefficient of 00ppm or lower. 5
Electrical characteristic curves QUIESCENT CURRENT : IQ (ma) 0 4 0 5 = 5.0V 0 5 50 5 MINIMUM SYNC - SEPA LEVEL : Vsyn - Min. (VPP) 50 00 50 00 50 0 = 5.0V HORIZONTAL FREQUENCY : fh.o (khz)..0 5. 5. 5.4 5. = 5.0V Fig. Quiescent current vs. Fig. 4 Minimum synchronization separation level vs. Fig. 5 Horizontal free-running frequency vs. HD PULSE WIDTH : THD (µs) 0.4 0. 0.0 9. 9. 9.4 = 5.0V VD PULSE WIDTH : TVD (µs) 0 0 0 50 40 0 = 5.0V HD VD PULSE TIMING : THDV (µs) 0 4 0 = 5.0V TEMPERATURE : T ( C) Fig. HD pulse width vs. Fig. VD pulse width vs. Fig. HD, VD phase difference vs. HD VD PULSE TIMING : THDV (µs) 0 4 0 = 5.0V Fig. 9 HD, VD phase difference vs.
External dimensions (Units: mm) 5.0 ± 0. 5. ± 0..5 ± 0. 4.4 ± 0. 4 0.5 ± 0. 0.. 0.4 ± 0. 0.Min. 0.5 SOP