QFET FQA36P15. Features

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150V P-Channel MOSFET QFET General Description These P-Channel enhancement mode power field effect transistors are produced using Fairchild s proprietary, planar stripe, DMOS technology. This advanced technology has been especially tailored to minimize on-state resistance, provide superior switching performance, and withstand high energy pulse in the avalanche and commutation mode. These devices are well suited for low voltage applications such as audio amplifier, high efficiency switching DC/DC converters, and DC motor control. Features -36A, -150V, R DS(on) = 0.09Ω @ = -10 V Low gate charge ( typical 81 nc) Low Crss ( typical 110 pf) Fast switching 100% avalanche tested Improved dv/dt capability 175 C maximum junction temperature rating S! G! G D S TO-3P FQA Series! D Absolute Maximum Ratings T C = 25 C unless otherwise noted Symbol Parameter Units S Drain-Source Voltage -150 V I D Drain Current - Continuous (T C = 25 C) -36 A - Continuous (T C = 100 C) -25.5 A I DM Drain Current - Pulsed (Note 1) -144 A S Gate-Source Voltage ± 30 V E AS Single Pulsed Avalanche Energy (Note 2) 1400 mj I AR Avalanche Current (Note 1) -36 A E AR Repetitive Avalanche Energy (Note 1) 29.4 mj dv/dt Peak Diode Recovery dv/dt (Note 3) -5.0 V/ns P D Power Dissipation (T C = 25 C) 294 W - Derate above 25 C 1.96 W/ C T J, T STG Operating and Storage Temperature Range -55 to +175 C T L Maximum lead temperature for soldering purposes, 1/8" from case for 5 seconds 300 C Thermal Characteristics Symbol Parameter Typ Max Units R θjc Thermal Resistance, Junction-to-Case -- 0.51 C/W R θcs Thermal Resistance, Case-to-Sink 0.24 -- C/W R θja Thermal Resistance, Junction-to-Ambient -- 40 C/W Rev. B, December 2003

Electrical Characteristics T C = 25 C unless otherwise noted Symbol Parameter Test Conditions Min Typ Max Units Off Characteristics BS Drain-Source Breakdown Voltage = 0 V, I D = -250 µa -150 -- -- V BS Breakdown Voltage Temperature / T J Coefficient I D = -250 µa, Referenced to 25 C -- -0.13 -- V/ C I DSS = -150 V, = 0 V -- -- -10 µa Zero Gate Voltage Drain Current = -120 V, T C = 150 C -- -- -100 µa I GSSF Gate-Body Leakage Current, Forward = -25 V, = 0 V -- -- -100 na I GSSR Gate-Body Leakage Current, Reverse = 25 V, = 0 V -- -- 100 na On Characteristics (th) Gate Threshold Voltage =, I D = -250 µa -2.0 -- -4.0 V R DS(on) Static Drain-Source V On-Resistance GS = -10 V, I D = -18 A -- 0.076 0.09 Ω g FS Forward Transconductance = -40 V, I D = -18 A (Note 4) -- 19.5 -- S Dynamic Characteristics C iss Input Capacitance = -25 V, = 0 V, -- 2550 3320 pf C oss Output Capacitance f = 1.0 MHz -- 710 920 pf C rss Reverse Transfer Capacitance -- 110 140 pf Switching Characteristics t d(on) Turn-On Delay Time -- 50 110 ns = -75 V, I D = -36 A, t r Turn-On Rise Time R G = 25 Ω -- 350 710 ns t d(off) Turn-Off Delay Time -- 155 320 ns t f Turn-Off Fall Time (Note 4, 5) -- 150 310 ns Q g Total Gate Charge = -120 V, I D = -36 A, -- 81 105 nc Q gs Gate-Source Charge = -10 V -- 19 -- nc Q gd Gate-Drain Charge (Note 4, 5) -- 42 -- nc Drain-Source Diode Characteristics and Maximum Ratings I S Maximum Continuous Drain-Source Diode Forward Current -- -- -36 A I SM Maximum Pulsed Drain-Source Diode Forward Current -- -- -144 A V SD Drain-Source Diode Forward Voltage = 0 V, I S = -36 A -- -- -4.0 V t rr Reverse Recovery Time = 0 V, I S = -36 A, -- 198 -- ns Q rr Reverse Recovery Charge di F / dt = 100 A/µs (Note 4) -- 1.45 -- µc Notes: 1. Repetitive Rating : Pulse width limited by maximum junction temperature 2. L = 1.45mH, I AS = -36A, = -50V, R G = 25 Ω, Starting T J = 25 C 3. I SD -36A, di/dt 300A/µs, BS, Starting T J = 25 C 4. Pulse Test : Pulse width 300µs, Duty cycle 2% 5. Essentially independent of operating temperature Rev. B, December 2003

Typical Characteristics -I D, Drain Current [A] 10 2 Top : -15.0 V -10.0 V -8.0 V -7.0 V -6.0 V -5.5 V 10 1-5.0 V Bottom : -4.5 V 10 1 -, Drain-Source Voltage [V] 1. 250μ s Pulse Test 2. T C = 25 -I D, Drain Current [A] 10 2 10 1 25 o C 175 o C -55 o C 1. = -40V 2. 250μ s Pulse Test 2 4 6 8 10 -, Gate-Source Voltage [V] Figure 1. On-Region Characteristics Figure 2. Transfer Characteristics 0.4 10 2 R DS(ON) [Ω ], Drain-Source On-Resistance 0.3 0.2 0.1 = -10V = -20V Note : T J = 25 0.0 0 20 40 60 80 100 120 140 160 -I D, Drain Current [A] -I DR, Reverse Drain Current [A] 10 1 175 25 1. = 0V 2. 250μ s Pulse Test 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 -V SD, Source-Drain voltage [V] Figure 3. On-Resistance Variation vs. Drain Current and Gate Voltage Figure 4. Body Diode Forward Voltage Variation vs. Source Current and Temperature Capacitance [pf] 8000 7000 6000 5000 4000 3000 2000 1000 C oss C iss C rss 0 10 1 -, Drain-Source Voltage [V] C iss = C gs + C gd (C ds = shorted) C oss = C ds + C gd C rss = C gd Note ; 1. = 0 V 2. f = 1 MHz -, Gate-Source Voltage [V] 14 12 10 8 6 4 = -30V = -75V = -120V 2 Note : I D = -36A 0 0 10 20 30 40 50 60 70 80 90 Q G, Total Gate Charge [nc] Figure 5. Capacitance Characteristics Figure 6. Gate Charge Characteristics Rev. B, December 2003

Typical Characteristics (Continued) 1.2 3.0 -BS, (Normalized) Drain-Source Breakdown Voltage 1.1 1.0 0.9 0.8-100 -50 0 50 100 150 200 T J, Junction Temperature [ o C] 1. = 0 V 2. I D = -250 μ A R DS(ON), (Normalized) Drain-Source On-Resistance 2.5 2.0 1.5 1.0 0.5 0.0-100 -50 0 50 100 150 200 T J, Junction Temperature [ o C] 1. = -10 V 2. I D = -18 A Figure 7. Breakdown Voltage Variation vs. Temperature Figure 8. On-Resistance Variation vs. Temperature 10 3 40 Operation in This Area is Limited by R DS(on) 35 10 2 100 µs 30 -I D, Drain Current [A] 10 1 DC 1. T C = 25 o C 2. T J = 175 o C 3. Single Pulse 10 ms 1 ms -I D, Drain Current [A] 25 20 15 10 5 10 1 10 2 -, Drain-Source Voltage [V] 0 25 50 75 100 125 150 175 T C, Case Temperature [ ] Figure 9. Maximum Safe Operating Area Figure 10. Maximum Drain Current vs. Case Temperature Z (t), Thermal Response θ JC 10-2 D=0.5 0.2 0.1 0.05 0.02 0.01 single pulse 1. Z θ JC (t) = 0.51 /W M ax. 2. D uty F actor, D =t 1 /t 2 3. T JM - T C = P DM * Z θ JC (t) P DM t 1 t 2 10-5 10-4 10-3 10-2 10 1 t 1, Square W ave Pulse Duration [sec] Figure 11. Transient Thermal Response Curve Rev. B, December 2003

Gate Charge Test Circuit & Waveform 12V 200nF 50KΩ 300nF Same Type as DUT -10V Q g Q gs Q gd -3mA DUT Charge Resistive Switching Test Circuit & Waveforms R L t on t off t d(on) t r t d(off) tf R G 10% -10V DUT 90% Unclamped Inductive Switching Test Circuit & Waveforms L 1 E AS = ---- 2 LI 2 AS BS -------------------- BS - I D t p Time R G I D (t) (t) -10V DUT I AS t p BS Rev. B, December 2003

Peak Diode Recovery dv/dt Test Circuit & Waveforms + DUT _ I SD L Driver R G Compliment of DUT (N-Channel) dv/dt controlled by RG I SD controlled by pulse period ( Driver ) Gate Pulse Width D = -------------------------- Gate Pulse Period 10V I SD ( DUT ) ( DUT ) Body Diode Reverse Current V SD I RM di/dt I FM, Body Diode Forward Current Body Diode Forward Voltage Drop Body Diode Recovery dv/dt Rev. B, December 2003

Package Dimensions TO-3P 15.60 ±0.20 ø3.20 ±0.10 13.60 ±0.20 9.60 ±0.20 3.80 ±0.20 4.80 ±0.20 1.50 +0.15 0.05 13.90 ±0.20 12.76 ±0.20 19.90 ±0.20 23.40 ±0.20 18.70 ±0.20 2.00 ±0.20 3.00 ±0.20 1.00 ±0.20 3.50 ±0.20 16.50 ±0.30 1.40 ±0.20 5.45TYP [5.45 ±0.30] 5.45TYP [5.45 ±0.30] 0.60 +0.15 0.05 Dimensions in Millimeters Rev. B, December 2003

TRADEMARKS The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks. ACEx ActiveArray Bottomless CoolFET CROSSVOLT DOME EcoSPARK E 2 CMOS EnSigna FACT DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. LIFE SUPPORT POLICY FAIRCHILD S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, or (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in significant injury to the user. PRODUCT STATUS DEFINITIONS Definition of Terms FACT Quiet Series FAST FASTr FRFET GlobalOptoisolator GTO HiSeC I 2 C ImpliedDisconnect ISOPLANAR Across the board. Around the world. The Power Franchise Programmable Active Droop LittleFET MICROCOUPLER MicroFET MicroPak MICROWIRE MSX MSXPro OCX OCXPro OPTOLOGIC OPTOPLANAR PACMAN POP Power247 PowerTrench QFET QS QT Optoelectronics Quiet Series RapidConfigure RapidConnect SILENT SWITCHER SMART START SPM Stealth SuperSOT -3 2. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. Datasheet Identification Product Status Definition SuperSOT -6 SuperSOT -8 SyncFET TinyLogic TINYOPTO TruTranslation UHC UltraFET VCX Advance Information Formative or In Design This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. Preliminary First Production This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. No Identification Needed Full Production This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. Obsolete Not In Production This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only. Rev. I5