AN31. I NDUCTOR DESIGN FOR THE Si41XX SYNTHESIZER FAMILY. 1. Introduction. 2. Determining L EXT. 3. Implementing L EXT

Similar documents
AN599. Si4010 ARIB STD T-93 TEST RESULTS (315 MHZ) 1. Introduction. 2. Relevant Measurements Limits DKPB434-BS Schematic and Layout

Table 1. TS1100 and MAX9634 Data Sheet Specifications. TS1100 ±30 (typ) ±100 (typ) Gain Error (%) ±0.1% ±0.1%

AN656. U SING NEC BJT(NESG AND NESG250134) POWER AMPLIFIER WITH Si446X. 1. Introduction. 2. BJT Power Amplifier (PA) and Match Circuit

AN985: BLE112, BLE113 AND BLE121LR RANGE ANALYSIS

Figure 1. Low Voltage Current Sense Amplifier Utilizing Nanopower Op-Amp and Low-Threshold P-Channel MOSFET

Si21xxx-yyy-GM SMIC 55NLL New Raw Wafer Suppliers

IN1/XA C PAR IN2/XB. Figure 1. Equivalent Crystal Circuit

TS1105/06/09 Current Sense Amplifier EVB User's Guide

WT11I DESIGN GUIDE. Monday, 28 November Version 1.1

Normal Oscillator Behavior (Device A) Figure 1. Normal Oscillator Behavior (Device A) ft = f0 1 + TC1 T T0

AN862: Optimizing Jitter Performance in Next-Generation Internet Infrastructure Systems

AN255. REPLACING 622 MHZ VCSO DEVICES WITH THE Si55X VCXO. 1. Introduction. 2. Modulation Bandwidth. 3. Phase Noise and Jitter

Table MHz TCXO Sources. AVX/Kyocera KT7050B KW33T

AN1093: Achieving Low Jitter Using an Oscillator Reference with the Si Jitter Attenuators

INPUT DIE V DDI V DD2 ISOLATION ISOLATION XMIT GND2. Si8710 Digital Isolator. Figure 1. Si8710 Digital Isolator Block Diagram

TS3003 Demo Board FEATURES COMPONENT LIST ORDERING INFORMATION. TS3003 Demo Board TS3003DB

UG175: TS331x EVB User's Guide

TS3004 Demo Board FEATURES COMPONENT LIST ORDERING INFORMATION. TS3004 Demo Board TS3004DB. 5V Supply Voltage FOUT/PWMOUT Output Period Range:

profile for maximum EMI Si50122-A5 does not support Solid State Drives (SSD) Wireless Access Point Home Gateway Digital Video Cameras REFOUT DIFF1

Description. Benefits. Logic Control. Rev 2.1, May 2, 2008 Page 1 of 11

Change of Substrate Vendor from SEMCO to KCC

Figure 1. LDC Mode Operation Example

When paired with a compliant TCXO or OCXO, the Si5328 fully meets the requirements set forth in G.8262/Y ( SyncE ), as shown in Table 1.

Si4825-DEMO. Si4825 DEMO BOARD USER S GUIDE. 1. Features. Table 1. Si4825 Band Sequence Definition

AN959: DCO Applications with the Si5341/40

AN933: EFR32 Minimal BOM

Figure 1. Typical System Block Diagram

Assembly Site Addition (UTL3)

AN427. EZRADIOPRO Si433X & Si443X RX LNA MATCHING. 1. Introduction. 2. Match Network Topology Three-Element Match Network

UG123: SiOCXO1-EVB Evaluation Board User's Guide

90 µa max supply current 9 µa shutdown current Operating Temperature Range: 40 to +85 C 5-pin SOT-23 package RoHS-compliant

Optocoupler 8. Shield. Optical Receiver. Figure 1. Optocoupler Block Diagram

AN0026.1: EFM32 and EFR32 Wireless SOC Series 1 Low Energy Timer

AN523. OVERLAY CONSIDERATIONS FOR THE Si114X SENSOR. 1. Introduction. 2. Typical Application

AN1005: EZR32 Layout Design Guide

AN0026.0: EFM32 and EZR32 Wireless MCU Series 0 Low Energy Timer

Low Jitter and Skew 10 to 220 MHz Zero Delay Buffer (ZDB) Description. Benefits. Low Power and Low Jitter PLL. (Divider for -2 only) GND

AN114. Scope. Safety. Materials H AND SOLDERING TUTORIAL FOR FINE PITCH QFP DEVICES. Optional. Required. 5. Solder flux - liquid type in dispenser

AN905 EXTERNAL REFERENCES: OPTIMIZING PERFORMANCE. 1. Introduction. Figure 1. Si5342 Block Diagram. Devices include: Si534x Si5380 Si539x

Si Data Short

Si Data Short

BGM13P22 Module Radio Board BRD4306A Reference Manual

AN614 A SIMPLE ALTERNATIVE TO ANALOG ISOLATION AMPLIFIERS. 1. Introduction. Input. Output. Input. Output Amp. Amp. Modulator or Driver

TSM6025. A +2.5V, Low-Power/Low-Dropout Precision Voltage Reference FEATURES DESCRIPTION APPLICATIONS TYPICAL APPLICATION CIRCUIT

AN1104: Making Accurate PCIe Gen 4.0 Clock Jitter Measurements

TSM9634F. A 1µA, SOT23 Precision Current-Sense Amplifier DESCRIPTION FEATURES APPLICATIONS TYPICAL APPLICATION CIRCUIT

Si52111-B3/B4 PCI-EXPRESS GEN 2 SINGLE OUTPUT CLOCK GENERATOR. Features. Applications. Description. compliant. 40 to 85 C

Features + DATAIN + REFCLK RATESEL1 CLKOUT RESET/CAL. Si DATAOUT DATAIN LOS_LVL + RATESEL1 LOL LTR SLICE_LVL RESET/CAL

Low-Power Single/Dual-Supply Dual Comparator with Reference. A 5V, Low-Parts-Count, High-Accuracy Window Detector

TS A 0.65V/1µA Nanopower Voltage Detector with Dual Outputs DESCRIPTION FEATURES APPLICATIONS TYPICAL APPLICATION CIRCUIT

package and pinout temperature range Test and measurement Storage FPGA/ASIC clock generation 17 k * 3

Description. Benefits. Low Jitter PLL With Modulation Control. Input Decoder SSEL0 SSEL1. Figure 1. Block Diagram

Not Recommended for New Design. SL28PCIe16. EProClock PCI Express Gen 2 & Gen 3 Clock Generator. Features. Pin Configuration.

Low-Power Single/Dual-Supply Quad Comparator with Reference FEATURES

UG310: XBee3 Expansion Kit User's Guide

The 500 Series Z-Wave Single Chip ADC. Date CET Initials Name Justification

UG310: LTE-M Expansion Kit User's Guide

Description. Benefits. Low Jitter PLL With Modulation Control. Input Decoder SSEL0 SSEL1. Figure 1. Block Diagram. Rev 2.6, August 1, 2010 Page 1 of 9

3.2x5 mm packages. temperature range. Test and measurement Storage FPGA/ASIC clock generation. 17 k * 3

The Si86xxIsoLin reference design board contains three different analog isolation circuits with performance summarized in Table 1.

AN1057: Hitless Switching using Si534x/8x Devices

Table 1. Si443x vs. Si446x DC Characteristics. Specification Si443x Si446x. Ambient Temperature 40 to 85 C 40 to 85 C

Si597 QUAD FREQUENCY VOLTAGE-CONTROLLED CRYSTAL OSCILLATOR (VCXO) 10 TO 810 MHZ. Features. Applications. Description. Functional Block Diagram.

Case study for Z-Wave usage in the presence of LTE. Date CET Initials Name Justification

Si596 DUAL FREQUENCY VOLTAGE-CONTROLLED CRYSTAL OSCILLATOR (VCXO) 10 TO 810 MHZ. Features. Applications. Description. Functional Block Diagram.

TS1105/06 Data Sheet. TS1105 and TS1106 Unidirectional and Bidirectional Current- Sense Amplifiers + Buffered Unipolar Output with Adjustable Bias

Table 1. Summary of Measured Results. Spec Par Parameter Condition Limit Measured Margin. 3.2 (1) TX Antenna Power +10 dbm dbm 0.

S R EVISION D VOLTAGE- C ONTROLLED C RYSTAL O SCILLATOR ( V C X O ) 1 0 M H Z TO 1. 4 G H Z

TS3300 FEATURES DESCRIPTION APPLICATIONS TYPICAL APPLICATION CIRCUIT VIN, VOUT, 3.5µA, High-Efficiency Boost + Output Load Switch

Hardware Design Considerations

Si595 R EVISION D VOLTAGE-CONTROLLED CRYSTAL OSCILLATOR (VCXO) 10 TO 810 MHZ. Features. Applications. Description. Functional Block Diagram.

UG168: Si8284-EVB User's Guide

ATDD (analog tune and digital display) FM/AM/SW radio Worldwide FM band support from 64 to 109 MHz with 5 default sub-bands:

Not Recommended for New Design. SL28PCIe25. EProClock PCI Express Gen 2 & Gen 3 Generator. Features. Block Diagram.

TS1100. A 1µA, +2V to +27V SOT23 Precision Current-Sense Amplifier DESCRIPTION FEATURES APPLICATIONS TYPICAL APPLICATION CIRCUIT

AN435. Si4032/4432 PA MATCHING. 1. Introduction Brief Overview of Matching Procedure Summary of Matching Network Component Values

TS1109 Data Sheet. TS1109 Bidirectional Current-Sense Amplifier with Buffered Bipolar

Pin Assignments VDD CLK- CLK+ (Top View)

Table 1. WMCU Replacement Types. Min VDD Flash Size Max TX Power

Si3402B-EVB. N ON-ISOLATED EVALUATION BOARD FOR THE Si3402B. 1. Description. 2. Si3402B Board Interface

Default high or low output Precise timing (typical)

ATDD (analog tune and digital display) FM/AM/SW radio Worldwide FM band support from 64 MHz to 109 MHz with 5 default sub-bands:

AN0002.0: EFM32 and EZR32 Wireless MCU Series 0 Hardware Design Considerations

AN0016.1: Oscillator Design Considerations

Reference Manual BRD4543B

Si720x Switch/Latch Hall Effect Magnetic Position Sensor Data Sheet

Reference Manual BRD4545A

Reference Manual BRD4502C (Rev. A00)

1.6V Nanopower Comparators with/without Internal References

Date CET Initials Name Justification

EFR32MG GHz 10 dbm Radio Board BRD4162A Reference Manual

Si53360/61/62/65 Data Sheet

Loss-of-lock indicator. SONET/SDH test equipment Optical transceiver modules SONET/SDH regenerators Board level serial links.

TS V Nanopower Comparator with Internal Reference DESCRIPTION FEATURES APPLICATIONS TYPICAL APPLICATION CIRCUIT

Ultra Series Crystal Oscillator Si562 Data Sheet

Si8751/52 Data Sheet. Isolated FET Driver with Pin Control or Diode Emulator Inputs

Si8751/52 Data Sheet. Isolated FET Driver with Pin Control or Diode Emulator Inputs

EFR32MG 2.4 GHz 19.5 dbm Radio Board BRD4151A Reference Manual

Low Energy Timer. AN Application Note. Introduction

AN901: Design Guide for Isolated DC/DC using the Si884xx/886xx

Transcription:

I NDUCTOR DESIGN FOR THE Si4XX SYNTHESIZER FAMILY. Introduction Silicon Laboratories family of frequency synthesizers integrates VCOs, loop filters, reference and VCO dividers, and phase detectors in standard CMOS technology. Depending on the synthesizer being used, the frequency of operation may require an external inductance to establish the desired center frequency of operation. This may be implemented with either a printed circuit board (PCB) trace or a discrete chip inductor. This application note provides guidelines for designing these external inductors to ensure maximum manufacturing margin for frequency tuning. 2. Determining The center frequency for many of Silicon Laboratories frequency synthesizers is established using an external inductor. The value for this inductor is determined by Equations and 2: f CEN = --------------------------------------------------------------- 2 C NOM L PKG + from which = ------------------------------------------ L PKG C 2f 2 CEN NOM (Equation ) (Equation 2) where f CEN = desired center frequency of synthesizer C NOM = nominal tank capacitance from synthesizer data sheet L PKG = package inductance from synthesizer data sheet = external inductance required 3. Implementing Once the required value of external inductance is determined given the desired center frequency, a choice must be made regarding the implementation of the inductor. The two possible implementations are a discrete chip inductor or a printed circuit board trace. 3.. Using a Discrete Chip Inductor If the required value for is greater than 3 nh, it is recommended that a discrete chip inductor be used. This inductor should be placed as close as possible to the device pins as shown in Figure. printed trace J synthesizer device pad discrete inductor inductor device pad Figure. Placement of Discrete Chip Inductor While close placement will minimize the inductance of the traces connecting the discrete inductor to the synthesizer, these traces, nonetheless, contribute to the total overall inductance. The total external inductance includes contributions from both the discrete inductor and the connecting traces as indicated in Equation 3: = L NOM + XJ + 0.3 (Equation 3) where = external inductance L NOM = nominal value of discrete chip inductor X = constant of proportionality for MLP (X MLP ) or TSSOP (X TSSOP ) (nh/mm) J = dimension shown in Figure (mm) Note that the term J + 0.3 is the effective D dimension used in the next section. Also, the determination of X is described in the next section. The discrete inductor should be selected such that the Q of the inductor is greater than 40, and the tolerance of the inductance is ±0% or better. Rev..3 /5 Copyright 205 by Silicon Laboratories AN3

3.2. Using a Printed Trace Inductor If the required value of is less than 3 nh, it is recommended that a PCB trace be used as shown in Figure 2. B device pad C A Figure 2. Printed Trace Inductor Table lists the dimensions to be used with a micro leadframe package (MLP), and Table 2 lists the dimensions to be used with a thin shrink small outline package (TSSOP). Table. Dimensions to be used with MLP Dimension Value (mm) A 0.80 B 0.30 C 0.20 D (calculated) E 0.30 F 0.20 G 0.80 Table 2. Dimensions to be used with TSSOP Dimension Value (mm) A.50 B 0.30 C 0.35 D (calculated) E 0.30 F 0.35 G 0.95 The inductance of the shape shown in Figure 2 is directly proportional to the D dimension. F inductor trace D E E G The constant of proportionality, X MLP or X TSSOP, is given by Equations 4 and 5 for an MLP and a TSSOP, respectively: 30 nh X MLP = 0.620 0.823e --------- (Equation 4) mm 40 nh X TSSOP = 0.700 0.857e --------- (Equation 5) mm where X MLP = constant of proportionality for MLP X TSSOP = constant of proportionality for TSSOP H = thickness of dielectric between inductor trace and ground plane in µm In each of these equations, H is the thickness of the dielectric between the top layer metal and the layer containing the ground plane measured in µm. Figure 3 illustrates the dimension H. traces dielectric ground Figure 3. Side View of Printed Circuit Board It is recommended that the H dimension be greater than 00 m to reduce the sensitivity of the printed trace inductance to thickness variation in the PCB dielectric. To accomplish this, it may be necessary to remove copper from layer 2 and locate the ground plane on layer 3. In any case, H is the distance from the bottom of the inductor trace to the top of the ground plane. The thickness of the ground plane, T2, and the trace on layer, T, do not have a material effect on the calculations and should be ignored. Once the constant of proportionality (X) has been calculated using Equation 4 (MLP) or Equation 5 (TSSOP), it is necessary to calculate the length of the inductor trace. This is accomplished using Equation 6. where D --------- H --------- H = trace length shown in Figure 2 in mm = calculated value of external inductance required X = constant of proportionality for MLP (X MLP ) or TSSOP (X TSSOP ) With this calculation complete, the trace can be implemented as shown in Figure 2. E D = ------------ (Equation 6) X H T T2 2 Rev..3

4. Checking the Value of Once the desired inductor has been implemented, and the PCB has been fabricated, the value of should be verified. This can be done by following the steps listed below:. Measure the minimum operating frequency of the VCO in open-loop mode. This is accomplished by performing a sequence of register writes as described below. For the IF synthesizer: A. 0x000062 (hexadecimal) power IF synthesizer and reference amplifier. B. 0x00024F test register. C. 0x000F2D test register. D. 0x0000 set the test bit in the main configuration register. E. 0x07FFD set the VCO to its minimum frequency. For the RF synthesizer: A. 0x000052 (hexadecimal) power RF synthesizer and reference amplifier. B. 0x00003 dummy write to select RF synthesizer. C. 0x00024F test register. D. 0x000F2D test register. E. 0x0000 set the test bit in the main configuration register. F. 0x07FF0D set the VCO to its minimum frequency. For the RF2 synthesizer: A. 0x000052 (hexadecimal) power IF synthesizer and reference amplifier. B. 0x00004 dummy write to select RF2 synthesizer. C. 0x00024F test register. D. 0x000F2D test register. E. 0x0000 set the test bit in the main configuration register. F. 0x07FF0D set the VCO to its minimum frequency. After programming the VCO to its minimum openloop frequency, measure the value of f MIN. Note that this sequence of register writes leaves the device in a test mode. All the registers described in the data sheet should be re-written with normal values for proper closed-loop operation. 2. Measure the maximum operating frequency of the VCO in open-loop mode. This is accomplished by performing a sequence of register writes as described below. For the IF synthesizer: A. 0x000062 (hexadecimal) power IF synthesizer and reference amplifier. B. 0x00024F test register. C. 0x000F2D test register. D. 0x0000 set the test bit in the main configuration register. E. 0x0000D set the VCO to its maximum frequency. For the RF synthesizer: A. 0x000052 (hexadecimal) power RF synthesizer and reference amplifier. B. 0x00003 dummy write to select RF synthesizer. C. 0x00024F test register. D. 0x000F2D test register. E. 0x0000 set the test bit in the main configuration register. F. 0x00000D set the VCO to its maximum frequency. For the RF2 synthesizer: A. 0x000052 (hexadecimal) power IF synthesizer and reference amplifier. B. 0x00004 dummy write to select RF2 synthesizer. C. 0x00024F test register. D. 0x000F2D test register. E. 0x0000 set the test bit in the main configuration register. F. 0x00000D set the VCO to its maximum frequency. After programming the VCO to its maximum openloop frequency, measure the value of f MAX. Note that this sequence of register writes leaves the device in a test mode. All the registers described in the data sheet should be re-written with normal values for proper closed-loop operation. 3. Calculate the measured center frequency for the synthesizer using Equation 7. f f + MIN f MAX MEAS = ----------------------------- (Equation 7) 2 where f MEAS = measured center frequency Rev..3 3

f MIN = measure minimum frequency of operation f MAX = measured maximum frequency of operation 4. Calculate the measured external inductance, L MEAS, using Equation 8. L MEAS = ---------------------------------------------- L PKG (Equation 8) C 2f 2 MEAS NOM where L MEAS = measured external conductance f MEAS = measured center frequency C NOM = nominal tank capacitance from synthesizer data sheet L PKG = package inductance from synthesizer data sheet 5. Refining the Implementation of L ext If the measured center frequency (f MEAS ) is more than 2% away from the desired center frequency (f CEN ), it is suggested that the external inductor be adjusted to provide maximum manufacturing If the inductor is implemented with a discrete chip inductor, change the nominal value of this inductor using Equation 9. L NEW = 2L OLD L MEAS (Equation 9) where L NEW = nominal external inductance for next implementation L OLD = nominal external inductance from current implementation L MEAS = measured external inductance from current implementation If the inductor is implemented with a printed trace, change the D dimension of the trace using Equation 0. L CALC L MEAS D NEW = D OLD + ---------------------------------------- (Equation 0) X where D NEW = dimension shown in Figure 2 for next implementation in mm D OLD = dimension shown in Figure 2 from current implementation in mm L CALC = calculated value of external inductance from current implementation in nh L MEAS = measured external inductance from current implementation in nh X = constant of proportionality for MLP (X MLP ) or TSSOP (X TSSOP ) in nh/mm After the inductor has been adjusted, check the new value of as described in the previous section. 6. Example Assume that the application requires the center frequency of the RF synthesizer on the Si433-BM to be.6 GHz. The thickness of the dielectric is 20 m. The first step is to calculate the required external inductance value,, from Equation 2: = --------------------------------------------------------------------- 2.6 0 9 2.5 0 9 = 0.80 nh 4.3 0 2 Since the value is less than 3 nh, a printed trace implementation will be used. The constant of proportionality is calculated from Equation 4: 30 X MLP = 0.620 0.823e = 0.59 nh/mm Finally, from Equation 6: 20 ------------ 0.80 D = -------------- =.54 mm 0.59 This is the calculated value in Table for Figure 2, showing the appropriate printed trace inductor for this application. 7. Example 2 Assume that the application requires the center frequency of the IF synthesizer on the Si433-BM to be 550 MHz. The thickness of the dielectric is 20 m. The first step is to calculate the required external inductance value,, from Equation 2: EXT = ---------------------------------------------------------------------- 2550 0 6 2.6 0 9 =.28 n 6.5 0 2 Since the value is greater than 3 nh, a discrete chip inductor is recommended for the implementation. An inductor with a nominal value of 0.0 nh must be placed according to Figure with the J dimension calculated by rearranging terms in Equation 3: nh L NOM nh J = ------------------------------------------------------------ X MLP nh/mm 0.3 mm.28 0.0 = ------------------------------- mm 0.3 mm = 2.7 mm 0.59 Note that the inductor must have a Q greater than 40 at 550 MHz, and the tolerance must be ±0% or better. 4 Rev..3

8. Verifying Margin in Design Important: Please note that this procedure is only intended for initial verification of the design of the board and external VCO tuning inductor. It is possible to determine the frequency tuning margin on a design implementation. This is accomplished by reading back from the synthesizer register values which indicate the tuning range of the VCOs using the following procedure: IF synthesizer:. Program the IF synthesizer to its highest frequency in the application. 2. Write 0x000DE (hexadecimal) to enable a read of the IF tuning code. 3. Read 8 bits from the serial interface. (See Serial 4. The 8-bit value read from the interface is the tuning code. This value should be greater than 0x40 5. Program the IF synthesizer to its lowest frequency in the application. 6. Write 0x000DE (hexadecimal) to enable a read of the IF tuning code. 7. Read 8 bits from the serial interface. (See Serial 8. The 8-bit value read from the interface is the tuning code. This value should be less than 0x780 RF synthesizer:. Program the RF synthesizer to be active and at its highest frequency in the application. 2. Write 0x0000DE (hexadecimal) to enable a read of the RF tuning code. 3. Read 8 bits from the serial interface. (See Serial 4. The 8-bit value read from the interface is the tuning code. This value should be greater than 0x40 5. Program the RF synthesizer to be active and at its lowest frequency in the application. 6. Write 0x0000DE (hexadecimal) to enable a read of the RF tuning code. 7. Read 8 bits from the serial interface. (See Serial 8. The 8-bit value read from the interface is the tuning code. This value should be less than 0x780 RF2 synthesizer:. Program the RF2 synthesizer to be active and at its highest frequency in the application. 2. Write 0x0000DE (hexadecimal) to enable a read of the RF tuning code. 3. Read 8 bits from the serial interface. (See Serial 4. The 8-bit value read from the interface is the tuning code. This value should be greater than 0x40 5. Program the RF2 synthesizer to be active and at its lowest frequency in the application. 6. Write 0x0000DE (hexadecimal) to enable a read of the RF tuning code. 7. Read 8 bits from the serial interface. (See Serial 8. The 8-bit value read from the interface is the tuning code. This value should be less than 0x780 8.. Serial Read Timing In addition to the functions described in the data sheet, the AUXOUT pin can be used to read the contents of some synthesizer registers. By writing the values of 0x000DE and 0x0000DE as described above, the serial interface is configured to read the tuning codes. During the readback, the function of the AUXOUT pin is to provide the serial data output from the device. Writing to any of the registers described in the data sheet will cause the function of AUXOUT to revert to its previously programmed function. This is illustrated in Figure 4 below. Refer to Table 3 for timing values. Rev..3 5

80% 50% 20% SCLK t REH t REH t RESU SENB SDATA D7 D6 A A0 AUXOUT t CA programmed function OD7 OD6 OD0 t EA programmed function Figure 4. Read Timing Diagram Table 3. Serial Read Timing Values Parameter Symbol Minimum Maximum Units Read Operation SCLK to SEN Hold Time t REH 6 ns Read Operation SEN to SCLK Setup Time t RESU 6 ns SCLK to AUXOUT t CA 6 ns SEN to AUXOUT t EA 6 ns 9. Summary Silicon Laboratories frequency synthesizers have been designed to provide robust operation over extreme conditions. This application note provides the designer with information to maximize the operating margins of both the synthesizer and the system in which it is to be used. 6 Rev..3

NOTES: Rev..3 7

Simplicity Studio One-click access to MCU tools, documentation, software, source code libraries & more. Available for Windows, Mac and Linux! www.silabs.com/simplicity MCU Portfolio www.silabs.com/mcu SW/HW www.silabs.com/simplicity Quality www.silabs.com/quality Support and Community community.silabs.com Disclaimer Silicon Laboratories intends to provide customers with the latest, accurate, and in-depth documentation of all peripherals and modules available for system and software implementers using or intending to use the Silicon Laboratories products. Characterization data, available modules and peripherals, memory sizes and memory addresses refer to each specific device, and "Typical" parameters provided can and do vary in different applications. Application examples described herein are for illustrative purposes only. Silicon Laboratories reserves the right to make changes without further notice and limitation to product information, specifications, and descriptions herein, and does not give warranties as to the accuracy or completeness of the included information. Silicon Laboratories shall have no liability for the consequences of use of the information supplied herein. This document does not imply or express copyright licenses granted hereunder to design or fabricate any integrated circuits. The products must not be used within any Life Support System without the specific written consent of Silicon Laboratories. A "Life Support System" is any product or system intended to support or sustain life and/or health, which, if it fails, can be reasonably expected to result in significant personal injury or death. Silicon Laboratories products are generally not intended for military applications. Silicon Laboratories products shall under no circumstances be used in weapons of mass destruction including (but not limited to) nuclear, biological or chemical weapons, or missiles capable of delivering such weapons. Trademark Information Silicon Laboratories Inc., Silicon Laboratories, Silicon Labs, SiLabs and the Silicon Labs logo, CMEMS, EFM, EFM32, EFR, Energy Micro, Energy Micro logo and combinations thereof, "the world s most energy friendly microcontrollers", Ember, EZLink, EZMac, EZRadio, EZRadioPRO, DSPLL, ISOmodem, Precision32, ProSLIC, SiPHY, USBXpress and others are trademarks or registered trademarks of Silicon Laboratories Inc. ARM, CORTEX, Cortex-M3 and THUMB are trademarks or registered trademarks of ARM Holdings. Keil is a registered trademark of ARM Limited. All other products or brand names mentioned herein are trademarks of their respective holders. Silicon Laboratories Inc. 400 West Cesar Chavez Austin, TX 7870 USA http://www.silabs.com