Experiment 9- Single Stage Amplifiers with Passive Loads - MOS

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Experiment 9- Single Stage Amplifiers with Passive oads - MOS D. Yee,.T. Yeung, M. Yang, S.M. Mehta, and R.T. Howe UC Berkeley EE 105 1.0 Objective This is the second part of the single stage amplifier lab. e will be dealing with MOS amplifiers in this experiment. To show your understanding of the lab, your write-up should contain: A table showing the input resistance, output resistance, and gain A discussion on trade-offs issues among the three parameters A v, R in, and R out A discussion explaining the advantages and disadvantages of the different amplifiers A discussion of the differences between similar MOS and BJT amplifier stages 2.0 Prelab H&S: Chapter 8.3, 8.9 You will now consider biasing issues with FETs. Below is an NMOS transistor that will be configured as a Common Source Amplifier. For the figure below, bias the circuit so that V OUT 2.50 V. Determine the proper bias voltage V BIAS needed to achieve this. hat can you say about the value of V BIAS when compared to V BIAS for the common emitter amplifier? Use the following MOS parameters for hand calculation and for SPICE, in which you should plot V OUT vs. V BIAS. V TO 0.9 V, K p 20 x 10-6 A/V 2, λ 0.05 V -1 1 of 5

Procedure FIGURE 1. NMOS Transistor in the Common Source Configuration 5V R C 5kΩ V OUT /93/9 V BIAS 3.0 Procedure FIGURE 2. Common Drain with Biasing Circuit (ab Chip 4 SF source follower) 5V 10 µf PIN 20 1.5 PIN 21 BIAS PIN 22 R BIAS Many of the amplifiers will contain special biasing current sources to set the collector currents of the npns or the drain currents of the FETs. The drain or collector currents 2 of 5 Experiment 9- Single Stage Amplifiers with Passive oads - MOS

Procedure will be equal to the current in an external resistor R BIAS. The user provides R BIAS across pin 28 and pin 22. The current through the resistor is equal to which sets the I D for the NMOS transistor. can be found by use of a voltmeter across R BIAS. 3.1 Common Source Amplifier 3. Figure 3 shows a Common Source amplifier. et R D 50 kω 4. et be a sinusoid with an amplitude of 100 mv at a frequency of 5 khz. 5. Measure V OUT and verify that the transistor is operating in the constant-current (saturation) region. Measure the value of the drain current and compare it with the calculated value. FIGURE 3. Common Source Amplifier (ab Chip 1) 5 V 10 kω 10 µf R D PIN 10 GATE PIN 9 DRAIN v g 9 PIN 11 SOURCE 6. Use the oscilloscope to measure the voltage gain v out /. Make sure that the output isn t clipping. Also measure v g /. Find the gain. Compare the value of the gain to that of the Common Emitter. 7. One major difference between bipolar and MOS transistors is that the MOS transistor has an infinite input impedance. Because of this high input impedance, there is no voltage attenuation from the voltage source to the amplifier input, even if the voltage source has a large source resistance. Verify that this is true by measuring v g /. You can obtain an estimate of the input resistance of the common source amplifier from the gain v g /. 8. Measure the output impedance using a technique similar to the method used to measure the output impedance of the bipolar amplifiers in Exp. 8. Experiment 9- Single Stage Amplifiers with Passive oads - MOS 3 of 5

Optional Experiments 3.2 Common Drain Amplifier (Source Follower) 1. Figure 4 shows a Common Drain amplifier with a current source biasing. The current source is really an NMOS transistor and its small-signal resistance is 1 / (λ n I D ). Its bias current is the current through R BIAS 10 kω. et be a sinusoid with an amplitude of 200 mv at a frequency of 5 khz and a DC offset of 3 V. Repeat the steps above to find the gain and output resistance. As with common collectors, common drains are also used as voltage buffers. is the same current through R BIAS. FIGURE 4. Common Drain Amplifier (ab Chip 4) R BIAS PIN 20 1.5 PIN 21 BIAS PIN 22 PIN14 PIN14 4.0 Optional Experiments 4.1 Common Source with Source Degeneration 1. Connect the circuit of figure 9. et R D 5 kω, R S 500 Ω, and V BIAS 3 V. Find the gain, input resistance and output resistance. Note: V Tn will not equal V TOn because of the backgate effect. Source degeneration in MOS amplifier stages is not as widely used as emitter degeneration in bipolar circuits. The transconductance of MOS transistors is much lower than that of bipolar transistors so that further reduction in g m is usually undesirable. Also, the beneficial effect of raising the input impedance of a bipolar transistor is irrelevant for MOS transistors since the input impedance is infinite. Degeneration is occasionally useful for making the transconductance independent of the device characteristics. 4 of 5 Experiment 9- Single Stage Amplifiers with Passive oads - MOS

Optional Experiments FIGURE 5. Common Source with Source Degeneration (ab Chip 1, NMOS2) 5V V BIAS GATE PIN 7 R D DRAIN PIN 6 R S 3 SOURCE PIN 8 Experiment 9- Single Stage Amplifiers with Passive oads - MOS 5 of 5