IRF2804PbF IRF2804SPbF IRF2804LPbF HEXFET Power MOSFET

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Features l Advanced Process Technology l Ultra Low On-Resistance l 175 C Operating Temperature l Fast Switching l Repetitive Avalanche Allowed up to Tjmax l Lead-Free AUTOMOTIVE MOSFET G IRF2804PbF IRF2804SPbF IRF2804LPbF HEXFET Power MOSFET D PD - 95332A V DSS = 40V R DS(on) = 2.0mΩ Description Specifically designed for Automotive applications, this HEXFET Power MOSFET utilizes the latest processing techniques to achieve extremely low on-resistance per silicon area. Additional features of this design are a 175 C junction operating temperature, fast switching speed and improved repetitive avalanche rating. These features combine to make this design an extremely efficient and reliable device for use in Automotive applications and a wide variety of other applications. TO-220AB IRF2804PbF S D 2 Pak IRF2804SPbF I D = 75A TO-262 IRF2804LPbF Absolute Maximum Ratings Parameter Max. Units I D @ T C = 25 C Continuous Drain Current, V GS @ 10V (Silicon Limited) 270 A I D @ T C = C Continuous Drain Current, V GS @ 10V (See Fig. 9) 190 I D @ T C = 25 C Continuous Drain Current, V GS @ 10V (Package Limited) 75 I DM Pulsed Drain Current c 1080 P D @T C = 25 C Maximum Power Dissipation 300 W Linear Derating Factor 2.0 W/ C V GS Gate-to-Source Voltage ± 20 V E AS Single Pulse Avalanche Energy (Thermally Limited) d 540 mj E AS (tested) Single Pulse Avalanche Energy Tested Value i 1160 I AR Avalanche Current c See Fig.12a,12b,15,16 A E AR Repetitive Avalanche Energy h mj T J Operating Junction and -55 to 175 C T STG Storage Temperature Range Soldering Temperature, for 10 seconds 300 (1.6mm from case ) Mounting torque, 6-32 or M3 screw Thermal Resistance 10 lbf in (1.1N m) Parameter Typ. Max. Units R θjc Junction-to-Case 0.50l C/W R θcs Case-to-Sink, Flat, Greased Surface 0.50 R θja Junction-to-Ambient 62 R θja Junction-to-Ambient (PCB Mount, steady state)j 40 HEXFET is a registered trademark of International Rectifier. www.irf.com 1 08/25/05

IRF2804/S/LPbF Static @ T J = 25 C (unless otherwise specified) Parameter Min. Typ. Max. Units V (BR)DSS Drain-to-Source Breakdown Voltage 40 V ΒV DSS / T J Breakdown Voltage Temp. Coefficient 0.031 V/ C R DS(on) SMD Static Drain-to-Source On-Resistance 1.5 2.0 mω R DS(on) TO-220 Static Drain-to-Source On-Resistance 1.8 2.3 V GS(th) Gate Threshold Voltage 2.0 4.0 V gfs Forward Transconductance 130 S I DSS Drain-to-Source Leakage Current 20 µa 250 I GSS Gate-to-Source Forward Leakage 200 na Gate-to-Source Reverse Leakage -200 Q g Total Gate Charge 160 240 nc Q gs Gate-to-Source Charge 41 62 Q gd Gate-to-Drain ("Miller") Charge 66 99 t d(on) Turn-On Delay Time 13 ns t r Rise Time 120 t d(off) Turn-Off Delay Time 130 t f Fall Time 130 I D = 75A V DS = 32V V GS = 10V f V DD = 20V I D = 75A R G = 2.5Ω V GS = 10V f L D Internal Drain Inductance 4.5 nh Between lead, D 6mm (0.25in.) L S Internal Source Inductance 7.5 from package G and center of die contact S C iss Input Capacitance 6450 pf V GS = 0V C oss Output Capacitance 1690 V DS = 25V C rss Reverse Transfer Capacitance 840 ƒ = 1.0MHz, See Fig. 5 C oss Output Capacitance 5350 V GS = 0V, V DS = 1.0V, ƒ = 1.0MHz C oss Output Capacitance 1520 V GS = 0V, V DS = 32V, ƒ = 1.0MHz C oss eff. Effective Output Capacitance 2210 Diode Characteristics Parameter Min. Typ. Max. Units I S Continuous Source Current 270 Conditions V GS = 0V, I D = 250µA Reference to 25 C, I D = 1mA V GS = 10V, I D = 75A f V GS = 10V, I D = 75A f V DS = V GS, I D = 250µA V DS = 10V, I D = 75A V DS = 40V, V GS = 0V V DS = 40V, V GS = 0V, T J = 125 C V GS = 20V V GS = -20V V GS = 0V, V DS = 0V to 32V Conditions MOSFET symbol D (Body Diode) A showing the I SM Pulsed Source Current 1080 integral reverse G (Body Diode)Ãc p-n junction diode. S V SD Diode Forward Voltage 1.3 V T J = 25 C, I S = 75A, V GS = 0V f t rr Reverse Recovery Time 56 84 ns T J = 25 C, I F = 75A, V DD = 20V Q rr Reverse Recovery Charge 67 nc di/dt = A/µs f t on Forward Turn-On Time Intrinsic turn-on time is negligible (turn-on is dominated by LSLD) Notes: Repetitive rating; pulse width limited by Limited by T Jmax, see Fig.12a, 12b, 15, 16 for typical repetitive max. junction temperature. (See fig. 11). avalanche performance. Limited by T Jmax, starting T J = 25 C, This value determined from sample failure population. % L=0.24mH, R G = 25Ω, I AS = 75A, V GS =10V. tested to this value in production. Part not recommended for use above this value. ˆ This is applied to D 2 Pak, when mounted on 1" square PCB ƒ I SD 75A, di/dt 220A/µs, V DD V (BR)DSS, ( FR-4 or G-10 Material ). For recommended footprint and T J 175 C. soldering techniques refer to application note #AN-994. Pulse width 1.0ms; duty cycle 2%. Max R DS(on) for D 2 Pak and TO-262 (SMD) devices. C oss eff. is a fixed capacitance that gives the same Š TO-220 device will have an Rth value of 0.45 C/W. charging time as C oss while V DS is rising from 0 to 80% V DSS. 2 www.irf.com

I D, Drain-to-Source Current (Α) G fs, Forward Transconductance ( S) I D, Drain-to-Source Current (A) I D, Drain-to-Source Current (A) IRF2804/S/LPbF 00 0 VGS TOP 15V 10V 8.0V 7.0V 6.0V 5.5V 5.0V BOTTOM 4.5V 00 0 VGS GS TOP 15V TOP 15V 10V 10V 8.0V 8.0V 7.0V 7.0V 6.0V 6.0V 5.5V 5.5V 5.0V BOTTOM 5.0V 4.5V BOTTOM 4.5V 10 4.5V 20µs PULSE WIDTH Tj = 25 C 1 0.1 1 10 V DS, Drain-to-Source Voltage (V) 10 4.5V 20µs PULSE WIDTH Tj = 175 C 0.1 1 10 V DS, Drain-to-Source Voltage (V) Fig 1. Typical Output Characteristics Fig 2. Typical Output Characteristics 0 300 T J = 175 C 250 T J = 25 C 200 T J = 25 C 150 T J = 175 C 10 V DS = 10V 20µs PULSE WIDTH 1 4.0 5.0 6.0 7.0 8.0 9.0 V GS, Gate-to-Source Voltage (V) 50 0 V DS = 10V 20µs PULSE WIDTH 0 40 80 120 160 200 I D, Drain-to-Source Current (A) Fig 3. Typical Transfer Characteristics Fig 4. Typical Forward Transconductance vs. Drain Current www.irf.com 3

C, Capacitance (pf) I SD, Reverse Drain Current (A) I D, Drain-to-Source Current (A) V GS, Gate-to-Source Voltage (V) IRF2804/S/LPbF 12000 00 8000 6000 V GS = 0V, f = 1 MHZ C iss = C gs C gd, C ds SHORTED C rss = C gd C oss = C ds C gd Ciss 20 16 12 8 I D = 75A V DS = 32V VDS= 20V VDS= 8.0V 4000 2000 Coss 4 0 Crss 1 10 V DS, Drain-to-Source Voltage (V) 0 0 40 80 120 160 200 240 Q G Total Gate Charge (nc) Fig 5. Typical Capacitance vs. Drain-to-Source Voltage Fig 6. Typical Gate Charge vs. Gate-to-Source Voltage 0.0 00.0 T J = 175 C 0 OPERATION IN THIS AREA LIMITED BY R DS (on) µsec 10.0 1msec 10msec 1.0 T J = 25 C V GS = 0V 0.1 0.2 0.6 1.0 1.4 1.8 2.2 V SD, Source-toDrain Voltage (V) 10 1 Tc = 25 C Tj = 175 C Single Pulse 0 1 10 V DS, Drain-to-Source Voltage (V) Fig 7. Typical Source-Drain Diode Forward Voltage Fig 8. Maximum Safe Operating Area 4 www.irf.com

I D, Drain Current (A) R DS(on), Drain-to-Source On Resistance (Normalized) IRF2804/S/LPbF 300 250 Limited By Package 2.0 I D = 75A V GS = 10V 200 1.5 150 1.0 50 0 25 50 75 125 150 175 T C, Case Temperature ( C) 0.5-60 -40-20 0 20 40 60 80 120 140 160 180 T J, Junction Temperature ( C) Fig 9. Maximum Drain Current vs. Case Temperature Fig 10. Normalized On-Resistance vs. Temperature 1 D = 0.50 0.1 0.01 0.20 0.10 0.05 0.02 0.01 Thermal Response ( Z thjc ) 0.001 SINGLE PULSE ( THERMAL RESPONSE ) Notes: 1. Duty Factor D = t1/t2 2. Peak Tj = P dm x Zthjc Tc 0.0001 1E-008 1E-007 1E-006 1E-005 0.0001 0.001 0.01 0.1 1 t 1, Rectangular Pulse Duration (sec) Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case www.irf.com 5

V GS(th) Gate threshold Voltage (V) E AS, Single Pulse Avalanche Energy (mj) IRF2804/S/LPbF 15V 1200 I D R G V DS 20V V GS tp L D.U.T IAS 0.01Ω DRIVER - V DD A 0 800 600 TOP 31A 53A BOTTOM 75A Fig 12a. Unclamped Inductive Test Circuit 400 tp V (BR)DSS 200 0 25 50 75 125 150 175 Starting T J, Junction Temperature ( C) I AS Fig 12b. Unclamped Inductive Waveforms Fig 12c. Maximum Avalanche Energy vs. Drain Current Q G 10 V Q GS Q GD 4.0 V G Charge Fig 13a. Basic Gate Charge Waveform 3.0 I D = 250µA Current Regulator Same Type as D.U.T. 2.0 50KΩ 12V.2µF.3µF V GS 3mA D.U.T. V - DS 1.0-75 -50-25 0 25 50 75 125 150 175 T J, Temperature ( C ) I G I D Current Sampling Resistors Fig 14. Threshold Voltage vs. Temperature Fig 13b. Gate Charge Test Circuit 6 www.irf.com

Avalanche Current (A) E AR, Avalanche Energy (mj) IRF2804/S/LPbF 0 Duty Cycle = Single Pulse 10 0.01 0.05 0.10 Allowed avalanche Current vs avalanche pulsewidth, tav assuming Tj = 25 C due to avalanche losses 1 1.0E-06 1.0E-05 1.0E-04 1.0E-03 1.0E-02 1.0E-01 tav (sec) Fig 15. Typical Avalanche Current Vs.Pulsewidth 600 500 400 300 200 TOP Single Pulse BOTTOM 10% Duty Cycle I D = 75A 0 25 50 75 125 150 175 Starting T J, Junction Temperature ( C) Notes on Repetitive Avalanche Curves, Figures 15, 16: (For further info, see AN-5 at www.irf.com) 1. Avalanche failures assumption: Purely a thermal phenomenon and failure occurs at a temperature far in excess of T jmax. This is validated for every part type. 2. Safe operation in Avalanche is allowed as long ast jmax is not exceeded. 3. Equation below based on circuit and waveforms shown in Figures 12a, 12b. 4. P D (ave) = Average power dissipation per single avalanche pulse. 5. BV = Rated breakdown voltage (1.3 factor accounts for voltage increase during avalanche). 6. I av = Allowable avalanche current. 7. T = Allowable rise in junction temperature, not to exceed T jmax (assumed as 25 C in Figure 15, 16). t av = Average time in avalanche. D = Duty cycle in avalanche = t av f Z thjc (D, t av ) = Transient thermal resistance, see figure 11) P D (ave) = 1/2 ( 1.3 BV I av ) = DT/ Z thjc I av = 2DT/ [1.3 BV Z th ] E AS (AR) = P D (ave) t av Fig 16. Maximum Avalanche Energy vs. Temperature www.irf.com 7

IRF2804/S/LPbF - D.U.T ƒ - Circuit Layout Considerations Low Stray Inductance Ground Plane Low Leakage Inductance Current Transformer - Reverse Recovery Current Driver Gate Drive Period P.W. D.U.T. I SD Waveform Body Diode Forward Current di/dt D.U.T. V DS Waveform Diode Recovery dv/dt D = P.W. Period V GS =10V V DD * R G dv/dt controlled by RG Driver same type as D.U.T. I SD controlled by Duty Factor "D" D.U.T. - Device Under Test V DD - Re-Applied Voltage Inductor Curent Body Diode Forward Drop Ripple 5% I SD * V GS = 5V for Logic Level Devices Fig 17. Peak Diode Recovery dv/dt Test Circuit for N-Channel HEXFET Power MOSFETs V DS R D R G V GS D.U.T. - V DD 10V Pulse Width 1 µs Duty Factor 0.1 % Fig 18a. Switching Time Test Circuit V DS 90% 10% V GS t d(on) t r t d(off) t f Fig 18b. Switching Time Waveforms 8 www.irf.com

IRF2804/S/LPbF TO-220AB Package Outline Dimensions are shown in millimeters (inches) TO-220AB Part Marking Information (;$03/( 7,6,6$1,5) $66(0%/('21::,17($66(0%/</,1(& 1RWH3LQDVVHPEO\OLQHSRVLWLRQ LQGLFDWHV/HDG)UHH,17(51$7,21$/ 5(&7,),(5 /2*2 $66(0%/< 3$57180%(5 '$7(&2'( <($5 :((. /,1(& www.irf.com 9

IRF2804/S/LPbF D 2 Pak Package Outline Dimensions are shown in millimeters (inches) D 2 Pak Part Marking Information 7,6,6$1,5)6:,7,17(51$7,21$/ $66(0%/('21:: 5(&7,),(5,17($66(0%/</,1(/ /2*2 $66(0%/< )6 3$57180%(5 '$7(&2'( <($5 :((. /,1(/ 25,17(51$7,21$/ 5(&7,),(5 /2*2 $66(0%/< 3$57180%(5 '$7(&2'( 3 '(6,*1$7(6/($')5(( 352'8&7237,21$/ <($5 :((. $ $66(0%/<6,7(&2'( 10 www.irf.com )6

IRF2804/S/LPbF TO-262 Package Outline Dimensions are shown in millimeters (inches) TO-262 Part Marking Information (;$03/( 7,6,6$1,5// $66(0%/('21::,17($66(0%/</,1(& 1RWH3LQDVVHPEO\OLQH SRVLWLRQLQGLFDWHV/HDG)UHH OR,17(51$7,21$/ 5(&7,),(5 /2*2 $66(0%/< 3$57180%(5 '$7(&2'( <($5 :((. /,1(&,17(51$7,21$/ 5(&7,),(5 /2*2 $66(0%/< 3$57180%(5 '$7(&2'( 3 '(6,*1$7(6/($')5(( 352'8&7237,21$/ <($5 :((. $ $66(0%/<6,7(&2'( www.irf.com 11

IRF2804/S/LPbF D 2 Pak Tape & Reel Information Dimensions are shown in millimeters (inches) TRR 1.60 (.063) 1.50 (.059) 4.10 (.161) 3.90 (.153) 1.60 (.063) 1.50 (.059) 0.368 (.0145) 0.342 (.0135) FEED DIRECTION TRL 1.85 (.073) 1.65 (.065) 10.90 (.429) 10.70 (.421) 11.60 (.457) 11.40 (.449) 16.10 (.634) 15.90 (.626) 1.75 (.069) 1.25 (.049) 15.42 (.609) 15.22 (.601) 24.30 (.957) 23.90 (.941) 4.72 (.136) 4.52 (.178) FEED DIRECTION 13.50 (.532) 12.80 (.504) 27.40 (1.079) 23.90 (.941) 4 330.00 (14.173) MAX. 60.00 (2.362) MIN. NOTES : 1. COMFORMS TO EIA-418. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION MEASURED @ HUB. 4. INCLUDES FLANGE DISTORTION @ OUTER EDGE. 26.40 (1.039) 24.40 (.961) 3 30.40 (1.197) MAX. 4 TO-220AB package is not recommended for Surface Mount Application. Data and specifications subject to change without notice. This product has been designed and qualified for the Automotive [Q101] market. Qualification Standards can be found on IR s Web site. IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105 TAC Fax: (310) 252-7903 Visit us at www.irf.com for sales contact information. 08/05 12 www.irf.com