Objectives The purpose of this lab is build and analyze Differential amplifier based on NPN transistors.

Similar documents
Objectives The purpose of this lab is build and analyze Differential amplifiers based on NMOS transistors (or NPN transistors).

UNIVERSITY OF PENNSYLVANIA EE 206

Differential Amplifier Design

Experiment 6: Biasing Circuitry

EE 330 Laboratory 8 Discrete Semiconductor Amplifiers

Experiment 9- Single Stage Amplifiers with Passive Loads - MOS

ES330 Laboratory Experiment No. 9 Bipolar Differential Amplifier [Reference: Sedra/Smith (Chapter 9; Section 9.2; pp )]

EE4902 C Lab 7

Experiment 6: Biasing Circuitry

HOME ASSIGNMENT. Figure.Q3

UNIVERSITY OF UTAH ELECTRICAL ENGINEERING DEPARTMENT

ECEN 474/704 Lab 6: Differential Pairs

Laboratory 9. Required Components: Objectives. Optional Components: Operational Amplifier Circuits (modified from lab text by Alciatore)

EE 482 Electronics II

Lab 2: Discrete BJT Op-Amps (Part I)

ECE4902 C Lab 7

CHARACTERISTICS OF OPERATIONAL AMPLIFIERS - I

Chapter 8 Differential and Multistage Amplifiers

Applied Electronics II

Lab Experiment #2 Differential Amplifiers. Group Members

Multi-Transistor Configurations

LAB #3: ANALOG IC BUILDING BLOCKS Updated: Dec. 23, 2002

EE 330 Laboratory 8 Discrete Semiconductor Amplifiers

V o2 = V c V d 2. V o1. Sensor circuit. Figure 1: Example of common-mode and difference-mode voltages. V i1 Sensor circuit V o

Experiment 8 Frequency Response

Lab 2: Common Emitter Design: Part 2

SAMPLE FINAL EXAMINATION FALL TERM

Experiment No. 9 DESIGN AND CHARACTERISTICS OF COMMON BASE AND COMMON COLLECTOR AMPLIFIERS

2. SINGLE STAGE BIPOLAR JUNCTION TRANSISTOR (BJT) AMPLIFIERS

15EEE282 Electronic Circuits and Simulation Lab - I Lab # 6

I1 19u 5V R11 1MEG IDC Q7 Q2N3904 Q2N3904. Figure 3.1 A scaled down 741 op amp used in this lab

EE 233 Circuit Theory Lab 3: First-Order Filters

FREQUENCY RESPONSE OF COMMON COLLECTOR AMPLIFIER

BJT Differential Amplifiers

EE105 Fall 2015 Microelectronic Devices and Circuits Multi-Stage Amplifiers. Prof. Ming C. Wu 511 Sutardja Dai Hall (SDH)

When you have completed this exercise, you will be able to determine ac operating characteristics of a

THE UNIVERSITY OF HONG KONG. Department of Electrical and Electrical Engineering

Operational Amplifiers. Boylestad Chapter 10

Laboratory 6. Lab 6. Operational Amplifier Circuits. Required Components: op amp 2 1k resistor 4 10k resistors 1 100k resistor 1 0.

EE 368 Electronics Lab. Experiment 10 Operational Amplifier Applications (2)

Prelab 10: Differential Amplifiers

CHARACTERISTICS OF OPERATIONAL AMPLIFIERS - II

ECE 442 Solid State Devices & Circuits. 15. Differential Amplifiers

Chapter 15 Goals. ac-coupled Amplifiers Example of a Three-Stage Amplifier

Applied Electronics II

University of Pittsburgh

Differential Amplifier : input. resistance. Differential amplifiers are widely used in engineering instrumentation

Intro To Engineering II for ECE: Lab 7 The Op Amp Erin Webster and Dr. Jay Weitzen, c 2014 All rights reserved.

Exercise 2: AC Voltage and Power Gains

11. Audio Amp. LM386 Low Power Amplifier:

EXPERIMENT 10: Power Amplifiers

Experiment #8: Designing and Measuring a Common-Collector Amplifier

EE 233 Circuit Theory Lab 2: Amplifiers

EE 332 Design Project

Laboratory 8 Operational Amplifiers and Analog Computers

EE 233 Circuit Theory Lab 4: Second-Order Filters

PHYS 3152 Methods of Experimental Physics I E2. Diodes and Transistors 1

The Differential Amplifier. BJT Differential Pair

University of North Carolina, Charlotte Department of Electrical and Computer Engineering ECGR 3157 EE Design II Fall 2009

Başkent University Department of Electrical and Electronics Engineering EEM 311 Electronics II Experiment 8 OPERATIONAL AMPLIFIERS

EXPERIMENT 10: SINGLE-TRANSISTOR AMPLIFIERS 11/11/10

FREQUENCY RESPONSE OF COMMON COLLECTOR AMPLIFIER

CHAPTER 8 DIFFERENTIAL AND MULTISTAGE AMPLIFIERS

Basic operational amplifier circuits In this lab exercise, we look at a variety of op-amp circuits. Note that this is a two-period lab.

F9 Differential and Multistage Amplifiers

Lab 4: Analysis of the Stereo Amplifier

Common mode rejection ratio

Lab 6 Prelab Grading Sheet

Integrated Circuit: Classification:

AN-1106 Custom Instrumentation Amplifier Design Author: Craig Cary Date: January 16, 2017

Prelab 6: Biasing Circuitry

E84 Lab 3: Transistor

EE 3111 Lab 7.1. BJT Amplifiers

EXPERIMENT 5 CURRENT AND VOLTAGE CHARACTERISTICS OF BJT

I B. VCE =const. 25mV I C. V out = I C R C = β I B R C = βr C βr e

Miniproject: AM Radio

EE 3305 Lab I Revised July 18, 2003

EE 210 Lab Exercise #5: OP-AMPS I

Electronics I. laboratory measurement guide

EE320L Electronics I. Laboratory. Laboratory Exercise #2. Basic Op-Amp Circuits. Angsuman Roy. Department of Electrical and Computer Engineering

Operational Amplifiers

Experiment 5 Single-Stage MOS Amplifiers

Homework Assignment True or false. For both the inverting and noninverting op-amp configurations, V OS results in

ELC224 Final Review (12/10/2009) Name:

Introduction to Analog Interfacing. ECE/CS 5780/6780: Embedded System Design. Various Op Amps. Ideal Op Amps

Exercise 2: AC Voltage and Power Gains

ECEN Network Analysis Section 3. Laboratory Manual

Document Name: Electronic Circuits Lab. Facebook: Twitter:

Experiment # 4: BJT Characteristics and Applications

5.25Chapter V Problem Set

ECE4902 C Lab 5 MOSFET Common Source Amplifier with Active Load Bandwidth of MOSFET Common Source Amplifier: Resistive Load / Active Load

1. Hand Calculations (in a manner suitable for submission) For the circuit in Fig. 1 with f = 7.2 khz and a source vin () t 1.

Lecture (07) BJT Amplifiers 4 JFET (1)

Lab 10: Single Supply Amplifier

LM321 Low Power Single Op Amp

Experiments #6. Differential Amplifier

ECE-342 Test 1: Sep 27, :00-8:00, Closed Book. Name : SOLUTION

Experiment #7: Designing and Measuring a Common-Emitter Amplifier

Group: Names: voltage calculated measured V out (w/o R 3 ) V out (w/ R 3 )

Concepts to be Covered

Transcription:

1 Lab 03: Differential Amplifier Total 30 points: 20 points for lab, 5 points for well-organized report, 5 points for immaculate circuit on breadboard NOTES: 1) Please use the basic current mirror from Lab01 for the second part of the lab (Fig. 3). 2) You can use the same chip for the diff pair and the basic current mirror. 2) You must answer the boxed questions listed under L1 L7 to get full credit. Lab report must be well-organized. You will be graded on this aspect. Use the template from Labs page. Objectives The purpose of this lab is build and analyze Differential amplifier based on NPN transistors. In this lab, we will build the differential amplifier and determine Common Mode Rejection Ratio (CMRR) for two types of configurations: one with passive load and the other with an active load. A major benefit of using a differential amplifier is to get rid of noise or interference signal present in the input signal. You can use either stand-alone NPN transistors PN2222 or the array of matched NPN transistors MPQ2222 (NPN array). Note that the array will provide better matching. Please refer to datasheets at the bottom of the Labs page. If the required parameters are not listed for this current, then try to approximate them for the smallest set of I C and I B at a given V CE. Note that β=h FE. You can also look up the parameters in the SPICE model of the transistor. Please see the models at the bottom of the Labs page. Fig. 1: Differential amplifier with passive load (i C i E )

2 1.0 Differential Amplifier with Passive Load Fig. 1 shows the differential amplifier which has two resistors as the passive load. Here V CC =V EE =15 V, Ic=1mA (I E 1mA). Q 1 and Q 2 should be a matched pair of NPN transistors (MPQ2222 will provide better matching). You can use the basic current mirror from Lab1 to bias the diff pair. As explained the class, the differential amplifier amplifies the differential input signal, V id = (V in +) - (V in -), where the differential signals are applied at the bases of the transistors as shown in Fig. 1. The differential output can be taken across the collectors as, V od =(V o +)-(V o -). Note that the differential input and output signals have 180 deg phase shift between them. 180 deg phase shift corresponds to the opposite polarity. An ideal differential amplifier should have differential input signals with identical amplitudes. 1.1 Design First select an appropriate value of Rp to provide the bias current at the emitters, i E = i C = 1 ma, while considering -V EE =-15 V. Then determine the values of R C resistors. Select R C such that the transistor operates deep in the active-mode. For example, R C =10 kω will make the dc voltage at the collector (V C ) ~10V. Collector current in each of the branches will be about half of the bias current (i C /2). It is best to make sure that the collector voltage is less than V CMmax in eq. 8.66. L1: What are the values of Rp for the current mirror and R C for the diff pair? Now we will focus on the figure-of-merit, Common-mode Rejection Ratio (CMRR). To determine CMRR, we need to calculate the common-mode gain, A cm and differential-mode gain, A d. Common-mode Gain A cm The amplifier exhibits the common-mode gain when both the input signals are same (common). Ideally the amplifier should completely reject the common-mode signal. However, the amplifier will not completely reject the common-mode signal due to the mismatches in the scale currents, the bias resistors, the collector resistors, the finite impedance of the current source at the collector and so on. Consequently, the common-mode gain represents the ability of the amplifier to amplify noise. So the lower the common-mode gain, the better the amplifier will be at rejecting common-mode interference or noise. Let s assume that we will apply a 1Vdc (or 1-kHz sinusoidal signal of 2V peak-to-peak) to both inputs. Calculate common-mode gain based on these input signals (see eq. 8.99, assume 1% mismatch between the resistors). L2: What is the calculated common-mode gain A cm of the differential amplifier? Differential Voltage Gain A d The amplifier will exhibit differential voltage gain when you apply differential input signals (equal amplitude and opposite polarity). The differential voltage gain is the ratio of output differential voltage over the input differential voltage. This is the central theme of a differential amplifier.

3 For the purposes of calculation and simulation, we will assume that the two input signals have equal amplitudes and are 180 deg out of phase with each other (opposite polarity). Calculate the differential voltage gain for input signals of 20 mv peak-to-peak at 1 khz (see eq. 8.95). L3: What is the calculated differential voltage gain A d of the differential amplifier? Common Mode Rejection Ratio (CMRR) The CMRR is a measure of the effectiveness of the differential pair in amplifying the differential signal while rejecting common-mode interference. It is simply the ratio of the magnitude differential voltage gain to the magnitude of common-mode gain (see eq. 8.100 and 8.50b). Calculate the CMRR in db (20*log10(x)). Note: We will assume that the main contribution to CMRR is the mismatch between the collector resistors. L4: What is the calculated common-mode rejection ratio CMRR (db) of the differential amplifier? 1.2 Simulation Simulate the circuit shown in Fig. 1 and determine the CMRR (in db) of the amplifier. Common-mode Gain step1: Make sure to change either of collector resistor to +/- 1% of the other resistor value (e.g. 10 kω and 9.9kΩ represent the mismatch). step2: Apply both the input voltages with same phase (use 2V peak-to-peak at 1 khz). This will make the two input signals common-mode. Run the simulation. step3: Plot (v o +) - (v o -). Note the peak value and calculate the ratio of this value to input amplitude. This is the common-mode gain. L5: What is the simulated common-mode gain A cm of the differential amplifier? Differential Voltage Gain step1: Set the phase of one of the input voltages to 180 deg and amplitudes to small values (e.g. 10 mvamp). Run simulation. step2: Plot (v in +)-(v in -) and (v out +)-(v out -) on the same plot, use markers and obtain the ratio of output differential voltage to input differential voltage. L6: What is the simulated differential voltage gain A d of the differential amplifier? Based on the above numbers, find the CMRR in db (20*log10(x)). L7: What is the simulated CMRR (db) of the differential amplifier? Please see the next page for the experimental set up.

4 1.3 Experiment Use the shortest possible wires (ask for short jumper wires if you don t have any) and clip the terminal wires of your components and make them as short as possible. Make your circuit very neat and organized. Please ask to see an example. You will be graded on this aspect of the experiment. Don t forget to check the multi-meter mode before you measure a current or voltage, if it is set incorrectly you will blow a fuse! HIGH-Z MODE Make sure you put the function generator in High-Z mode. Otherwise your signal amplitudes will be off by factor two. Connecting the Current Mirror First adjust Rp to the value you calculated so that Io=1mA at the output of the current mirror after connecting the emitters of the current mirror to -15V. Use 2.5V at the output node of the current mirror to accomplish the above. Now you are ready to connect the current mirror to your diff pair. Common-mode Gain Build the circuit and make sure that the diff pair is biased at ~1mA at its emitters. Apply a 1-kHz sinusoidal signal of 0.1V peak-to-peak to both inputs. Measure the amplitude of the differential output signal, v od =v o+ - v o - by connecting the two outputs to o-scope and using math menu (-). Calculate the common-mode gain (=v od / v icm ). Is the common mode gain higher or lower than your calculated and simulated values? Why? L8: What is the measured common-mode gain A cm of the differential amplifier? Differential Voltage Gain To measure the differential mode gain, you will need two equal amplitude signals with opposite polarity. We can supply the needed signals with the circuit shown in Fig. 2. You can use any op-amp that accomplishes this task (alternatively you can use any other scheme that produces differential input signals). You can use a potentiometer for R 2, nn which will be useful for fine adjustment. Make R 2 =R 1 =1kΩ. Connect a 1-kHz, 0.1Vamp sinusoidal signal and measure V in + and V in - on the oscilloscope (you should reduce the amplitude later after you get the op-amp working). Set the scope to sum the two channels (use math function). The sum should be as close to zero as possible (since V in + and V in - have opposite polarity). Adjust R 2 until you achieve zero sum. Note that V in + and V in - may need to pass through the blocking caps C B before connecting them to the transistors if you have dc offset from the op-amp.

5 Fig. 2: Circuit with op-amp for creating differential input signals Now reduce the amplitude of the input signal V in until the differential output signal, V od is sinusoidal (for no distortion, you may need to build the voltage divider to attenuate the input signal further). Measure both V id and V od. Remember that V id =(V in +)-(V in -) and V od =(V o +)-(V o -); use math function. Please make note of where the two output signals are measured in Fig. 1. Calculate the differential voltage gain as the ratio, V od /V id. L9: What is the measured differential voltage gain A d of the differential amplifier? Based on the above numbers, find the CMRR in db (20*log10(x)). L10: What is the measured CMRR (db) of the differential amplifier? Create a table with calculated, simulated and measured values of A cm, A d, and CMRR in your report. Comment on the discrepancies. Part 2 Continued to the next page...

6 2.0 Differential Amplifier with Active Load You will only do experimental work for this portion of the lab. Fig. 3: Differential amplifier with active load Build the circuit shown in Fig.3 by using the active load to improve the CMRR. Is CMRR higher than the previous circuit? If so, why? L11: What is the measured CMRR (db) of the differential amplifier with current mirror?