-; Rev ; / EVALUATION KIT AVAILABLE Mono W Class D Amplifier General Description The mono W Class D amplifier provides a high-performance, thermally efficient amplifier solution that offers up to % efficiency at a V supply. The device operates from V to V and provides a high db PSRR, eliminating the need for a regulated power supply. Filterless modulation allows the to pass CE EMI limits with m cables using only a low-cost ferrite bead and small-value capacitor on each output. Comprehensive click-and-pop suppression circuitry reduces noise on power-up/down or into and out of shutdown or mute. An input op amp allows the user to create a lowpass or highpass filter, and select an optimal gain. The internal precharge circuit ensures clickless/popless turn-on within ms. The is available in the -pin, TQFN-EP package and is specified over the - C to + C temperature range.. Notebook PCs LCD/PDP/CRT Monitors PC Surround Speakers MP Docking Stations Applications Features V to V Supply Voltage Range Spread-Spectrum Modulation Enables Low-EMI Solution Passes EMI Limit with Up to m of Speaker Cable High db PSRR Up to % Efficiency Eliminates Heatsink Thermal and Output Current Protection < µa Shutdown Mode Click-and-Pop Suppression < ms Turn-On Time Space-Saving, mm x mm x.mm, -Pin TQFN Package Ordering Information PART TEMP RANGE PIN-PACKAGE ETG+ - C to + C TQFN-EP* +Denotes a lead-free/rohs-compliant package. *EP = Exposed pad. Simplified Diagram V TO V PRECHARGE AUDIO INPUT Ω SHDN MUTE INPUT RESISTORS AND CAPACITORS SELECT GAIN AND CUTOFF FREQUENCY Pin Configuration and Typical Application Circuit appear at end of data sheet. Maxim Integrated Products For pricing, delivery, and ordering information, please contact Maxim Direct at ---, or visit Maxim s website at www.maxim-ic.com.
ABSOLUTE MAXIMUM RATINGS PVDD to PGND...-.V to +V AGND to PGND...-.V to +.V IN, PRE, PC, COM to AGND...-.V to (V REG +.V) MUTE, SHDN to AGND...-.V to +V REG to AGND...-.V to (V S +.V) V S to AGND...-.V to +V OUT+, OUT- to PGND...-.V to (PVDD +.V) CN to PGND...-.V to (PVDD +.V) CP to PGND...(PVDD -.V) to (V CHOLD +.V) CHOLD to PGND...(V CP -.V) to +V OUT+, OUT-, Short Circuit to PGND or PVDD...Continuous Thermal Limits (Notes, ) Continuous Power Dissipation (T A = + C) -Pin TQFN Single-Layer PCB (derate.mw/ C above + C)...mW θ JA... C/W θ JC... C/W Continuous Power Dissipation -Pin TQFN Multiple-Layer PCB (derate.mw/ C above + C)...mW θ JA... C/W θ JC... C/W Operating Temperature Range...- C to + C Storage Temperature Range...- C to + C Junction Temperature...+ C Lead Temperature (soldering, s)...+ C Note : Thermal performance of this device is highly dependent on PCB layout. See the Applications Information section for more detail. Note : Package thermal resistances were obtained using the method described in JEDEC specification JESD-, using a four-layer board. For detailed information on package thermal considerations, refer to www.maxim-ic.com/thermal-tutorial. Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. ELECTRICAL CHARACTERISTICS (V PVDD = V, V AGND = V PGND =, V SHDN = V MUTE = V, C =.µf, C IN =.µf, C = C COM = C REG = µf, R IN = R FB = kω, R L =, AC measurement bandwidth Hz to khz, T A = T MIN to T MAX, unless otherwise noted. Typical values are at T A = + C.) (Note ) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS AMPLIFIER DC CHARACTERISTICS Speaker-Supply Voltage Range PVDD Inferred from PSRR test V Undervoltage Lockout UVLO. V T A = + C Quiescent Supply Current I PVDD Shutdown Supply Current I SHDN V SHDN =, T A = + C µa REG Voltage V REG... V Preregulator Voltage V S. V COM Voltage V COM... V INPUT AMPLIFIER CHARACTERISTICS Capacitive Drive C L No sustained oscillation pf Output Swing Sinking ±ma (Note ). V Open-Loop Gain A VO db Input Offset Voltage V OS IN to COM ± mv Input Amplifier Slew Rate. V/µs Input Amplifier Unity-Gain Bandwidth ma. MHz
ELECTRICAL CHARACTERISTICS (continued) (V PVDD = V, V AGND = V PGND =, V SHDN = V MUTE = V, C =.µf, C IN =.µf, C = C COM = C REG = µf, R IN = R FB = kω, R L =, AC measurement bandwidth Hz to khz, T A = T MIN to T MAX, unless otherwise noted. Typical values are at T A = + C.) (Note ) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS OUTPUT AMPLIFIER CHARACTERISTICS Output Amplifier Gain A V Preamplifier gain = db (Note )... db Output Current Limit. A Output Offset V OS OUT+ to OUT-, T A = + C ± ± mv Power-Supply Rejection Ratio PSRR V PVDD = V to V, T A = + C f = khz, mv P-P ripple THD+N = %, R L = Ω (Note ). Output Power P OUT THD+N = %, R L = Ω (Note ) db W THD + Noise THD+N P OUT = W, f = khz, R L = Ω (Note ). % Signal-to-Noise Ratio SNR A-weighted, P OUT = THD+N at %, f IN = khz db Noise V N A-weighted (Note ) µv RMS Efficiency η P OUT = W % Click-and-Pop Level K CP samples/second, A-weighted Peak voltage, (Notes,, ) Into shutdown Out of shutdown Into mute Out of mute Switching Frequency khz Spread-Spectrum Bandwidth ± khz Thermal-Shutdown Level + C Thermal-Shutdown Hysteresis C Turn-On Time t ON From shutdown to full operation ms DIGITAL INTERFACE (SHDN, MUTE) Input-Voltage High V INH V Input-Voltage Low V INL. V Input-Voltage Hysteresis mv Input Leakage Current T A = + C ± µa Note : All devices are % production tested at T A = + C, and all temperature limits are guaranteed by design. Note : Amplifier inputs AC-coupled to GND. Note : Ω resistive load in series with mh inductive load connected across OUT+ and OUT- outputs. Note : Ω resistive load in series with µh inductive load connected across OUT+ and OUT- outputs for V PVDD V. Note : Output amplifier gain is defined as: ( V log OUT+ ) ( VOUT ) VPRE Note : Mode transition controlled by SHDN and MUTE. dbv
Typical Operating Characteristics (V PVDD = V, V GND = V PGND =, V SHDN = V MUTE = V, R IN = R FB = kω, unless otherwise noted.) TOTAL HARMONIC DISTORTION PLUS NOISE vs. FREQUENCY PVDD = V, toc TOTAL HARMONIC DISTORTION PLUS NOISE vs. FREQUENCY PVDD = V, Ω LOAD toc TOTAL HARMONIC DISTORTION PLUS NOISE vs. OUTPUT POWER PVDD = V, toc THD+N (%). W THD+N (%). P OUT = W THD+N (%) khz khz W P OUT = W.. k k k FREQUENCY (Hz). k k k FREQUENCY (Hz). Hz OUTPUT POWER (W) TOTAL HARMONIC DISTORTION PLUS NOISE vs. OUTPUT POWER PVDD = V, toc TOTAL HARMONIC DISTORTION PLUS NOISE vs. OUTPUT POWER PVDD = V, toc TOTAL HARMONIC DISTORTION PLUS NOISE vs. OUTPUT POWER PVDD = V, Ω LOAD toc THD+N (%) khz khz THD+N (%) khz khz THD+N (%) khz khz... Hz Hz Hz. OUTPUT POWER (W). OUTPUT POWER (W). OUTPUT POWER (W) vs. TOTAL OUTPUT POWER toc PVDD = V, vs. TOTAL OUTPUT POWER toc PVDD = V, EFFICEINCY (%) POWER DISSIPATION POWER DISSIPATION (W) EFFICEINCY (%) POWER DISSIPATION POWER DISSIPATION (W)
Typical Operating Characteristics (continued) (V PVDD = V, V GND = V PGND =, V SHDN = V MUTE = V, R IN = R FB = kω, unless otherwise noted.) EFFICEINCY (%) vs. TOTAL OUTPUT POWER toc PVDD = V, POWER DISSIPATION POWER DISSIPATION (W) EFFICEINCY (%) vs. TOTAL OUTPUT POWER toc PVDD = V, Ω LOAD POWER DISSIPATION POWER DISSIPATION (W) TOTAL OUTPUT POWER vs. PVDD f = khz % THD+N % THD+N toc % THD+N TOTAL OUTPUT POWER vs. LOAD RESISTANCE % THD+N PVDD = V toc % THD+N TOTAL OUTPUT POWER vs. LOAD RESISTANCE % THD+N PVDD = V toc SUPPLY VOLTAGE (V) LOAD RESISTANCE (Ω) LOAD RESISTANCE (Ω) OUTPUT AMPLITUDE (dbv) - - - - INBAND OUTPUT SPECTRUM toc OUTPUT AMPLITUDE (dbv) - - - - - - - WIDEBAND OUTPUT SPECTRUM toc SUPPLY CURRENT (ma) SUPPLY CURRENT vs. PVDD SUPPLY VOLTAGE toc - - - - k k k k - k M M M FREQUENCY (Hz) FREQUENCY (Hz) SUPPLY VOLTAGE (V)
Typical Operating Characteristics (continued) (V PVDD = V, V GND = V PGND =, V SHDN = V MUTE = V, R IN = R FB = kω, unless otherwise noted.) SHUTDOWN CURRENT (na) SHUTDOWN CURRENT vs. PVDD SUPPLY VOLTAGE toc SHDN ON/OFF RESPONSE toc SHDN V/div OUTPUT V/div PVDD SUPPLY VOLTAGE (V) ms/div MUTE ON/OFF RESPONSE toc ms/div MUTE V/div OUTPUT V/div PSRR (db) - - - - - - - - - PSRR PVDD = V + mv P-P - k k k FREQUENCY (Hz) toc
PIN NAME FUNCTION Pin Description,, PVDD Power Supply. Bypass PVDD to PGND with a µf capacitor connected to pin and a µf capacitor connected to pins and. CHOLD Charge-Pump Output. Connect a µf capacitor to PVDD.,, AGND Analog Ground MUTE Mute Input. Drive MUTE low to place the device in mute mode. SHDN Shutdown Input. Drive SHDN low to place the part in shutdown mode. PC Input Capacitor Precharge Connection. Connect between input resistor, R IN, and input coupling capacitor, C IN. IN Op Amp Inverting Input. PRE Op Amp Output. PRE is the output of the input operational amplifier. COM Internal.V Bias. Bypass COM to AGND with a µf capacitor. REG Internal.V Bias. Bypass REG to AGND with a µf capacitor., V S Internal.V Bias. Bypass V S to AGND with a µf capacitor. CN Charge-Pump, Flying-Capacitor Negative Terminal. Connect CN to CP through a.µf capacitor. CP Charge-Pump, Flying-Capacitor Positive Terminal. Connect CP to CN through a.µf capacitor., OUT- Negative Speaker Output, PGND Power Ground, OUT+ Positive Speaker Output EP Exposed Pad. Must be externally connected to PGND. Detailed Description The filterless, mono class D audio power amplifier offers Class AB audio performance and Class D efficiency with minimal board space. The device operates from an V to V supply range. The features filterless, spread-spectrum modulation, externally set gain and a low-power shutdown mode that reduces supply current to less than µa. Comprehensive click-and-pop suppression and precharge circuitry reduce noise into and out of shutdown or mute within ms. Spread-Spectrum Modulation The features a unique spread-spectrum switching modulation that flattens EMI wideband spectral components, reducing radiated emissions from the speaker and cables. The switching frequency of the Class D amplifier varies randomly by ±khz around the khz center frequency. Instead of a large amount of spectral energy present at multiples of the switching frequency, the energy is spread over a bandwidth that increases with frequency. Above a few MHz, the wideband spectrum looks like white noise for EMI purposes. A proprietary amplifier topology ensures this white noise does not corrupt the noise floor in the audio bandwidth. Efficiency The high efficiency of a Class D amplifier is due to the output transistors acting as switches and therefore consume negligible power. Power loss associated with the Class D output stage is due to the MOSFET I R losses, switching losses, and quiescent current. Although the theoretical best efficiency of a linear amplifier is % at peak output power, under typical music reproduction levels, the efficiency falls to below %. The exhibits > % efficiency under the same conditions (Figure ). Shutdown The features a shutdown mode that reduces power consumption to less than µa (typ), extending battery life in portable applications. Drive SHDN low to place the device in low-power shutdown mode. In shutdown mode, the outputs are high impedance and the common-mode voltage at the output decays to zero.
Mute Function The features a mute mode where the signal is attenuated at the speaker and the outputs stop switching. To mute the, drive MUTE low. Click-and-Pop Suppression The features comprehensive click-and-pop suppression and precharge circuitry that reduce audible transients on startup and shutdown. The precharge circuit enables the amplifier within ms without any clicks or pops. Connect PC between the input resistor (R IN ) and the input capacitor (C IN ). For optimal clickand-pop suppression, use a.µf input coupling capacitor (C IN ). Current Limit When output current exceeds the current limit,.a (typ), the disables the outputs and initiates a µs startup sequence. The shutdown and startup sequence is repeated until the output fault is removed. Properly designed applications do not enter currentlimit mode unless the output is short circuited or connected incorrectly. Thermal Shutdown When the die temperature exceeds the thermal-shutdown threshold, + C (typ), the outputs are disabled. When the die temperature decreases by C, normal operation resumes. Some causes of thermal shutdown are excessively low load impedance, poor thermal contact between the s exposed pad and the PCB, elevated ambient temperature, or poor PCB layout and assembly. Applications Information Filterless Class D Operation The meets ENB EMC radiation limits with an inexpensive ferrite bead and capacitor filter when the speaker leads are less than or equal to m (Figure ). Select a ferrite bead with Ω to Ω impedance, and rated for A. The capacitor value varies based on the ferrite bead chosen and the speaker lead length. See Figure for the correct connections of these components. (%) vs. OUTPUT POWER CLASS AB OUTPUT POWER (W) Figure. Efficiency vs. Class AB Efficiency FB FB FB AND FB: WURTH C pf Figure. Ferrite Bead Filter Configuration AMPLITUDE (dbμv/m) FREQUENCY (MHz) C pf ENB LIMIT Figure. EMI Performance with m Twisted-Pair Speaker Cable Table. Suggested Values for LC Filter R L (Ω) L, L (µh) C (µf) C, C (µf) C, C (µf) R, R (Ω)......
When evaluating the with a ferrite bead filter and resistive load, include a series inductor (µh for Ω load and µh for Ω load) to model typical loudspeaker s behavior. Omitting the series inductor reduces the efficiency, the THD+N performance and the output power of the. When evaluating with a loudspeaker, no series inductor is required. Inductor-Based Output Filters Some applications use the with a full inductor/capacitor-based (LC) output filter. See Figure for the correct connections of these components. The load impedance of the speaker determines the filter component selection (see Table ). Inductors L and L and capacitor C form the primary output filter. Capacitors C and C provide commonmode filtering to reduce radiated emissions. Capacitors C and C, plus resistors R and R, form a Zobel at the output. A Zobel corrects the output loading to compensate for the rising impedance of the loudspeaker. Without a Zobel, the filter exhibits peaking near the cutoff frequency. Component Selection Gain-Setting Resistors The output stage provides a fixed internal gain in addition to the externally set input stage gain. The fixed-output stage gain is set at.db (.V/V). Set overall gain by using resistors R F and R IN (Figure ) as follows: R A F V = -. V V R / IN where A V is the desired voltage gain. Choose R F between kω and kω. The PRE terminal is an operational amplifier output, allowing the to be configured as a filter or an equalizer. Input Capacitor An input capacitor, C IN, in conjunction with the input resistor, R IN, of the forms a highpass filter that removes the DC bias from an incoming signal. The AC-coupling capacitor allows the amplifier to bias the signal to an optimum DC level. Assuming negligible source impedance, the -db point of the highpass filter is given by: f-db= π RINCIN L L Figure. LC Filter Configuration AUDIO INPUT C IN R IN C COM PRE IN COM C C C Choose C IN such that f -db is well below the lowest frequency of interest. To reduce low-frequency distortion, use capacitors whose dielectrics have low-voltage coefficients. Capacitors with high-voltage coefficients cause increased distortion close to f -db. For best clickand-pop suppression, use a.µf input capacitor. COM Capacitor COM is the output of the internally generated DC bias voltage. Bypass COM with a µf capacitor to AGND. Regulator Capacitor REG is the output of the internally generated DC bias voltage. Bypass REG with a µf capacitor to AGND. Power Supplies The features separate supplies for signal and power portions of the device, allowing for the optimum combination of headroom, power dissipation and noise immunity. The speaker amplifiers are powered from PVDD and can range from V to V. The remainder of the device is powered by an internal V regulator, V S. Internal Regulator The features an internal V regulator, V S, powered from PVDD. Bypass V S with a µf capacitor to AGND. C C Figure. Preamplifier Gain Configuration R F PC R R R L OUT+ OUT-
μf V TO V μf μf μf C.μF V S PVDD CP CN,,, Typical Application Circuit C μf μf REG C REG REGULATOR CHARGE PUMP CHOLD R IN kω R FB kω PRE IN, OUT+ C COM μf COM BIAS POWER STAGE, OUT- PC PRECHARGE C IN.μF AUDIO INPUT CONTROL SHDN LOGIC INPUT,, SHDN MUTE AGND V S, PGND Supply Bypassing, Layout, and Grounding Proper layout and grounding are essential for optimum performance. Use wide traces for the power-supply inputs and amplifier outputs to minimize losses due to parasitic trace resistance. Proper grounding improves audio performance, minimizes crosstalk between channels, and prevents switching noise from coupling into the audio signal. Connect PGND and AGND together at a single point on the PCB. Route all traces that carry switching transients away from AGND and the traces/components in the audio signal path. Bypass PVDD with two µf capacitors to PGND. Place the bypass capacitors as close as possible to the. Place a µf capacitor between PVDD and PGND. Bypass V S,V COM, and V REG with a µf capacitor to AGND. Use wide, low-resistance output traces. Current drawn from the outputs increases as load impedance decreases. High-output trace resistance decreases the power delivered to the load. The TQFN package features an exposed thermal pad on its underside. This pad lowers the package s thermal resistance by providing a heat conduction path from the die to the PCB. Connect the exposed thermal pad to PGND by using a large pad and multiple vias to the PGND plane.
TOP VIEW PVDD CHOLD AGND MUTE SHDN PC OUT+ IN + OUT+ PRE PGND COM Pin Configuration PGND AGND AGND OUT- *EP REG OUT- PVDD PVDD CP CN V S V S PROCESS: BiCMOS Chip Information TQFN mm x mm *EP = EXPOSED PAD, CONNECT TO PGND
Package Information For the latest package outline information and land patterns, go to www.maxim-ic.com/packages. PACKAGE TYPE PACKAGE CODE DOCUMENT NO. TQFN-EP T+ - L QFN THIN.EPS
Package Information (continued) For the latest package outline information and land patterns, go to www.maxim-ic.com/packages. Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. Maxim Integrated Products, San Gabriel Drive, Sunnyvale, CA -- Maxim Integrated Products is a registered trademark of Maxim Integrated Products, Inc.