Features. TO-220F SSS Series

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600V N-Channel MOSFET General Description These N-Channel enhancement mode power field effect transistors are produced using Fairchild s proprietary, planar, DMOS technology. This advanced technology has been especially tailored to minimize on-state resistance, provide superior switching performance, and withstand high energy pulse in the avalanche and commutation mode. These devices are well suited for high efficiency switch mode power supplies. Features 2.0A, 600V, R DS(on) = 5.0Ω @ = 10 V Low gate charge ( typical 12.5 nc) Low Crss ( typical 7.6 pf) Fast switching 100% avalanche tested Improved dv/dt capability Typical Characteristics D G D S TO-220 SSP Series G D S TO-220F SSS Series G S Absolute Maximum Ratings T C = 25 C unless otherwise noted Symbol Parameter SSP2N60B SSS2N60B Units S Drain-Source Voltage 600 V I D Drain Current - Continuous (T C = 25 C) 2.0 2.0 * A - Continuous (T C = 100 C) 1.3 1.3 * A I DM Drain Current - Pulsed (Note 1) 6.0 6.0 * A S Gate-Source Voltage ± 30 V E AS Single Pulsed Avalanche Energy (Note 2) 120 mj I AR Avalanche Current (Note 1) 2.0 A E AR Repetitive Avalanche Energy (Note 1) 5.4 mj dv/dt Peak Diode Recovery dv/dt (Note 3) 5.5 V/ns P D Power Dissipation (T C = 25 C) 54 23 W - Derate above 25 C 0.43 0.18 W/ C T J, T STG Operating and Storage Temperature Range -55 to +150 C Maximum lead temperature for soldering purposes, T L 1/8" from case for 5 seconds * Drain current limited by maximum junction temperature. Thermal Characteristics 300 C Symbol Parameter SSP2N60B SSS2N60B Units R θjc Thermal Resistance, Junction-to-Case Max. 2.32 5.5 C/W R θcs Thermal Resistance, Case-to-Sink Typ. 0.5 -- C/W R θja Thermal Resistance, Junction-to-Ambient Max. 62.5 62.5 C/W

Electrical Characteristics T C = 25 C unless otherwise noted Symbol Parameter Test Conditions Min Typ Max Units Off Characteristics BS Drain-Source Breakdown Voltage = 0 V, I D = 250 µa 600 -- -- V BS Breakdown Voltage Temperature / T J Coefficient I D = 250 µa, Referenced to 25 C -- 0.65 -- V/ C I DSS = 600 V, = 0 V -- -- 10 µa Zero Gate Voltage Drain Current = 480 V, T C = 125 C -- -- 100 µa I GSSF Gate-Body Leakage Current, Forward = 30 V, = 0 V -- -- 100 na I GSSR Gate-Body Leakage Current, Reverse = -30 V, = 0 V -- -- -100 na On Characteristics (th) Gate Threshold Voltage =, I D = 250 µa 2.0 -- 4.0 V R DS(on) Static Drain-Source V On-Resistance GS = 10 V, I D = 1.0 A -- 3.8 5.0 Ω g FS Forward Transconductance = 40 V, I D = 1.0 A (Note 4) -- 2.05 -- S Dynamic Characteristics C iss Input Capacitance = 25 V, = 0 V, -- 380 490 pf C oss Output Capacitance f = 1.0 MHz -- 35 46 pf C rss Reverse Transfer Capacitance -- 7.6 9.9 pf Switching Characteristics t d(on) Turn-On Delay Time -- 16 40 ns V DD = 300 V, I D = 2.0 A, t r Turn-On Rise Time R G = 25 Ω -- 50 110 ns t d(off) Turn-Off Delay Time -- 40 90 ns t f Turn-Off Fall Time (Note 4, 5) -- 40 90 ns Q g Total Gate Charge = 480 V, I D = 2.0 A, -- 12.5 17 nc Q gs Gate-Source Charge = 10 V -- 2.2 -- nc Q gd Gate-Drain Charge (Note 4, 5) -- 5.4 -- nc Drain-Source Diode Characteristics and Maximum Ratings I S Maximum Continuous Drain-Source Diode Forward Current -- -- 2.0 A I SM Maximum Pulsed Drain-Source Diode Forward Current -- -- 6.0 A V SD Drain-Source Diode Forward Voltage = 0 V, I S = 2.0 A -- -- 1.4 V t rr Reverse Recovery Time = 0 V, I S = 2.0 A, -- 250 -- ns Q rr Reverse Recovery Charge di F / dt = 100 A/µs (Note 4) -- 1.31 -- µc Notes: 1. Repetitive Rating : Pulse width limited by maximum junction temperature 2. L = 55mH, I AS = 2.0A, V DD = 50V, R G = 25 Ω, Starting T J = 25 C 3. I SD 2.0A, di/dt 300A/µs, V DD BS, Starting T J = 25 C 4. Pulse Test : Pulse width 300µs, Duty cycle 2% 5. Essentially independent of operating temperature

Typical Characteristics I D, Drain Current [A] 10 0 Top : 15.0 V 10.0 V 8.0 V 7.0 V 6.5 V 6.0 V 5.5 V Bottom : 5.0 V I D, Drain Current [A] 10 0 150 o C 25 o C 10-2 10 0 10 1, Drain-Source Voltage [V] 1. 250μ s Pulse Test 2. T C = 25-55 o C 1. = 40V 2. 250μ s Pulse Test 2 4 6 8 10, Gate-Source Voltage [V] Figure 1. On-Region Characteristics Figure 2. Transfer Characteristics 18 15 R DS(ON) [Ω ], Drain-Source On-Resistance 12 9 6 3 = 10V = 20V Note : T J = 25 I DR, Reverse Drain Current [A] 10 0 150 25 1. = 0V 2. 250μ s Pulse Test 0 0 1 2 3 4 5 6 I D, Drain Current [A] 0.2 0.4 0.6 0.8 1.0 1.2 1.4 V SD, Source-Drain voltage [V] Figure 3. On-Resistance Variation vs Drain Current and Gate Voltage Figure 4. Body Diode Forward Voltage Variation with Source Current and Temperature 800 C iss = C gs + C gd (C ds = shorted) C oss = C ds + C gd C rss = C gd 12 10 = 120V Capacitance [pf] 600 400 200 C iss C oss C rss 1. = 0 V 2. f = 1 MHz, Gate-Source Voltage [V] 8 6 4 2 = 300V = 480V Note : I D = 2.0 A 0 10 0 10 1, Drain-Source Voltage [V] 0 0 2 4 6 8 10 12 14 Q G, Total Gate Charge [nc] Figure 5. Capacitance Characteristics Figure 6. Gate Charge Characteristics

Typical Characteristics (Continued) BS, (Normalized) Drain-Source Breakdown Voltage 1.2 1.1 1.0 0.9 1. = 0 V 2. I D = 250 μ A R DS(ON), (Normalized) Drain-Source On-Resistance 3.0 2.5 2.0 1.5 1.0 0.5 1. = 10 V 2. I D = 1.0 A 0.8-100 -50 0 50 100 150 200 T J, Junction Temperature [ o C] 0.0-100 -50 0 50 100 150 200 T J, Junction Temperature [ o C] Figure 7. Breakdown Voltage Variation vs Temperature Figure 8. On-Resistance Variation vs Temperature I D, Drain Current [A] 10 1 10 0 Operation in This Area is Limited by R DS(on) 1. T C = 25 o C 2. T J = 150 o C 3. Single Pulse 10-2 10 0 10 1 10 2 10 3, Drain-Source Voltage [V] DC 10 ms 100 µs 1 ms Figure 9-1. Maximum Safe Operating Area for SSP2N60B I D, Drain Current [A] 10 1 10 0 10-2 Operation in This Area is Limited by R DS(on) 10 ms 10 0 10 1 10 2 10 3 DC 1. T C = 25 o C 2. T J = 150 o C 3. Single Pulse 100 ms, Drain-Source Voltage [V] 1 ms 100 µs Figure 9-2. Maximum Safe Operating Area for SSS2N60B 2.0 1.6 I D, Drain Current [A] 1.2 0.8 0.4 0.0 25 50 75 100 125 150 T C, Case Temperature [ ] Figure 10. Maximum Drain Current vs Case Temperature

Typical Characteristics (Continued) Z θ JC (t), Therm al Response D=0.5 10 0 1. Z θ JC (t) = 2.32 /W M ax. 2. D uty Factor, D=t 1 /t 0.2 2 3. T JM - T C = P DM * Z θ JC (t) 0.1 0.05 0.02 0.01 single pulse P DM t 1 t 2 10-2 10-5 10-4 10-3 10-2 10 0 10 1 t 1, Square Wave Pulse Duration [sec] Figure 11-1. Transient Thermal Response Curve for SSP2N60B Z θ JC (t), Therm al Response 0.2 10 0 1. Z θ JC (t) = 5.5 /W M ax. 0.1 2. D uty Factor, D=t 1 /t 2 3. T JM - T C = P DM * Z θ JC (t) D=0.5 0.05 0.02 0.01 single pulse P DM t 1 t 2 10-2 10-5 10-4 10-3 10-2 10 0 10 1 t 1, Square Wave Pulse Duration [sec] Figure 11-2. Transient Thermal Response Curve for SSS2N60B

12V 200nF 50KΩ 300nF Gate Charge Test Circuit & Waveform Same Type as DUT 10V Q gs Q g Q gd DUT 3mA Charge Resistive Switching Test Circuit & Waveforms R L 90% R G V DD 10V DUT 10% t d(on) t r t d(off) tf t on t off Unclamped Inductive Switching Test Circuit & Waveforms L 1 E AS = ---- LI 2 2 AS BS -------------------- BS -V DD I D BS I AS R G V DD I D (t) 10V DUT V DD (t) t p t p Time

Peak Diode Recovery dv/dt Test Circuit & Waveforms DUT + _ I SD L Driver R G Same Type as DUT V DD dv/dt controlled by RG I SD controlled by pulse period ( Driver ) Gate Pulse Width D = -------------------------- Gate Pulse Period 10V I FM, Body Diode Forward Current I SD ( DUT ) di/dt I RM Body Diode Reverse Current ( DUT ) Body Diode Recovery dv/dt V SD V DD Body Diode Forward Voltage Drop

Package Dimensions (1.70) 1.30 ±0.10 9.90 ±0.20 (8.70) ø3.60 ±0.10 TO-220 2.80 ±0.10 4.50 ±0.20 1.30 +0.10 0.05 9.20 ±0.20 13.08 ±0.20 (1.46) (1.00) 1.27 ±0.10 (45 ) (3.00) (3.70) 1.52 ±0.10 15.90 ±0.20 10.08 ±0.30 18.95MAX. 2.54TYP [2.54 ±0.20] 0.80 ±0.10 2.54TYP [2.54 ±0.20] 0.50 +0.10 0.05 2.40 ±0.20 10.00 ±0.20 Dimensions in Millimeters

Package Dimensions (Continued) 3.30 ±0.10 TO-220F 10.16 ±0.20 ø3.18 ±0.10 2.54 ±0.20 (7.00) (0.70) 15.80 ±0.20 6.68 ±0.20 (1.00x45 ) 15.87 ±0.20 9.75 ±0.30 MAX1.47 0.80 ±0.10 (30 ) 0.35 ±0.10 #1 0.50 +0.10 0.05 2.76 ±0.20 2.54TYP [2.54 ±0.20] 2.54TYP [2.54 ±0.20] 9.40 ±0.20 4.70 ±0.20 Dimensions in Millimeters

TRADEMARKS The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks. ACEx ActiveArray Bottomless CoolFET CROSSVOLT DOME EcoSPARK E 2 CMOS EnSigna DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. LIFE SUPPORT POLICY FAIRCHILD S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, or (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in significant injury to the user. PRODUCT STATUS DEFINITIONS Definition of Terms FACT FACT Quiet series FAST FASTr FRFET GlobalOptoisolator GTO HiSeC I 2 C Across the board. Around the world. The Power Franchise Programmable Active Droop ImpliedDisconnect ISOPLANAR LittleFET MicroFET MicroPak MICROWIRE MSX MSXPro OCX OCXPro OPTOLOGIC OPTOPLANAR PACMAN POP Power247 PowerTrench QFET QS QT Optoelectronics Quiet Series RapidConfigure RapidConnect SILENT SWITCHER SMART START 2. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. Datasheet Identification Product Status Definition SPM Stealth SuperSOT -3 SuperSOT -6 SuperSOT -8 SyncFET TinyLogic TruTranslation UHC UltraFET VCX Advance Information Formative or In Design This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. Preliminary First Production This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. No Identification Needed Full Production This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. Obsolete Not In Production This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only. Rev. I1