PLL Synchronizer User s Manual / Version 1.0.6

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PLL Synchronizer User s Manual / Version 1.0.6 AccTec B.V. Den Dolech 2 5612 AZ Eindhoven The Netherlands phone +31 (0) 40-2474321 / 4048 e-mail AccTecBV@tue.nl

Contents 1 Introduction... 3 2 Technical Specification... 3 2.1 Electrical... 3 2.2 Mechanical... 3 2.3 Environmental... 3 2.4 Connections... 4 2.5 Photodiode detector... 4 3 Synchronization Principle... 4 3.1 General... 4 3.2 Main features... 5 4 Installation... 5 5 Operation instructions... 5 5.1 Open/Closed loop... 5 5.2 Calibration procedure... 5 5.3 Daily operation... 6 5.4 Operation without laser source... 6 6 Maintenance... 6 7 Safety... 7 8 Warranty... 7 9 Mechanical Outline... 7 9.1 Front Panel...7 9.2 Back Panel...7 10 Appendix A: Synchronization Scheme... 8 11 Appendix B: External Phase Control Scheme... 9 Version 1.0 2

1 Introduction This document details the design of the Phase Locked Loop (PLL) Synchronizer. The PLL Synchronizer is designed to synchronize a 3-GHz RF oscillator to a mode-locked 75-MHz Ti:Sapphire laser system with less than 1-ps phase jitter. This PLL Synchronizer model is a commercial version of the first version that has been installed at Eindhoven University of Technology for the purpose of an RF photogun setup. The principle of the synchronization has been published in ref. 1 and 2. 2 Technical Specification 2.1 Electrical Central Frequency Frequency range Output power RF enable Phase control, Local Phase control, Remote Ratio Monitor Switch loop open/close In-range relay Photo detector bias Power Supply 2998.5 MHz +/- 1.5 MHz 10 dbm typical BNC connector, TTL Dial, minimal -.. + rad 5 pin 240 circular DIN plug (appendix B), minimal 0... 2 rad Digital front panel meter Constant frequency (2998.5 MHz) in case opened Back panel connectors, max. +24 V and 50 ma SMA connector, +15 V Mains 80-130V for 60 Hz or 180-250V for 50 Hz The PLL Synchronizer is mounted in an EMC enclosure. 2.2 Mechanical Dimensions (LHW) Weight 19 x 3U x 500mm ca. 9kg If installed into a 19 rack/chassis the PLL Synchronizer must be supported by its rear side. The front panel mounts are not sufficient alone to bear the weight of the PLL Synchronizer. 2.3 Environmental Operating temperature range 0 to 40 C ambient, however temperature fluctuations should be kept as small as possible to prevent the PLL Synchronizer from drifting. The PLL Synchronizer should be operated in a clean environment. On no account must the PLL Synchronizer be exposed to water ingress. 1 F. Kiewiet, Generation of ultra-short, high-brightness relativistic electron bunches, Chapter 8, Universiteitsdrukkerij Technische Universiteit Eindhoven, Eindhoven, 2003. 2 F. Kiewiet, A. Kemper, O. Luiten, G. Brussaard, and M. van der Wiel, Femtosecond synchronization of a 3 GHz RF oscillator to a mode-locked Ti:Sapphire laser, NIMA 484, pp. 619-624, 2002. Version 1.0 3

2.4 Connections In the table below the input and output connectors on the front and back panel are summarized: Front panel: Photo Detector Input SMA 50 Ω +15V bias RF Enable Input BNC 50 Ω TTL 3 GHz Output SMA 50 Ω 10 dbm Phase Error Output BNC 150 Ω +/- 3V, typical 0.1 mv RMS Back panel: Remote Phase Control Input DIN 5 pin 240 circular DIN plug (appendix B). Out of Range Output 2 pins relay contact, max 24 V and 50 ma Mains power Input Euroconnector 110 or 230 V (auto switching) 2.5 Photodiode detector The PLL Synchronizer is supplied with an ultrafast silicon photodiode detector: type no. AEPX65 (manufacturer Centronic). The diode is biased with +15 V supplied by the PLL Synchronizer through the SMA connector. 3 Synchronization Principle 3.1 General In many experimental systems mode-locked lasers have been synchronized to other lasers, to electronic oscillators and, recently, to a free electron laser with subpicosecond jitter. In these applications the frequency of the laser is adjusted by changing the cavity length, to follow a master oscillator. In case the master oscillator is a stable crystal oscillator the advantages are obvious: the absolute (long term) jitter approaches the jitter of the crystal oscillator which is usually much better than the jitter and drift of a laser oscillator. However, in many applications it is of greater interest how well the two sources are synchronized, i.e. the relative jitter counts and not the absolute jitter. In pump-probe measurements, for instance, it is the delay between the pump and the probe which is of prime importance, irrespective of the absolute timing with respect to some external reference. In these cases changing the frequency of the oscillator with the highest control bandwidth is to be preferred, because in a stable well-designed feedback system this bandwidth will determine the residual jitter. The control bandwidth of electronic oscillators often exceeds the control bandwidth of laser oscillators by more than three orders of magnitude. Typically, the control bandwidth of the 75-MHz laser oscillator is of the order of 1 khz compared to a few MHz for the 3-GHz electronic oscillator. By making the laser the master oscillator in the design of the PLL Synchronizer the relative phase-jitter is improved by almost 2 orders of magnitude, resulting in an RMS jitter of less than 50 fs. Version 1.0 4

3.2 Main features A schematic layout of the synchronization system is given in appendix A. The Ti:Sapphire laser system should operate at a repetition rate of 75 MHz. The repetition rate is inversely proportional to the cavity length and can therefore be changed by moving one of the end mirrors by for instance a piezo-electric transducer (PZT). The electronic oscillator of the PLL Synchronizer operates at a frequency of 3 GHz. Its frequency is voltage controllable with a bandwidth of 3 MHz. The 75-MHz optical pulse train from the Ti:Sapphire laser is monitored with a biased fast Si-(PIN)- photodiode. A narrow-band filter is used to select the 5 th harmonic of this signal at 375 MHz. As phase-jitter increases at higher harmonics the use of the 5 th harmonic increases the sensitivity of the loop. To compare the phase of the laser with the phase of the electronic oscillator the 3-GHz RF signal is divided by 8 and subsequently filtered to remove the higher harmonics. The narrow-band filters are passive band pass devices having a bandwidth of 16 MHz. The filters behind the amplifiers are used to remove spurious amplifier output. To avoid phase errors by temperature changes the two signal paths to the inputs of the mixer are constructed fully identically. A Double-Balanced Mixer (DBM) is used to measure the phase difference of the two amplified signals. The DBM output signal is used by the loop electronics to change the frequency of the electronic oscillator. 4 Installation 1. After installation into 19 -rack or other, connect mains cable to the back panel. 2. Connect the photodiode to the input on the front panel. It is recommended to use semi-rigid coaxial cable (e.g. RG405). 3. Connect TTL signal to ENABLE input on the front panel. 4. It is optional to control remotely the phase setting via back panel connector using a 5k potentiometer or an external source. It is recommended to use 4-core shielded cable. (appendix B) 5. After switching on the PLL Synchronizer the light input on the photodiode should be adjusted to set the value on the ratio monitor to 1.0 +/- 10%. 6. Perform calibration procedure that is described in section 5.2. 5 Operation instructions 5.1 Open/Closed loop The PLL Synchronizer can run in two modes: 1- fixed frequency (open), and 2- phase locked (closed). In the first case, the voltage controlled oscillator is driven by a constant voltage such that the output frequency is fixed to 2998.5 MHz. In the latter case the loop is closed and the phase (and frequency) is continuously adjusted to lock the phase. The mode can be selected by the switch on the front panel. 5.2 Calibration procedure The calibration of the phase error output is described in this section. It is recommended to perform this procedure after installation and on a regular basis to check the performance of the PLL Synchronizer. 1. Connect the phase error output to an oscilloscope. (1MΩ input impedance) 2. Set the PLL Synchronizer in open loop. Version 1.0 5

3. Tune the external oscillator connected to the photodiode input to the central frequency of the PLL Synchronizer. On the oscilloscope screen you will see the beat frequency between the two oscillators. The beat frequency should be in the order of one khz. 4. Set the PLL Synchronizer in closed loop. Now you will see a noisy trance on the oscilloscope. 5. The RMS value of this signal, which is measured preferably with a digital multimeter with true-rms capability, is the resulting phase error of the PLL Synchronizer. The corresponding time error at 3 GHz is easily calculated by the following formula: U PhaseError 8 2 V / rad RMS 9 2 f f 2.9985 10 Hz 6. The calibration factor ( ) is expressed in V/rad. The phase difference between the positive and negative top is exactly π rad. Note that this value is the phase error calibration at 375 MHz. RF RF 5.3 Daily operation If RF is disabled the RF power is dumped in the internal load of the RF switch. In case the RF is enabled, make sure that the 3-GHz RF output is always connected to a 50 Ω load. For the stability of operation the signal strength should be checked regularly and if necessary the light intensity on the photodiode should be adjusted. Keeping the room temperature stable improves the performance of the PLL Synchronizer. 5.4 Operation without laser source It is possible to operate the PLL Synchronizer without the mode-locked laser source, while still controlling the frequency of the PLL Synchronizer. In this case the photodiode cable has to be disconnected; instead a sine-wave generator of 375 MHz (+/- 0dBm) should be connected using a decoupling capacitor. In this case, the sinewave generator acts as the master oscillator to which the electronic oscillator is phase locked. 6 Maintenance No maintenance is required in normal operation and there are no user-serviceable parts within the PLL Synchronizer. Each amplifier is factory tested and supplied with a set of test results. If degradation in performance to below the specified levels occurs, or a failure is suspected, then the complete unit should be returned to the manufacturer together with details of the fault. Version 1.0 6

7 Safety Hazardous voltages are present within this line-operated unit. Do not remove any panels. The PLL Synchronizer must be grounded. Line supply is filtered within the amplifier. A replaceable fuse is fitted to the line input connector which should be changed only when the AC power is disconnected from the connector. 8 Warranty AccTec B.V. warrants for 2 years from date of shipment that the goods supplied will be in full compliance with the agreed specifications and will be free from defects in material and workmanship. Any and all other warranties (except of title) express or implied, relating to fitness for particular purpose, merchantable quality or otherwise are expressly disclaimed. Seller will not be responsible for special or consequential loss or damages. Liability shall be limited to the repair or replacement of defective products subject to the return of the product intact, and un-tampered with by the buyer. 9 Mechanical Outline 9.1 Front Panel 9.2 Back Panel Version 1.0 7

10 Appendix A: Synchronization Scheme Version 1.0 8

11 Appendix B: External Phase Control Scheme The shield of the cable is connected to pin 3 of the 5 pin 240 DIN-plug. Recommended potentiometer type: Spectrol/Vishay 534-1-1-5k 5% Version 1.0 9